Claims
- 1. A field emission display baseplate, comprising:
a substrate; a plurality of emitters formed on the substrate; a dielectric layer formed on the substrate, the dielectric layer having an opening formed about each of the emitters; and an extraction grid having an optical transmissivity of less than one percent formed on the dielectric layer, the extraction grid formed substantially in a plane defined by the tips of the emitters and having an opening surrounding each tip of a respective one of the emitters.
- 2. The baseplate of claim 1 wherein the extraction grid comprises:
a first layer formed on the dielectric layer; and a second layer including germanium formed on the first layer.
- 3. The baseplate of claim 2 wherein:
the first layer includes a polysilicon layer having a thickness of between 0.05 microns and 0.15 microns; and the second layer includes a germanium layer having a thickness of about 0.15 microns.
- 4. The baseplate of claim 2 wherein the first and second layers together include a layer having a sheet resistance between 500 and 5,000 ohms per square.
- 5. The baseplate of claim 2 wherein the extraction grid further includes a third layer formed on the second layer.
- 6. The baseplate of claim 5 wherein the first and third layers include polysilicon.
- 7. The baseplate of claim 1 wherein the extraction grid provides a sheet resistance of about 1,000 ohms per square.
- 8. The baseplate of claim 1 wherein:
the substrate includes silicon; and the plurality of emitters include n+ silicon, each of the plurality of emitters being formed on a n-tank including n-doped silicon, each of the n-tanks in turn formed in p-doped silicon, each of the plurality of emitters comprising a drain of a FET.
- 9. The baseplate of claim 1 wherein the extraction grid comprises polycrystalline germanium.
- 10. The baseplate of claim 1 wherein the extraction grid comprises amorphous germanium.
- 11. A field emission display baseplate, comprising:
a substrate; a plurality of emitters formed on the substrate; a dielectric layer formed on the substrate, the dielectric layer having an opening formed about each of the emitters; and an extraction grid including germanium formed on the dielectric layer and having an opening, surrounding each tip of a respective one of the emitters.
- 12. The baseplate of claim 11 wherein the extraction grid comprises:
a first layer formed on the dielectric layer; and a second layer including germanium formed on the first layer.
- 13. The baseplate of claim 12 wherein:
the first layer includes a polysilicon layer having a thickness of between 0.05 microns and 0.15 microns; and the second layer includes a germanium layer having a thickness of about 0.15 microns.
- 14. The baseplate of claim 12 wherein the first and second layers together includes a layer having a sheet resistance between 500 and 5,000 per square.
- 15. The baseplate of claim 12 wherein the extraction grid further includes a third layer formed on the second layer.
- 16. The baseplate of claim 15 wherein the first and third layers include polysilicon.
- 17. The baseplate of claim 11 wherein the extraction grid provides a sheet resistance of about 1,000 ohms per square.
- 18. The baseplate of claim 11 wherein:
the substrate includes silicon; and the plurality of emitters include n+ silicon, each of the plurality of emitters being formed on a n-tank including n-doped silicon, each of the n-tanks in turn formed in p-doped silicon, each of the plurality of emitters comprising a drain of a FET.
- 19. The baseplate of claim 11 wherein the extraction grid comprises polycrystalline germanium.
- 20. The baseplate of claim 11 wherein the extraction grid comprises amorphous germanium.
- 21. A field emission display comprising:
a substrate including p-doped silicon; a plurality of silicon emitters formed on the substrate, each of the emitters being formed on a respective n-tank of n-doped silicon formed in the substrate; a dielectric layer formed on the substrate, the dielectric layer having an opening formed about each of the emitters; an extraction grid having an optical attenuation factor of at least two orders of magnitude formed on the dielectric layer, the extraction grid formed substantially in a plane defined by respective tips of the plurality of emitters and having an opening surrounding each tip of a respective one of the emitters, the extraction grid providing a sheet resistance of about 1,000 ohms per square; and a cathodoluminescent-coated faceplate having a planar surface formed parallel to and near the plane of tips of the plurality of emitters.
- 22. The display of claim 21 wherein the extraction grid comprises:
a first layer including a polysilicon layer having a thickness of between 0.05 microns and 0.15 microns; and a second layer including a germanium layer having a thickness of about 0.15 microns.
- 23. The display of claim 21 wherein the extraction grid comprises amorphous germanium.
- 24. The display of claim 21 wherein the extraction grid comprises polycrystalline germanium.
- 25. An active display comprising:
a semiconductor substrate; a plurality of emitters formed on the substrate, each emitter of the plurality comprising a drain of a FET; a dielectric layer formed on the substrate and having an opening surrounding each one of the plurality of emitters; an extraction grid including germanium formed on the dielectric layer and having an opening surrounding each tip of a respective one of the emitters; and a faceplate disposed in a plane parallel to a plane of tips of the emitters, the faceplate including a cathodoluminescent layer formed on a transparent conductive layer in turn formed on a transparent insulator.
- 26. The display of claim 25 wherein the extraction grid comprises:
a first layer formed on the dielectric layer; and a germanium layer formed on the first layer.
- 27. The display of claim 26 wherein the first layer and the germanium layer together provide a layer having a sheet resistance of about 1,000 ohms per square.
- 28. The display of claim 25 wherein the extraction grid comprises:
a first polysilicon layer formed on the dielectric layer; a germanium layer formed on the first polysilicon layer; and a second polysilicon layer formed on the germanium layer.
- 29. The display of claim 28 wherein the first and second polysilicon layers and the germanium layer collectively form a layer having a sheet resistance of about 1,000 ohms per square.
- 30. The display of claim 25 wherein the extraction grid includes a germanium layer having a thickness of 0.15 microns.
- 31. The display of claim 25 wherein the extraction grid comprises amorphous germanium.
- 32. The display of claim 25 wherein the extraction grid comprises polycrystalline germanium.
- 33. A computer system comprising:
a central processing unit; a memory device coupled to the central processing unit, the memory device storing instructions and data for use by the central processing unit; an input interface; and a display, the display comprising:
a cathodoluminescent layer formed on a conductive surface of a transparent faceplate; a group of emitters formed on a planar surface of a substrate, the substrate disposed parallel to and near the cathodoluminescent layer formed on the faceplate; a dielectric layer formed on the substrate, the dielectric layer having an opening formed about each of the emitters; and an extraction grid including germanium formed on the dielectric layer, the extraction grid substantially in a plane defined by tips of the emitters and having an opening formed surrounding a tip of a respective one of the emitters.
- 34. The computer system of claim 33 wherein each emitter of the group of emitters comprises a drain of a FET.
- 35. The computer system of claim 33 wherein the extraction grid comprises:
a first layer formed on the dielectric layer; and a germanium layer formed on the first layer.
- 36. The computer system of claim 33 wherein the extraction grid comprises a layer having a sheet resistance of about 1,000 ohms per square.
- 37. The computer system of claim 33 wherein the extraction grid comprises:
a first polysilicon layer formed on the dielectric layer; a germanium layer formed on the first polysilicon layer; and a second polysilicon layer formed on the germanium layer.
- 38. The computer system of claim 37 wherein the first and second polysilicon layers and the germanium layer collectively form a layer having a sheet resistance of about 1,000 ohms per square.
- 39. The display of claim 33 wherein the extraction grid includes a polycrystalline germanium layer.
- 40. The display of claim 33 wherein the extraction grid includes an amorphous germanium layer.
- 41. A method of operating a field emission display, the method comprising steps of:
biasing an extraction grid to a first potential sufficient to extract electrons from an emitter tip surrounded by an opening in the extraction grid; biasing a substrate to a second potential less than the first potential to form a depletion region between the substrate and a n-tank disposed in the substrate beneath the emitter; and transmitting less than one percent of photons incident on the extraction grid through the extraction grid.
- 42. The method of claim 41, further including a step of applying an accelerating potential to a cathodoluminescent-coated anode disposed near the substrate, the accelerating potential for accelerating a portion of the electrons emitted from the emitter to the anode to strike the cathodoluminescent coating to provide light.
- 43. The method of claim 41, further comprising a step of applying a control signal to a gate of a field effect transistor, wherein the n-tank forms a drain of the field effect transistor, the control signal controlling the number of electrons emitted from the emitter per unit time.
- 44. The method of claim 41, including steps of:
applying control signals to a plurality of gates of field effect transistors to spatially modulate the number of electrons emitted from emitters; and accelerating a portion of the electrons emitted from the emitters to a cathodoluminescent-coated anode to strike the cathodoluminescent coating to provide light and form a visible image.
- 45. A method for making a field emission display baseplate, the method comprising:
forming a plurality of emitters on a substrate; forming a dielectric layer on the substrate, the dielectric layer having a plurality of openings each of which surrounds a respective one of the emitters; and forming a layer of germanium on the dielectric layer, the germanium layer having a plurality of openings each of which surrounds a respective one of the emitters.
- 46. The method of claim 45 wherein:
forming a dielectric layer comprises forming a dielectric layer on the planar surface and the plurality of emitters; and forming a conductive layer comprises:
forming a first layer including polysilicon on the dielectric layer; forming a second layer including germanium on the first layer; and forming a third layer including polysilicon on the second layer.
- 47. The method of claim 45, further comprising:
treating the dielectric layer and the conductive layer to remove at least those portions of the dielectric layer and the conductive layer directly above tips of the plurality of emitters to provide a plurality of openings in the conductive layer each concentric with a tip of one of the plurality of emitters; and etching the dielectric layer to expose at least tips of the plurality of emitters.
- 48. The method of claim 47 wherein the treating step comprises polishing the conductive layer and the dielectric layer via a chemical-mechanical polishing process.
- 49. The method of claim 45, further comprising placing a faceplate in a plane parallel to a plane of tips of the plurality of emitters, the faceplate comprising a cathodoluminescent layer formed on a transparent conductive layer in turn formed on a transparent insulator.
- 50. The method of claim 45 wherein forming a plurality of emitters on a substrate includes forming a plurality of emitters on a substrate wherein each of the plurality of emitters forms a drain of a FET in an active display.
- 51. The method of claim 45 wherein forming a layer of germanium includes forming a layer of polycrystalline germanium.
- 52. The method of claim 45 wherein forming a layer of germanium includes forming a layer of amorphous germanium.
GOVERNMENT RIGHTS
[0001] This invention was made with government support under Contract No. DABT63-93-C-0025 awarded by Advanced Research Projects Agency (ARPA). The government has certain rights in this invention.
Divisions (1)
|
Number |
Date |
Country |
Parent |
09126494 |
Jul 1998 |
US |
Child |
09860256 |
May 2001 |
US |