The present invention is directed to high temperature superconducting wire, and in particular to a structure and fabrication method that reduces damage resulting from mechanical slitting.
The potential for high temperature superconductors (HTS) to efficiently transmit, generate, transform, use, and store electrical energy is recognized. In particular, more efficient electric power systems depend on more efficient wire technology. Past advancements permit brittle HTS materials to be formed into kilometer-length wires capable of transmitting about two hundred times the current than conventional copper and aluminum conductors of the same physical dimensions. The term “wire” is used herein to refer to any elongated configuration including tapes or strips.
Recent research in HTS materials provides potential for the economically feasible use of such materials in the power industry, including applications for power generation, transmission, distribution, and storage. The use of HTS devices in the power industry would result in significant reduction in the size (i.e., footprint) of electric power equipment, reduced environmental impact, greater safety, and increased capacity over conventional technology.
Two generations of HTS wire materials have been explored previously. The first generation (hereinafter “1G”) of HTS wires included the use of BSCCO high-Tc superconductor, typically embedded in a matrix of noble metal (e.g. Ag). Without limitation, 1G wires are fabricated by a thermo-mechanical process wherein the superconducting powd++8/96CF5er is packed into silver billets that are drawn, rolled, and heat-treated to form the wire. The drawbacks of 1G wires are the high materials costs (e.g. Ag), elaborate processing operations, and generally poor critical current performance in high magnetic fields at high temperatures, which limit the lengths of the wires.
More recently, rare earth-based HTS materials ((RE)BCO) have been used in second generation (hereinafter “2G) HTS wires. Rare earth elements include, but are not limited to, Yttrium, Samarium and Gadolinium. 2G HTS wire processing typically involves thin film deposition of a multilayer stack on nickel alloy tapes. In order to achieve high critical currents, the maximal current of a superconductor, the superconducting film is grown epitaxially in a single crystalline-like form on oxide buffer layers that provide a single crystalline-like template even when deposited on polycrystalline metal substrate. In certain instances, 2G HTS tape utilizes YBCO coated conductors. 2G conductor (or wire) offers both performance benefits (operates at higher temperatures and background magnetic fields) and cost benefits.
Recently, the focus of the HTS industry has been to increase current carrying capacity, throughput of wire production, and decrease manufacturing cost. The objective is to fabricate commercially viable, high performance HTS wire that is available to the power industry to build devices, such as transmission cables and transformers, for the power grid.
As described in more detail below, one method of manufacturing 2G HTS wire involves a combination of electroplating, sputtering, and metal-organic chemical vapor deposition (MOCVD) steps to deposit buffer layers, a superconductor layer, and one or more cap layers onto a substrate. It is often more cost-effective to manufacture HTS wires with relatively large widths (for example, from 12 mm up to as much as 10 cm or more) as a base conductor. The wires can then be slit along their lengths to produce multiple wires having a smaller width. The desired width of a conductor wire is driven by the specific application. For HTS cables, a width of about 4 mm is often preferred, while other applications, such as am HTS transformer low voltage winding, may require a wide tape to accommodate high operating currents. HTS wire manufactured with greater widths can be slit to a desired width, usually before the final application of a cap layer or stabilizer. For example, a 12 mm HTS wire could be slit to produce two 6 mm HTS wires, three 4 mm HTS wires, four 3 mm HTS wires, six 2 mm HTS wires or even one 8 mm and one 4 mm HTS wires.
Slitting the HTS base conductor can be accomplished using a variety of known methods, including using a laser slitter or a mechanical slitter that slices the HTS base conductor using metal blades. Mechanical slitters have a lower cost and higher throughput than many other types of slitters. Unfortunately, however, the mechanical slitting process can cause damage to the relatively brittle superconducting and buffer layers. This damage can result in the formation of cracks that can spread, degrading the mechanical and electrical properties of the wire and ultimately causing delamination of the wire and critical current (Ic) deterioration.
What is needed is an improvement to reduce or eliminate damage to the superconducting wire caused by mechanical slitting.
According to embodiments of the present invention, a 2nd generation high temperature superconductor wire is provided that prevents mechanical destruction from the wire edge due to slitting. A 2G HTS wire according to embodiments of the present invention has a structure that prevents mechanical destruction from the wire edge. This can be accomplished by forming a striation at or near the edge of the wire where the buffer and superconducting layers are removed to prevent any propagation of edge cracks from damaging the HTS wire.
The foregoing has outlined rather broadly the features and technical advantages of the present invention in order that the detailed description of the invention that follows may be better understood. Additional features and advantages of the invention will be described hereinafter. It should be appreciated by those skilled in the art that the conception and specific embodiments disclosed may be readily utilized as a basis for modifying or designing other structures for carrying out the same purposes of the present invention. It should also be realized by those skilled in the art that such equivalent constructions do not depart from the spirit and scope of the invention as set forth in the appended claims.
For a more thorough understanding of the present invention, and advantages thereof, reference is now made to the following descriptions taken in conjunction with the accompanying drawings, in which:
FIG.10 shows another embodiment of the present invention in which a single striation is formed (for each desired slit) and then the HTS wire is slit within the striation.
The accompanying drawings are not intended to be drawn to scale. In the drawings, each identical or nearly identical component that is illustrated in various figures is represented by a like numeral. For purposes of clarity, not every component may be labeled in every drawing.
Embodiments of the present invention include a 2nd generation high temperature superconductor wire that prevents mechanical destruction from the wire edge due to slitting. A 2G HTS wire according to embodiments of the present invention has a structure that prevents mechanical destruction from the wire edge. This can be accomplished by forming a striation at or near the edge of the wire where the buffer and superconducting layers are removed to prevent any propagation of edge cracks from damaging the HTS wire.
A schematic of a typical 2G HTS wire 100 is shown in
The substrate 110 is typically in a tape-like configuration, having a high aspect ratio. For example, the width of the tape is generally on the order of about 2-12 mm, and the length of the tape is typically at least about 100 m, most typically greater than about 500 m. Accordingly, the substrate may have an aspect ratio which is fairly high, on the order of not less than 103, or even not less than 104. Certain embodiments are longer, having an aspect ratio of 105 and higher. As used herein, the term ‘aspect ratio’ is used to denote the ratio of the length of the substrate or tape to the next longest dimension, that is, the width of the substrate or tape.
In one embodiment, the substrate is treated so as to have desirable surface properties for subsequent deposition of the constituent layers of the HTS tape. For example, the surface may be lightly polished to a desired flatness and surface roughness. Additionally, the substrate may be treated to be biaxially textured as is understood in the art, such as by the known RABiTS (roll assisted biaxially textured substrate) technique.
Turning to buffer layer 111, the buffer layer may be a single layer, or more commonly, be made up of several films. Most typically, the buffer layer includes a biaxially textured film, having a crystalline texture that is generally aligned along crystal axes both in-plane and out-of-plane of the film. Such biaxial texturing may be accomplished by IBAD. As is understood in the art, IBAD is an acronym for Ion Beam Assisted Deposition, a technique which may be advantageously utilized to form a suitably textured buffer layer for subsequent formation of an HTS layer having desirable crystallographic orientation for superior superconducting properties. Magnesium oxide is a typical material of choice for the IBAD film and may be on the order or 50 to 500 Angstroms, such as 50 to 200 Angstroms. Generally, the IBAD film has a rock-salt like crystal structure, as defined and described in U.S. Pat. No. 6,190,752, which is incorporated herein by reference in its entirety.
The buffer layer may include additional films, such as a barrier film provided to directly contact and be placed in between an IBAD film and the substrate. In this regard, the barrier film may advantageously be formed of an oxide, such as yttria, and functions to isolate the substrate from the IBAD film. A barrier film may also be formed of non-oxides such as silicon nitride and silicon carbide. Suitable techniques for deposition of a barrier film include chemical vapor deposition and physical vapor deposition including sputtering. Typical thicknesses of the barrier film may be within a range of about 100-200 angstroms. Still further, the buffer layer may also include an epitaxially grown film, formed over the IBAD film. In this context, the epitaxially grown film is effective to increase the thickness of the IBAD film and may desirably be made principally of the same material utilized for the IBAD layer such as MgO.
In embodiments utilizing an MgO-based IBAD film and/or epitaxial film, a lattice mismatch between the MgO material and the material of the superconducting layer exists. Accordingly, the buffer layer may further include another buffer film, this one in particular implemented to reduce a mismatch in lattice constants between the HTS layer and the underlying IBAD film and/or epitaxial film. This buffer film may be formed of materials such as YSZ (yttria-stabilized zirconia) strontium ruthenate, lanthanum manganate, and generally, perovskite-structured ceramic materials. The buffer film may be deposited by various physical vapor deposition techniques.
While the foregoing has principally focused on implementation of a biaxially textured film in the buffer stack (layer) by a texturing process such as IBAD, alternatively, the substrate surface itself may be biaxially textured. In this case, the buffer layer is generally epitaxially grown on the textured substrate so as to preserve biaxial texturing in the buffer layer. One process for forming a biaxially textured substrate is the process known in the art as RABiTS (roll assisted biaxially textured substrates), generally understood in the art.
High-temperature superconductor (HTS) layer 112 is typically chosen from any of the high-temperature superconducting materials that exhibit superconducting properties above the temperature of liquid nitrogen, 77° K. Such materials may include, for example, YBa2Cu3O7−x, Bi2Sr2Ca2Cu3O10+y, Ti2Ba2Ca2Cu3O10+y, and HgBa2Ca2Cu3O8+y. One class of materials includes REBa2Cu3O7−x, wherein RE is a rare earth element. Of the foregoing, YBa2Cu3O7−x, also generally referred to as YBCO, may be advantageously utilized. The HTS layer 112 may be formed by anyone of various techniques, including thick and thin film forming techniques. Preferably, a thin film physical vapor deposition technique such as pulsed laser deposition (PLD) can be used for a high deposition rates, or a chemical vapor deposition technique can be used for lower cost and larger surface area treatment. Typically, the HTS layer has a thickness on the order of about 1 to about 30 microns, most typically about 2 to about 20 microns, such as about 2 to about 10 microns, in order to get desirable amperage ratings associated with the HTS layer 112.
Capping layer 114 and stabilizer layer 116 are generally implemented for electrical stabilization, that is, to aid in prevention of HTS burnout in practical use. More particularly, layers 114 and 116 aid in continued flow of electrical charges along the HTS conductor in cases where cooling fails or the critical current density is exceeded, and the HTS layer moves from the superconducting state and becomes resistive. Typically, a noble metal is utilized for capping layer 114 to prevent unwanted interaction between the stabilizer layer(s) and the HTS layer 112. Typical noble metals include gold, silver, platinum, and palladium. Silver is typically used due to its cost and general accessibility. Capping layer 114 is typically made to be thick enough to prevent unwanted diffusion of the components from stabilizer layer 116 into HTS layer 112 but is made to be generally thin for cost reasons (raw material and processing costs). Typical thicknesses of capping layer 114 range within about 0.1 to about 10.0 microns, such as 0.5 to about 5.0 microns. Various techniques may be used for deposition of capping layer 114, including physical vapor deposition, such as DC magnetron sputtering.
Depending on the implementation, stabilizer layer 116 is incorporated to overlie the superconducting layer 112 and, in particular, overlie and directly contact capping layer 114 in the embodiment shown in
Electroplating (also known as electrodeposition) is generally performed by immersing the superconductive tape in a solution containing ions of the metal to be deposited. The surface of the tape is connected to an external power supply and current is passed through the surface into the solution, causing a reaction of metal ions (Mz−) with electrons (e−) to form a metal (M).
Capping layer 114 functions as a second layer for deposition of copper thereon. In the particular case of electroplating of stabilizer metals, the superconductive tape is generally immersed in a solution containing cupric ions, such as in a copper sulfate solution. Electrical contact is made to capping layer 114 and current is passed such that the reaction Cu2++2e−→Cu occurs at the surface of the capping layer 114. The capping layer 114 functions as the cathode in the solution, such that the metal ions are reduced to Cu metal atoms and deposited on the tape. On the other hand, a copper-containing anode is placed in the solution, at which an oxidation reaction occurs such that copper ions go into solution for reduction and deposition at the cathode.
In the absence of any secondary reactions, the current delivered to the conductive surface during electroplating is directly proportional to the quantity of metal deposited (Faraday's Law of Electrolysis). Using this relationship, the mass, and hence thickness of the deposited material forming stabilizer layer 116 can be readily controlled.
While the foregoing generally references copper, it is noticed that other metals, including aluminum, silver, gold, and other thermally and electrically conductive metals may also be utilized. However, it is generally desirable to utilize a non-noble metal to reduce overall materials cost for forming the superconductive tape.
While the foregoing description and
While embodiments of the present invention are particularly suitable for formation of a stabilizer layer that is continuous, having side bridges that are formed of the same material, other embodiments utilize a different material for the side bridges. For example, the lateral surfaces can be masked during stabilizer deposition, followed by mask removal and deposition of a different side bridge composition. Particularly suitable are high melting point solders, such as lead-tin compositions. Typically, such solders have a melting point greater than about 180° C. Use of high melting point solders or use of a surround stabilizer (which also has a melting point greater than 180° C.) such as copper is of notable importance. Particularly, high melting point materials permit improved flexibility of conductor processing by the end user, due to greater temperature range in which the conductor can be manipulated, such as during joining operations.
While not shown in
In the embodiment shown in
According to embodiments of the invention, striations to block the propagation of edge damage can be formed in a variety of ways, including without limitation laser ablation, etching, or ion beam or plasma milling. For example, in some embodiments, a striation can be formed using a Femto-second pulse laser to remove material in the desired location. In other embodiments, the striations can be formed by patterning the buffer and superconducting layers during deposition so that no buffer or superconductor is deposited within the striations.
In order to fully prevent cracks from propagating across both the buffer and HTS layers, it is desirable that all or substantially all of the buffer and HTS material in the striation be removed. In some cases, the striation may extend into the substrate layer. In some embodiments, the striation width will be at least 10 μm wide, such as at least 20 μm wide, at least 30 μm wide, at least 40 μm wide, at least 50 μm wide, at least 100 μm wide, or at least 500 μm wide. Because the striation process makes a portion of the original HTS wire unusable, it is desirable to make the striations as narrow as possible while still preventing damage propagation resulting from slitting. Forming a narrow striation using, for example, laser ablation or particle beam milling is also generally easier and faster than forming a wide striation.
In some embodiments, a striation would be formed on either side of the desired location of a mechanical slit as shown in
In one particular non-limiting example, buffer and superconductor layers are deposited onto a 50 μm thick Hastelloy substrate layer that is 12 mm wide. In this specific example, the buffer layer is a buffer stack as described above having a combined thickness of ˜0.2 μm, while the superconducting layer is a layer of REBCO with a thickness of 1.6 μm. An encapsulating overlayer of silver has been deposited over the entire structure to a thickness of 1.0 μm. The base HTS wire is to be slit along its length to produce three separate HTS wires having a width of approximately 4 mm.
As shown in
The base HTS wire will then be slit at positions shown by dashed line 922 to form three final HTS wires 320 of approximately 3.94 mm in width using a mechanical slitter. The slitter will be positioned to slit the base HTS wire through the 50 μm shoulders between the first and second striations and between the third and fourth striations. Given a maximum positional error of the mechanical slitter of ±15 μm for this example, this insures that the slits will both be separated from the edges of the effective HTS layers resulting from the striations.
The striations shown in the schematic drawings herein all have a rectangular cross-section for ease of illustration. As will be appreciated by persons of skill in the art, however, the actual shape of the striation will depend to a large degree on the apparatus used to form the striation. For example, a striation cut using a laser will tend to have a rounded base rather than the rectangular shape shown in the drawings. Further, in some embodiments it may be desirable to form a striation with a different cross-sectional shape, such as the V-shaped striation 1230 shown in
The invention described herein has broad applicability and can provide many benefits as described and shown in the examples above. The embodiments will vary greatly depending upon the specific application, and not every embodiment will provide all of the benefits and meet all of the objectives that are achievable by the invention.
Whenever the terms “automatic,” “automated,” or similar terms are used herein, those terms will be understood to include manual initiation of the automatic or automated process or step. In the discussion and in the claims, the terms “including” and “comprising” are used in an open-ended fashion, and thus should be interpreted to mean “including, but not limited to. . . . ” To the extent that any term is not specially defined in this specification, the intent is that the term is to be given its plain and ordinary meaning. The accompanying drawings are intended to aid in understanding the present invention and, unless otherwise indicated, are not drawn to scale. As used herein, the words “right,” “left,” “lower,” “upper,” “bottom,” “horizontal,” “vertical,” and the like designate directions in the drawings to which reference is made. These terms are used for convenience only and are not limiting.
Further, it should be recognized that embodiments of the present invention can be implemented via computer hardware or software, or a combination of both. The methods can be implemented in computer programs using standard programming techniques—including a computer-readable storage medium configured with a computer program, where the storage medium so configured causes a computer to operate in a specific and predefined manner—according to the methods and figures described in this Specification. Each program may be implemented in a high-level procedural or object-oriented programming language to communicate with a computer system. However, the programs can be implemented in assembly or machine language, if desired. In any case, the language can be a compiled or interpreted language. Moreover, the program can run on dedicated integrated circuits programmed for that purpose.
The scope of the present application is not intended to be limited to the particular embodiments of the process, machine, manufacture, composition of matter, means, methods and steps described in the specification. As one of ordinary skill in the art will readily appreciate from the disclosure of the present invention, processes, machines, manufacture, compositions of matter, means, methods, or steps, presently existing or later to be developed that perform substantially the same function or achieve substantially the same result as the corresponding embodiments described herein may be utilized according to the present invention. Accordingly, the appended claims are intended to include within their scope such processes, machines, manufacture, compositions of matter, means, methods, or steps. The figures described herein are generally schematic and do not necessarily portray the embodiments of the invention in proper proportion or scale.
The present application claims priority from U.S. Provisional Patent Application No. 62/807,133, filed Feb. 18, 2019, entitled “FABRICATION OF SUPERCONDUCTOR WIRE” by Fukushima et al., which is incorporated by reference herein in its entirety.
Number | Date | Country | |
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62807133 | Feb 2019 | US |