Field of the Invention
The field of the invention is data processing, or, more specifically, methods, apparatus, and products for failover of a virtual function exposed by an SR-IOV adapter.
Description of Related Art
The development of the EDVAC computer system of 1948 is often cited as the beginning of the computer era. Since that time, computer systems have evolved into extremely complicated devices. Today's computers are much more sophisticated than early systems such as the EDVAC. Computer systems typically include a combination of hardware and software components, application programs, operating systems, processors, buses, memory, input/output devices, and so on. As advances in semiconductor processing and computer architecture push the performance of the computer higher and higher, more sophisticated computer software has evolved to take advantage of the higher performance of the hardware, resulting in computer systems today that are much more powerful than just a few years ago.
One area of advancement includes data centers providing cloud services with various types of virtualization services. Regardless of the particular type of virtualization service being offered, most virtualization services make use of massive amounts of data I/O traffic and network bandwidth. In such a computing environment, an industry standard specification, SR-IOV (‘Single Root I/O Virtualization’), exists for creating virtual processes that allow for independent access to I/O hardware resources of a shared network device. However, problems still exist in reducing the impact from hardware failures or updates on the hardware being utilized by the virtualization services.
Methods, apparatus, and products for failover of a virtual function exposed by an SR-IOV adapter of a computing system are disclosed in this specification. The virtual function is mapped to a logical partition of the computing system. Such failover includes: instantiating, by a hypervisor, a standby virtual function in the computing system; detecting a loss of communication between a logical partition and an active virtual function mapped to the logical partition; placing the active virtual function and the standby virtual function in an error state; remapping the logical partition to the standby virtual function; and placing the standby virtual function in an error recovery state.
The foregoing and other objects, features and advantages of the invention will be apparent from the following more particular descriptions of exemplary embodiments of the invention as illustrated in the accompanying drawings wherein like reference numbers generally represent like parts of exemplary embodiments of the invention.
Embodiments of methods, apparatus, and computer program products for failover of a virtual function exposed by an SR-IOV adapter of a computing system are described with reference to the accompanying drawings, beginning with
The example data center (120) of
The computing system (102) includes at least one computer processor (156) or “CPU” as well as random access memory (168) or “RAM,” which is connected through a high speed memory bus (166) and bus adapter (158) to processor (156) and to other components of the computing system (102).
Stored in RAM (168) is a hypervisor (136) and a management console (138). The management console (138) may provide a user interface through which a user may direct the hypervisor (136) on instantiating and maintaining multiple logical partitions (116, 118), where each logical partition may provide virtualization services to one or more clients. Although depicted in the example of
Also stored in RAM (168) are two instances of an operating system (154), one for each logical partition (116, 118). Operating systems useful in computers configured for failover of a virtual function exposed by an SR-IOV adapter of a computing system according to various embodiments include UNIX™, Linux™, Microsoft Windows™, AIX™, IBM's i™ operating system, and others as will occur to those of skill in the art. The operating systems (154), hypervisor (136), and management console (138) are shown in RAM (168), but many components of such software may typically be stored in non-volatile memory such as, for example, on a data storage (170) device or in firmware (132).
The computing system (102) may also include a storage device adapter (172) coupled through expansion bus (160) and bus adapter (158) to processor (156) and other components of the computing system (102). Storage device adapter (172) connects non-volatile data storage to the computing system (102) in the form of data storage (170). Storage device adapters useful in computers configured for failover of a virtual function exposed by an SR-IOV adapter of a computing system according to various embodiments include Integrated Drive Electronics (“IDE”) adapters, Small Computing system Interface (“SCSI”) adapters, and others as will occur to those of skill in the art. Non-volatile computer memory also may be implemented for as an optical disk drive, electrically erasable programmable read-only memory (so-called “EEPROM” or “Flash” memory (134)), RAM drives, and so on, as will occur to those of skill in the art.
The example computing system (102) may also include one or more input/output (“I/O”) adapters (178). I/O adapters implement user-oriented input/output through, for example, software drivers and computer hardware for controlling output to display devices such as computer display screens, as well as user input from user input devices (181) such as keyboards and mice. The example computing system (102) may also include a video adapter (114), which may be an example of an I/O adapter specially designed for graphic output to a display device (180) such as a display screen or computer monitor. Video adapter (114) may be connected to processor (156) through a high speed video bus (164), bus adapter (158), and the front side bus (162), which may also be a high speed bus.
The example computing system (102) of
The network adapters (124, 126, and 128) may further be configured for data communications with hosts (195) over a network (101) reachable through local area networks (LANs), such as LAN (100). The network adapters (124, 126, and 128) may further be configured for data communications with storage area networks (SANs), such as SAN (112), and for data communications with various storage devices in a storage array (104), such as storage devices (106) and storage devices (108).
From time to time and for various reasons, a virtual function of an SR-IOV adapter may fail. In such an instance, the logical partition mapped to the virtual function may lose communication via the virtual function. To that end, the computing system (102) of
While in this disclosure, various embodiments are described in the context of the SR-IOV standard and PCIe, such descriptions are intended to be illustrative, not limiting. Readers will recognize that failover of a virtual function exposed by an SR-IOV adapter of a computing system may be carried out utilizing other virtualization standards, or no standard at all.
The network adapters (124, 126, and 128) are for purposes of illustration, not for limitation. Other I/O adapters may be utilized in failover of a virtual function exposed by an SR-IOV adapter of a computing system. Similarly, data centers according to various embodiments may include additional servers, routers, other devices, and peer-to-peer architectures, not shown in the figures, as will occur to those of skill in the art. Networks in such data processing systems may support many data communications protocols, including for example TCP (Transmission Control Protocol), IP (Internet Protocol), HTTP (HyperText Transfer Protocol), WAP (Wireless Access Protocol), HDTP (Handheld Device Transport Protocol), and others as will occur to those of skill in the art. Various embodiments may be implemented on a variety of hardware platforms in addition to those illustrated.
For further explanation, the system of
An adjunct partition as the term is used in this specification refers to a partition instantiated by a hypervisor and configured for management of SR-IOV adapter resources, including various configuration parameters of virtual functions (216) exposed by the network adapter (226). In some embodiments, for example, each adjunct partition (202, 206) is associated and mapped (208, 212) with a physical function (214, 220) of a discrete network adapter (226, 228). The adjunct partition may include, in addition to a kernel, a driver for managing a network adapter through a management channel specified in the protocol for the network adapter.
The example system of
To that end, the hypervisor may instantiate a standby virtual function in the computing system. The system of
In the system of
For further explanation,
The standby virtual function may be created to support any or most active virtual functions supported by the hypervisor. Alternatively, the standby virtual function may be created to support a specific active virtual function or a group of active virtual functions. Such a standby virtual function may be created on the same network adapter as the active virtual function or the standby virtual function may be created on a network adapter separate from the network adapter hosting the active virtual function.
Once created, the hypervisor may provision the standby virtual function with configuration parameters. The configuration parameters may be the same or similar to the configuration parameters of a specific active virtual function. Alternatively, the configuration parameters may be generic configuration parameters able to support any, most, or a subset of the active virtual functions hosted by the hypervisor. The configuration parameters include information necessary for the standby virtual function to operate as an active virtual function for a logical partition, and may include MAC addresses, bandwidth limits, throughput limits, DMA addresses, permissions, virtual LAN information, and the like. The hypervisor may provision the standby virtual function with the configuration parameters using an adjunct partition and a physical function of the network adapter hosting the standby virtual function.
The hypervisor may retrieve configuration parameters from the active virtual function or from a location in memory configured to store the configuration parameters for the active virtual function. Further, if a failure of the active virtual function is predicted by the hypervisor, the configuration parameters for the standby virtual function may be altered from the configuration parameters for the active virtual function in order to avoid the same type of failure.
The method of
The loss of communication may be detected by the hypervisor before the logical partition mapped to the active virtual function is aware of the loss of communication. The active virtual function may present symptoms of failure, or a likelihood of failure, that are detectable by the hypervisor. Such symptoms may not be immediately detectable by the logical partition.
The method of
The method of
The method of
The method of
For further explanation,
The method of
Maintaining (402), as the standby virtual function, a copy of the active virtual function may also include monitoring the configuration parameters for the active virtual function for changes or updates. Once an update or change to the active virtual function is made, that update or change is applied to the configuration parameters for the standby virtual function. In this way, the standby virtual machine operates as an up-to-date backup of the active virtual machine.
In some embodiments in which the computing system includes a plurality of active virtual functions, instantiating (302) a standby virtual function may include instantiating (404) a pool of standby virtual functions, where each standby virtual function of the pool is configured with a maximum configuration to replace any of the active virtual functions. A maximum configuration as the term is used in this specification refers to a virtual function configuration that is able to provide resources that satisfy most or all of the maximum requirements of any or most of the active virtual functions hosted by a network adapter. The maximum configuration may provide an amount of resources necessary to satisfy all or most of the requirements of any or most of the active virtual functions hosted by a network adapter. The hypervisor may instantiate a pool of standby virtual functions configured with a maximum configuration based on a determination that sufficient resources on the network adapter are available to support the pool of standby virtual functions configured with a maximum configuration. A pool of standby virtual functions may refer to one or a plurality of standby virtual functions.
As explained above, each virtual function may be a different capacity (different bandwidth capabilities, different throughput capabilities, different MIMO space size, different DMA space size, and the like). In embodiments in which each member of the pool of standby virtual functions is configured with a maximum configuration, any of the standby virtual functions may replace any of the active virtual functions on failover and no loss of performance in the virtual function communication channel need be experienced.
In some embodiments, instantiating (302) a standby virtual function may include instantiating (406) a pool of standby virtual functions, where each standby virtual function of the pool is configured with a minimum configuration. A minimum configuration as the term is used in this specification refers to a virtual function configuration that is able to provide resources that satisfy most or all of the minimum requirements of any or most of the active virtual functions hosted by a network adapter. The minimum configuration may provide the least amount of resources to satisfy the requirements of any or most of the active virtual functions hosted by a network adapter. The hypervisor may instantiate a pool of standby virtual functions configured with a minimum configuration based on a determination that there are insufficient resources on the network adapter to support a pool of standby virtual functions configured with a maximum configuration. The hypervisor may further determine that sufficient resources exist on the network adapter to support the pool of standby virtual functions configured with a minimum configuration. In embodiments in which each member of the pool of standby virtual functions is configured with a minimum configuration, any of the standby virtual functions may replace any, some, or most of the active virtual functions on failover but with an expected loss of performance in the virtual function communication channel.
The present invention may be a system, a method, and/or a computer program product. The computer program product may include a computer readable storage medium (or media) having computer readable program instructions thereon for causing a processor to carry out aspects of the present invention.
The computer readable storage medium can be a tangible device that can retain and store instructions for use by an instruction execution device. The computer readable storage medium may be, for example, but is not limited to, an electronic storage device, a magnetic storage device, an optical storage device, an electromagnetic storage device, a semiconductor storage device, or any suitable combination of the foregoing. A non-exhaustive list of more specific examples of the computer readable storage medium includes the following: a portable computer diskette, a hard disk, a random access memory (RAM), a read-only memory (ROM), an erasable programmable read-only memory (EPROM or Flash memory), a static random access memory (SRAM), a portable compact disc read-only memory (CD-ROM), a digital versatile disk (DVD), a memory stick, a floppy disk, a mechanically encoded device such as punch-cards or raised structures in a groove having instructions recorded thereon, and any suitable combination of the foregoing. A computer readable storage medium, as used herein, is not to be construed as being transitory signals per se, such as radio waves or other freely propagating electromagnetic waves, electromagnetic waves propagating through a waveguide or other transmission media (e.g., light pulses passing through a fiber-optic cable), or electrical signals transmitted through a wire.
Computer readable program instructions described herein can be downloaded to respective computing/processing devices from a computer readable storage medium or to an external computer or external storage device via a network, for example, the Internet, a local area network, a wide area network and/or a wireless network. The network may comprise copper transmission cables, optical transmission fibers, wireless transmission, routers, firewalls, switches, gateway computers and/or edge servers. A network adapter card or network interface in each computing/processing device receives computer readable program instructions from the network and forwards the computer readable program instructions for storage in a computer readable storage medium within the respective computing/processing device.
Computer readable program instructions for carrying out operations of the present invention may be assembler instructions, instruction-set-architecture (ISA) instructions, machine instructions, machine dependent instructions, microcode, firmware instructions, state-setting data, or either source code or object code written in any combination of one or more programming languages, including an object oriented programming language such as Smalltalk, C++ or the like, and conventional procedural programming languages, such as the “C” programming language or similar programming languages. The computer readable program instructions may execute entirely on the user's computer, partly on the user's computer, as a stand-alone software package, partly on the user's computer and partly on a remote computer or entirely on the remote computer or server. In the latter scenario, the remote computer may be connected to the user's computer through any type of network, including a local area network (LAN) or a wide area network (WAN), or the connection may be made to an external computer (for example, through the Internet using an Internet Service Provider). In some embodiments, electronic circuitry including, for example, programmable logic circuitry, field-programmable gate arrays (FPGA), or programmable logic arrays (PLA) may execute the computer readable program instructions by utilizing state information of the computer readable program instructions to personalize the electronic circuitry, in order to perform aspects of the present invention.
Aspects of the present invention are described herein with reference to flowchart illustrations and/or block diagrams of methods, apparatus (systems), and computer program products according to embodiments of the invention. It will be understood that each block of the flowchart illustrations and/or block diagrams, and combinations of blocks in the flowchart illustrations and/or block diagrams, can be implemented by computer readable program instructions.
These computer readable program instructions may be provided to a processor of a general purpose computer, special purpose computer, or other programmable data processing apparatus to produce a machine, such that the instructions, which execute via the processor of the computer or other programmable data processing apparatus, create means for implementing the functions/acts specified in the flowchart and/or block diagram block or blocks. These computer readable program instructions may also be stored in a computer readable storage medium that can direct a computer, a programmable data processing apparatus, and/or other devices to function in a particular manner, such that the computer readable storage medium having instructions stored therein comprises an article of manufacture including instructions which implement aspects of the function/act specified in the flowchart and/or block diagram block or blocks.
The computer readable program instructions may also be loaded onto a computer, other programmable data processing apparatus, or other device to cause a series of operational steps to be performed on the computer, other programmable apparatus or other device to produce a computer implemented process, such that the instructions which execute on the computer, other programmable apparatus, or other device implement the functions/acts specified in the flowchart and/or block diagram block or blocks.
The flowchart and block diagrams in the Figures illustrate the architecture, functionality, and operation of possible implementations of systems, methods, and computer program products according to various embodiments of the present invention. In this regard, each block in the flowchart or block diagrams may represent a module, segment, or portion of instructions, which comprises one or more executable instructions for implementing the specified logical function(s). In some alternative implementations, the functions noted in the block may occur out of the order noted in the figures. For example, two blocks shown in succession may, in fact, be executed substantially concurrently, or the blocks may sometimes be executed in the reverse order, depending upon the functionality involved. It will also be noted that each block of the block diagrams and/or flowchart illustration, and combinations of blocks in the block diagrams and/or flowchart illustration, can be implemented by special purpose hardware-based systems that perform the specified functions or acts or carry out combinations of special purpose hardware and computer instructions.
It will be understood from the foregoing description that modifications and changes may be made in various embodiments of the present invention without departing from its true spirit. The descriptions in this specification are for purposes of illustration only and are not to be construed in a limiting sense. The scope of the present invention is limited only by the language of the following claims.
Number | Name | Date | Kind |
---|---|---|---|
7209994 | Klaiber et al. | Apr 2007 | B1 |
7240364 | Branscomb et al. | Jul 2007 | B1 |
7574537 | Arndt et al. | Aug 2009 | B2 |
7613898 | Haertel et al. | Nov 2009 | B2 |
7734843 | Bender et al. | Jun 2010 | B2 |
7813366 | Freimuth et al. | Oct 2010 | B2 |
7882326 | Armstrong et al. | Feb 2011 | B2 |
7937518 | Boyd et al. | May 2011 | B2 |
7984262 | Battista et al. | Jul 2011 | B2 |
8219988 | Armstrong et al. | Jul 2012 | B2 |
8321722 | Tanaka et al. | Nov 2012 | B2 |
8327086 | Jacobs et al. | Dec 2012 | B2 |
8429446 | Hara et al. | Apr 2013 | B2 |
8533713 | Dong | Sep 2013 | B2 |
8561065 | Cunningham et al. | Oct 2013 | B2 |
8561066 | Koch et al. | Oct 2013 | B2 |
8607230 | Hatta et al. | Dec 2013 | B2 |
8621120 | Bender et al. | Dec 2013 | B2 |
8645755 | Brownlow et al. | Feb 2014 | B2 |
8677356 | Jacobs et al. | Mar 2014 | B2 |
8683109 | Nakayama et al. | Mar 2014 | B2 |
8875124 | Kuzmack et al. | Oct 2014 | B2 |
8984240 | Aslot et al. | Mar 2015 | B2 |
9032122 | Hart et al. | May 2015 | B2 |
9047113 | Iwamatsu et al. | Jun 2015 | B2 |
9304849 | Arroyo et al. | Apr 2016 | B2 |
9317317 | Graham | Apr 2016 | B2 |
9473400 | DeVilbiss | Oct 2016 | B1 |
9501308 | Arroyo et al. | Nov 2016 | B2 |
9552233 | Tsirkin et al. | Jan 2017 | B1 |
9715469 | Arroyo et al. | Jul 2017 | B1 |
9720862 | Arroyo et al. | Aug 2017 | B1 |
9720863 | Arroyo et al. | Aug 2017 | B1 |
9740647 | Arroyo et al. | Aug 2017 | B1 |
9760512 | Arroyo et al. | Sep 2017 | B1 |
20020083258 | Bauman et al. | Jun 2002 | A1 |
20030050990 | Craddock et al. | Mar 2003 | A1 |
20030204648 | Arndt | Oct 2003 | A1 |
20040064601 | Swanberg | Apr 2004 | A1 |
20040205272 | Armstrong et al. | Oct 2004 | A1 |
20040243994 | Nasu | Dec 2004 | A1 |
20060179177 | Arndt et al. | Aug 2006 | A1 |
20060195618 | Arndt et al. | Aug 2006 | A1 |
20060195620 | Arndt et al. | Aug 2006 | A1 |
20060281630 | Bailey et al. | Dec 2006 | A1 |
20070157197 | Neiger et al. | Jul 2007 | A1 |
20070260768 | Bender et al. | Nov 2007 | A1 |
20080005383 | Bender et al. | Jan 2008 | A1 |
20080114916 | Hummel et al. | May 2008 | A1 |
20080147887 | Freimuth et al. | Jun 2008 | A1 |
20090133016 | Brown et al. | May 2009 | A1 |
20090133028 | Brown et al. | May 2009 | A1 |
20090249366 | Sen et al. | Oct 2009 | A1 |
20090276773 | Brown et al. | Nov 2009 | A1 |
20100036995 | Nakayama et al. | Feb 2010 | A1 |
20100250824 | Belay | Sep 2010 | A1 |
20100262727 | Arndt | Oct 2010 | A1 |
20110197003 | Serebrin et al. | Aug 2011 | A1 |
20110320860 | Coneski et al. | Dec 2011 | A1 |
20120042034 | Goggin et al. | Feb 2012 | A1 |
20120131232 | Brownlow | May 2012 | A1 |
20120131576 | Hatta et al. | May 2012 | A1 |
20120137288 | Barrett et al. | May 2012 | A1 |
20120137292 | Iwamatsu et al. | May 2012 | A1 |
20120151473 | Koch et al. | Jun 2012 | A1 |
20120167082 | Kumar et al. | Jun 2012 | A1 |
20120179932 | Armstrong et al. | Jul 2012 | A1 |
20120191935 | Oberly, III | Jul 2012 | A1 |
20120246644 | Hattori | Sep 2012 | A1 |
20120265910 | Galles | Oct 2012 | A1 |
20130086298 | Alanis et al. | Apr 2013 | A1 |
20130159572 | Graham et al. | Jun 2013 | A1 |
20130191821 | Armstrong et al. | Jul 2013 | A1 |
20140149985 | Takeuchi | May 2014 | A1 |
20140181801 | Voronkov et al. | Jun 2014 | A1 |
20140245296 | Sethuramalingam et al. | Aug 2014 | A1 |
20140281263 | Deming et al. | Sep 2014 | A1 |
20140351471 | Jebson et al. | Nov 2014 | A1 |
20140372739 | Arroyo et al. | Dec 2014 | A1 |
20140372789 | Arroyo | Dec 2014 | A1 |
20140372795 | Graham | Dec 2014 | A1 |
20150006846 | Youngworth | Jan 2015 | A1 |
20150052282 | Dong | Feb 2015 | A1 |
20150120969 | He et al. | Apr 2015 | A1 |
20150193248 | Noel et al. | Jul 2015 | A1 |
20150193250 | Ito et al. | Jul 2015 | A1 |
20150229524 | Engebretsen et al. | Aug 2015 | A1 |
20150301844 | Droux | Oct 2015 | A1 |
20150317274 | Arroyo et al. | Nov 2015 | A1 |
20150317275 | Arroyo et al. | Nov 2015 | A1 |
20160019078 | Challa | Jan 2016 | A1 |
20160246540 | Blagodurov et al. | Aug 2016 | A1 |
20160350097 | Mahapatra et al. | Dec 2016 | A1 |
20170046184 | Tsirkin et al. | Feb 2017 | A1 |
20170199768 | Arroyo et al. | Jul 2017 | A1 |
20170242720 | Anand et al. | Aug 2017 | A1 |
20170242756 | Arroyo et al. | Aug 2017 | A1 |
20170249136 | Anand et al. | Aug 2017 | A1 |
Number | Date | Country |
---|---|---|
101488092 | Jul 2009 | CN |
104737138 | Jun 2015 | CN |
2012-113660 | Jun 2012 | JP |
5001818 | Aug 2012 | JP |
Entry |
---|
Ajila et al., “Efficient Live Wide Area VM Migration With IP Address Change Using Type II Hypervisor”, 2013 IEEE 14th International Conference on Information Reuse and Integration (IRI2013), Aug. 2013, pp. 372-379, IEEE Xplore Digital Library (online), DOI: 10.1109/IRI.2013.6642495. |
PCI-SIG, “Single Root I/O Virtualization and Sharing Specification-Revision 1.0”, Sep. 2007, PCI-SIG Specifications Library, pcisig.com (online), URL: pcisig.com/specifications/iov/single_root/. |
Axnix et al. “IBM z13 firmware innovations for simultaneous multithreading and I/O virtualization”, IBM Journal of Research and Development, Jul./Sep. 2015, vol. 59, No. 4/5, 11-1, International Business Machines Corporation (IBM), Armonk, NY. |
Salapura et al., “Resilient cloud computing”, IBM Journal of Research and Development, Sep./Oct. 2013, vol. 57, No. 5, 10-1, 12 pages, International Business Machines Corporation (IBM), Armonk, NY. |
Challa, “Hardware Based I/O Virtualization Technologies for Hypervisors, Configurations and Advantages—A Study”, 2012 IEEE International Conference on Cloud Computing in Emerging Markets (CCEM), Oct. 2012, pp. 99-103, IEEE Xplore Digital Library (online), DOI: 10.1109/CCEM.2012.6354610. |
ROC920150333US1, Appendix P; List of IBM Patent or Applications Treated as Related, Jan. 4, 2017, 2 pages. |
Xu et al., SRVM: Hypervisor Support for Live Migration with Passthrough SR-IOV Network Devices, Proceedings of the12th ACM SIGPLAN/SIGOPS International Conference on Virtual Execution Environments (VEE'16), Apr. 2016, pp. 65-77, ACM New York, NY, USA. |
Huang et al., Nomad: Migrating OS-bypass Networks in Virtual Machines, Proceedings of the 3rd International Conference on Virtual Execution Environments (VEE'07), Jun. 2007, pp. 158-168, ACM New York, NY, USA. |
ROC920150333US1 , Appendix P; List of IBM Patent or Applications Treated as Related, May 26, 2017, 2 pages. |
ROC920150333US1, Appendix P; List of IBM Patent or Applications Treated as Related, Jul. 19, 2017, 2 pages. |
Xu et al., “Multi-Root I/O Virtualization Based Redundant Systems”, 2014 Joint 7th International Conference on Soft Computing and Intelligent Systems (SCIS) and 15th International Symposium on Advanced Intelligent Systems (ISIS), Dec. 2014, pp. 1302-1305, IEEE Xplore Digital Library (online), DOI: 10.1109/SCIS-ISIS.2014.7044652. |
U.S. Appl. No. 15/299,512, to Jesse P. Arroyo et al., entitled, Migrating MMIO From a Source I/O Adapter of a Computing System to a Destination I/O Adapter of the Computing System, assigned to International Business Machines Corporation, 35 pages, filed Oct. 21, 2016. |
U.S. Appl. No. 15/467,183, to Jesse P. Arroyo et al., entitled, Migrating Interrupts From a Source I/O Adapter of a Computing System to a Destination I/O Adapter of The Computing System, assigned to International Business Machines Corporation, 35 pages, filed Mar. 23, 2017. |
U.S. Appl. No. 15/467,025, to Jesse P. Arroyo et al., entitled, Migrating Interrupts From a Source I/O Adapter of a Source Computing System to a Destination I/O Adapter of a Destination Computing System assigned to International Business Machines Corporation, 38 pages, filed Mar. 23, 2017. |
U.S. Appl. No. 15/467,052, to Jesse P. Arroyo et al., entitled, Migrating MMIO From a Source I/O Adapter of a Source Computing System to a Destination I/O Adapter of a Destination Computing System, assigned to International Business Machines Corporation, 38 pages, filed Mar. 23, 2017. |
U.S. Appl. No. 15/617,170, to Jesse P. Arroyo et al., entitled, Migrating MMIO From a Source I/O Adapter of a Computing System to a Destination I/O Adapter of The Computing System, assigned to International Business Machines Corporation, 36 pages, filed Jun. 8, 2017. |
Number | Date | Country | |
---|---|---|---|
20170242763 A1 | Aug 2017 | US |