Fast auto-balancing AC bridge

Information

  • Patent Grant
  • 10013015
  • Patent Number
    10,013,015
  • Date Filed
    Tuesday, February 10, 2015
    9 years ago
  • Date Issued
    Tuesday, July 3, 2018
    6 years ago
Abstract
A system and method for fast, automatic balancing of an AC bridge utilizes a two-stage process. During the first stage, the phase of the bridge voltage is matched, while during the second stage, the amplitude is minimized. The voltage matching process is based on halving the range of measured voltage amplitudes at each step, using two samples to identify the next half-range, resulting in an n-step recursive algorithm with “n” defining the resolution of the process. As such, the phase-matching process requires only three samples per step, and only four steps for 1° resolution. Consequently, the computational power needed to carry out the two-stage process is minimal, requiring only comparison of the three sampled voltages, thereby resulting in a balancing process that is performed fast and efficiently.
Description
TECHNICAL FIELD

Generally, the present invention relates to AC (alternating current) devices. In particular, the present invention relates to AC bridge devices. More particularly, the present invention relates to an AC bridge that is configured to be balanced in a fast, automated manner.


BACKGROUND ART

The balancing of AC (alternating current) bridges is a process that is critical in automated measurement and sensing systems, such as those used to measure/sense small changes in inductance/resistance. In addition, AC bridges of various forms have been utilized in various measurement and sensing systems, such as automatic testing systems, which are used to monitor such inductance/resistance changes.


However, such AC bridge circuits suffer from numerous technical problems. The primary problem of such bridge circuits is that of obtaining a minimum voltage and minimum phase at a middle point of the AC bridge circuit itself. In order to achieve a minimum voltage/phase at the middle point of the AC bridge, the AC bridge must be balanced, using various methods and techniques. For example, iterative methods to minimize the middle point voltage have been used. In other methods, the minimum point voltage is obtained by performing a sequence of complex computations that use a few, accurately sampled data points. With regard to the iterative method, the minimization of the middle-point voltage is achieved by computational steps performed by a computer based on a sequence of steps, which often results in the performance of many steps, which results in a slow convergence. Digital AC bridges that utilize a computer control system to carry out such iterative methods have also been developed. These digital AC bridges also provide advantages over that of conventional AC bridges, by providing measurements that have high accuracy, reproducibility, reliability, and flexibility. For example, such digital AC bridges may utilize a microprocessor that executes a least mean square (LMS) adaptive algorithm in an iterative manner to balance the bridge. However, while the LMS method is effective in balancing the AC bridge, the accuracy of the AC bridge balancing may be further improved by employing an intelligent neuro-fuzzy-based LMS module.


Iterative balancing methods, such as the LSM method, however, can be very slow as more computations are required for each step. To overcome the drawbacks of the iterative method, a non-iterative approach has also been investigated. Such non-iterative methods are desirable, as they speed-up the operation of the controller used to minimize the middle-point voltage by using Fourier coefficients of an out-of-phase voltage from the AC bridge. However, such non-iterative methods require a complicated digital signal processing (DSP) core or computational unit to carry out the complex computations and to perform the accurate data sampling that is required. As such, existing methods for balancing an AC bridge generally require highly complex computing systems, or perform balancing operations that are unacceptably slow.


Therefore, there is a need for a fast, automatic balancing AC bridge, which allows the AC bridge to measure/sense small inductance changes. In addition, there is a need for a system and method for a fast, automatic balancing AC bridge, which adds a synthetic phase offset to improve the accuracy of the phase measurement that is performed to balance the AC bridge. Furthermore, there is a need for a method for fast, automatic balancing of an AC bridge, which is based on trigonometric functions or formulas. Additionally, there is a need for a fast, automatic balancing AC bridge, whereby the balance parameters used to balance the AC bridge are analytically computed by a computer or any other suitable processing unit.


SUMMARY OF THE INVENTION

In light of the foregoing, it is a first aspect of the present invention to provide a simple, fast and accurate system and method for balancing an AC bridge for use in many applications.


It is another aspect of the present invention to provide a system and method that provide phase and voltage matching stages to match the AC bridge using a minimum number of steps.


It is yet another aspect of the present invention to provide a method of balancing an AC bridge comprising providing an AC bridge having a first AC voltage source and a second AC voltage source, wherein a predetermined impedance and an impedance to be determined are in series with the first and second AC voltage sources, such that a node defining a middle voltage is positioned between the predetermined impedance and the impedance to be determined; maintaining a voltage magnitude and a voltage phase angle of the first voltage at fixed values; adjusting a phase angle of the second voltage source, such that the middle voltage is minimized; and adjusting a magnitude of the second voltage source, such that the middle voltage is further minimized.





BRIEF DESCRIPTION OF THE DRAWINGS

These and other features and advantages of the present invention will become better understood with regard to the following description, appended claims, and accompanying drawings wherein:



FIG. 1 is a schematic diagram of the components provided by a fast, automatic balancing AC bridge in accordance with the concepts of the present invention; and



FIG. 2 is a block diagram of a magnitude and phase-matching process utilized by the AC bridge of FIG. 1 for fast, automatic balancing of the AC bridge in accordance with the concepts of the present invention.





DETAILED DESCRIPTION OF THE INVENTION

A fast, automatic balancing AC (alternating current) bridge is generally referred to by numeral 10, as shown in FIG. 1 of the drawings. It should be appreciated that the AC bridge 10 is utilized to measure or detect changes in various phenomena of a device under test (DUT), such as changes in resistance or impedance. However, it should be appreciated that for the purposes of the following discussion, the AC bridge 10 is used to analyze a device under test (DUT), which comprises an impedance Z. Specifically, the AC bridge 10 includes AC (alternating current) voltage sources, denoted as v1 and v2. The voltage source v1 is placed in series connection with capacitor C1, resistor R, impedance Z and capacitor C2, and voltage source v2. The voltage sources v1 and v2 are coupled to ground 12 to complete the series connection. Disposed between resistor R and impedance Z is a node 20, where voltage Vm is denoted. Coupled to node 20 is a series coupled high-pass filter 30, high-pass filter 40, and an RMS (root-mean squared) component 50. Coupled in series with RMS component 50 at node 60 is a tracking component 70, which is configured to carry out the steps of a phase and voltage matching process to be discussed. The tracking component 70 is comprised of a phase tracker component 80 and a voltage magnitude tracker component 90. In one aspect, the phase tracker component 80 and the magnitude tracker 90 may be configured to operate in parallel with each other. In addition, nodes 100 and 110 provided at the output of the phase tracker component 80 and the magnitude tracker component 90, respectively, are coupled to a driver component 120. The output of the driver component 120 is coupled to the voltage source v2. Coupled between the magnitude tracker component 90 and the voltage source v1 is a reference signal generator 150. It should also be appreciated that the phase tracker component 80 and the magnitude tracker component 90 are coupled to the reference signal generator 150. The phase tracker component 80 and the magnitude tracker component 90 operate to minimize the voltage Vm at node 20 by providing a modified reference signal that is output by the reference signal 150, which is then applied to the voltage source v2. That is, the phase and magnitude of the applied signal to the voltage source v2 via the reference signal generator 150 is expressed with respect to a reference signal generated by the signal generator 150. It should also be appreciated that the technique of the present invention utilizes two stages of matching to reach bridge balance condition with minimum number of steps. Moreover, it should be appreciated that the tracking component 70 and reference signal generator 150 may be implemented in computer software, computer hardware or a combination of both. It should be further appreciated that the tracking component 70 may be interfaced with the AC bridge 10 at the node 20 via the HP filters 30,40 and the RMS component 50.


Injected voltages are defined as v1=V1 cos(ωt) and v2=V2 cos(ωt+θ), with the phase angle difference between the two voltages being defined by θ. As such, the magnitude of V1 is kept constant by the signal output by the reference signal generator 150, while the magnitude of V2 and the phase angle θ are adjusted independently to obtain a minimum voltage at the middle point (Vm) of the AC bridge 10. Based on the phase difference and the combination of the two voltages V1 and V2, the voltage at the middle point Vm of the AC bridge 10 in the phase domain is defined as:











V
m

=




V
2


R


R
+
Z


+



V
1


Z


R
+
Z




,




(
1
)








where the unknown impedance to be identified of the DUT is defined as:

Z=Za+jZb  (2)

By substituting equation (2) into equation (1) the middle point voltage is now defined as:







V
m

=




V
2


R


R
+
Z


+



V
1


R
+
Z




(


cos





θ

+

j





sin





θ


)




(


Z
a

+

j






Z
b



)

.








Thus, the middle point voltage may be expressed as:

Vm=f(R,Z)V′  (3)

where f(R,Z) is a complex function of the impedance Z of the device under test (DUT) and the fixed resistor R; while V′ is a function of the voltage sources (V1 and V2), as well as the bridge impedances. The magnitude of V′ is:












V




=





V
2
2



R
2


+


V
1
2





Z


2


+

2


V
1



V
2



R


(



Z
a


cos





θ

+


Z
b


cos





θ

+


Z
b


sin





θ


)





.





(
4
)








Because the other bridge impedances are constant, it is sufficient to minimize V′.


Control Algorithm


The process for minimizing the voltage Vm at the middle point of the AC bridge 10 that is carried out by the tracking component 70 is performed by setting the voltage V1 to a fixed amplitude/magnitude with zero phase angle, and adjusting the amplitude/magnitude of V2 and adjusting its associated phase angle θ using a minimization process to be discussed. Specifically, the minimization process is performed in two sequential stages or steps, whereby a phase angle matching process is performed and then a voltage minimization process is performed. As such, the first stage matches the phase angle of v2 to minimize the voltage in equation (4). The second stage minimizes the magnitude of V′ by setting the magnitude V2 of v2. The following discussion presents the phase-matching process, which is then followed by a discussion of the voltage minimization process, as shown in FIG. 2. It should be appreciated that the minimization process carried out by the tracking component 70 may be embodied in hardware, software or a combination of both, and executed using any suitable computing system.


A. Phase Matching


During the phase angle matching stage, the voltage Vm is minimized with a minimum number of samples and steps. The purpose of the minimization process is to find the phase angle θ that will minimize V′. During this part of the process, the amplitude/magnitude of v2 is kept constant. V′ may be simplified into a much simpler form as:

|V′(θ)|=√{square root over (a+b cos θ+c sin θ)}  (5)

where a, b and c are constants that are defined based on voltages V1 and V2. The three voltage samples are taken at three equally-spaced phase angles (although other phase angle spacing may be used) for each step, which are defined as:













V




(

1
,
i

)


=


V




(

θ
i

)











V




(

2
,
i

)


=


V




(


θ
i

+


band
i

2


)










V




(

3
,
i

)


=


V




(


θ
i

+

band
i


)



,




(
6
)








where θi is the base phase for the ith step and bandi is the phase angle searching band or range for the ith step.


In the first step, the range (i.e. band) between 0° and 360° needs to be considered for the search. The voltage measurement is sampled at 0°, 120° and 240°. The three voltage samples are compared and depending on the relation between them, a mode is defined. There are six possible modes that are defined based on three voltage measurements, as shown in Table I. The condition associated with each mode narrows the phase angle searching band or range to 60°.









TABLE I







Definition of Modes in the First Step:










Mode
Sample Relation







1
V′(3, 1) > V′(2, 1) > V′(1, 1)



2
V′(3, 1) > V′(1, 1) > V′(2, 1)



3
V′(2, 1) > V′(3, 1) > V′(1, 1)



4
V′(2, 1) > V′(1, 1) > V′(3, 1)



5
V′(1, 1) > V′(3, 1) > V′(2, 1)



6
V′(1, 1) > V′(2, 1) > V′(3, 1)










Table II below lists the 6 modes and their corresponding phase angle shift (shifti) that is required at each step, which is denoted by “i”. This phase shift defines the lower limit of the phase angle that will minimize the middle point voltage. The upper limit is shifti plus the span of a mode. The new effect of the first step is to narrow the search to a 60° range between shifti and shifti+60°.









TABLE II







Definition of Phase Shift for each Step:















Mode
6
5
2
1
3
4







shifti
3segi
2segi
3segi
segi
−segi
−2segi










The base phase for the second step is defined based on the first step base phase and the corresponding phase shift due to the first three samples mode. The ith step base phase for i>1 is defined as:

θii-1+shifti-1  (7)


In the first step, θ1=0 and band1=240°. In each subsequent step i>1 three samples are taken within the range, whereby, one is taken at the starting base phase θi; a second is taken in the middle of the range (θi+bandi/2); and a third is taken at the end point of the range (θi+bandi). The three sampled voltages V′(1, i), V′(2, i) and V′(3, i) are compared with the one in the previous step. However, in other embodiments more or fewer sampled voltages may be compared. There are four possible relations between the three voltage measurements, as shown in Table III. For steps >1, bandi and segi are defined based on the following recursive formulas:










band
i

=

seg

i
-
1






(
8
)








seg
i

=


band
i

4


,




(
9
)








where segi is the phase angle range, which is defined with respect to the related modes in the ith step; in the first step segi=60°.









TABLE III







Definition of Modes in the step >1:










Mode
Sample Relation







1
V′(3, 1) > V′(2, 1) > V′(1, 1)



2
V′(3, 1) > V′(1, 1) > V′(2, 1)



5
V′(1, 1) > V′(3, 1) > V′(2, 1)



6
V′(1, 1) > V′(2, 1) > V′(3, 1)










Based on the method discussed, the phase-matching error after ηθ phase-matching steps is:










Phase





error

=



60

°


4


η
θ

-
1



.





(
10
)








The number of the required samples to perform the ηθ steps is 3ηθ.


B. Magnitude Matching


At the end of the phase-matching stage or step, the amplitude of the middle node voltage Vm is the minimum possible value achieved during the phase-matching procedure. The phase of the v2 signal at this stage is θmin, which satisfies the minimum value of equation (5). θmin is provided as:










θ

m





i





n


=



tan

-
1




(


Z
b


Z
a


)


.





(
11
)








By substituting equation (11) into equation (4), |v′| at the end of the phase-matching procedure is:













V




(

θ

m





i





n


)




=





V
2
2



R
2


+


V
1
2





Z


2


+

2


V
1



V
2


R


(


Z
a



cos


(


tan

-
1





Z
b


Z
a



)



)


+


Z
b



sin


(


tan

-
1





Z
b


Z
a



)





.





(
12
)








In addition, equation (12) can be simplified as:

|V′|=|V2R+V1|Z∥  (13)

There will be two samples for each step, which are defined in the following:









{







V




(

1
,
i

)


=


V




(


V

m





i





n




(
i
)


)










V




(

2
,
i

)


=


V




(


V

ma





x




(
i
)


)






,





(
14
)








where Vmin(i) and Vmax(i) are the minimum and maximum voltages of the V2 for the ith step. For the first step, the minimum and maximum voltage is defined as:









{







V

m





i





n




(
1
)


=

Vd

m





i





n










V

ma





x




(
2
)


=

Vd

ma





x






,





(
15
)








where Vdmin and Vdmax are the minimum and maximum achievable voltage the hardware can produce for v2.


There are three different trends of high frequency voltage samples that are based on the relationship between them. The following three different scenarios occur in each step:









{







V

m





i





n




(
i
)


<

V
2

<




V

ma





x




(
i
)


2



:






if







V




(


V

m





i





n




(
i
)


)



<


V




(


V

ma





x




(
i
)


)









V
2

=






V

m





i





n




(
i
)


+


V

ma





x




(
i
)



2



:



  


if







V




(


V

m





i





n




(
i
)


)



=


V




(


V

ma





x




(
i
)


)












V

ma





x




(
i
)


2

<

V
2

<



V

ma





x




(
i
)




:






if







V




(


V

m





i





n




(
i
)


)



>


V




(


V

ma





x




(
i
)


)






.





(
16
)







The magnitude matching steps start by obtaining two samples indicated as V′(Vmin(1)) and V′(Vmax(1)). The whole range of possible voltages is divided into two regions. Comparison of the magnitudes of the two samples indicates the region where the minimum amplitude occurs. In the next step, the specified region will be divided into two separate regions. In each step, the size of the regions that contains the minimum point becomes smaller. The sampling range for steps >1 is defined as follows:









{







{






V

m





i





n




(
i
)


=


V
min



(

i
-
1

)










V

ma





x




(
i
)


=




V

m





i





n




(

i
-
1

)


+


V

ma





x




(

i
-
1

)



2





}



:






if







V




(


V

m





i





n




(
i
)


)



<


V




(


V

ma





x




(
i
)


)










{






V

m





i





n




(
i
)


=


V

m





i





n




(

i
-
1

)










V

ma





x




(
i
)


=


V

ma





x




(

i
-
1

)






}



:






if







V




(


V

m





i





n




(
i
)


)



=


V




(


V

ma





x




(
i
)


)










{






V

m





i





n




(
i
)


=




V

m





i





n




(

i
-
1

)


+


V

ma





x




(

i
-
1

)



2









V

ma





x




(
i
)


=


V

ma





x




(

i
-
1

)






}



:






if







V




(


V

m





i





n




(
i
)


)



>


V




(


V

ma





x




(
i
)


)






.





(
17
)








The magnitude matching error due to ηv steps of magnitude matching procedure is defined as:










Magnitude





error

=



Vd

ma





x



2

η
v



.





(
18
)








At the end of the magnitude matching process, the magnitude of V′ will be the minimum achievable voltage magnitude based on the number of matching steps. The search algorithm is summarized in FIG. 2.


C. Signal Matching Error


The magnitude and phase of v2 is set in several steps to minimize the amplitude of the voltage at the middle point of the network. By substituting the relative magnitude and phase errors in equation (4), the maximum error presented on the middle point can be expressed as:










V
m



err

=






(




V
1




Z



R

±


Vd

ma





x



2

η
v




)

2



R
2


+


V
1
2





Z


2


+

2


V
1



R


(




V
1




Z



R

±


Vd

ma





x



2

η
v




)




f


(

η
θ

)







R
+
Z










where ηv is the number of magnitude matching procedure and ηθ is the number of phase-matching procedure. f(ηθ) is expressed as:










f


(

η
θ

)


=



Z
a



cos


(



tan

-
1




(


Z
b


Z
a


)


+


60

°


4


η
θ

-
1




)



+


Z
b




sin


(



tan

-
1




(


Z
b


Z
a


)


+


60

°


4


η
θ

-
1




)


.







(
19
)








The objective of the phase and magnitude matching procedure is to minimize the magnitude of Vm. The resultant magnitude of the voltage at the end of the phase and magnitude matching procedure is dependent on the number of the steps of the matching process, network impedance, as well as the upper band of the voltage, which hardware can produce at v2.


The performance of the bridge balancing method for a device under test (DUT) is evaluated, where V1=1V, R=100 Ohms, DUT=100 Ohms+10 nF and the frequency of operation is 100 kHz. The performance of the phase and magnitude matching method are first simulated. The matching speed and accuracy is then compared with general LMS method. In the second step, the bridge is set ups in the laboratory and the phase and magnitude of the voltage sources are controlled with a programmed algorithm in Labview. The Labview in 15 steps searches for phase and magnitude of v2 in order to decrease the amplitude of the middle node voltage. The impedance of the device under test (DUT) at the frequency of operation is: Z=100−j159.15 (20).


Simulation to Find the Proper Phase


In order to find the proper phase of v2, 8 steps (ηθ) are performed in the phase-matching procedure; similarly 8 steps (ηv) in magnitude matching procedure are accomplished to find the proper magnitude of v2. At the end of each step, the difference between the upper and lower phase searching bands are decreased. As presented, after 5 steps the accuracy of the phase-matching procedure is better than 1°.


At the end of each step, the difference between the upper and the lower magnitude searching band is decreased. After 8 steps, the accuracy of the magnitude matching procedure is better than 10 mV. The magnitude and phase of v2 at the end of the phase and magnitude matching procedure are found to be 1.07 V and 237.9°.


With regard to performance, in the method of the present invention, the total number of phase matching and magnitude matching is 16. For the general LMS matching method, the total number of the matching procedure is selected to be 16. Based on the presented results, the method of present invention has less perturbation as compared to the general LMS matching method; moreover the magnitude of V′ at the end of the matching method is 0.068 V, while this magnitude for the general LMS matching method is 0.959 V, which shows better matching accuracy for the method of the present invention with the same number of matching steps.


Therefore, the method of the present invention is based on simple step-by-step algorithms for minimization of voltage based on a phase-matching process that is followed by an n-step division process for the minimization of amplitude. In each step in the phase minimization process, samples of the phase are taken at three points (although more or fewer may be used), and estimates of the range in which the minimum phase resides are determined, thus narrowing the range in each step. Four steps are sufficient for an accuracy of one degree, but higher accuracy is possible with the performance of additional estimation steps (however, fewer steps may also be used). The implementation of the method of the present invention is simple since the only computation required is the comparison of three samples (although any other number of samples may be used). Minimization of the amplitude is performed by division of the possible voltage range into two sub-ranges, and identification of the half-range in which the minimization resides as input to the next step.


Based on the foregoing, the advantages of the present invention are readily apparent. The main advantage of this invention is to provide a method for automatic AC bridge balancing that is fast and efficient. Still another advantage of the present invention is to provide a fast, automatically balancing AC bridge that uses phase and voltage matching techniques, which requires a low computational load. Yet another advantage of the present invention is to provide a fast, automatically balancing AC bridge that can be balanced more efficiently than that using general LMS balancing methods.


Thus, it can be seen that the objects of the present invention have been satisfied by the structure and its method for use presented above. While in accordance with the Patent Statutes, only the best mode and preferred embodiment has been presented and described in detail, it is to be understood that the present invention is not limited thereto or thereby. Accordingly, for an appreciation of the true scope and breadth of the invention, reference should be made to the following claims.

Claims
  • 1. A method of balancing an AC bridge comprising: providing an AC bridge having a first AC voltage source and a second AC voltage source, wherein a predetermined impedance and an impedance to be determined are in series with said first and second AC voltage sources, such that a node defining a middle voltage is positioned between said predetermined impedance and said impedance to be determined;maintaining a voltage magnitude and a voltage phase angle of said first voltage at fixed values;adjusting a phase angle of said second voltage source, such that said middle voltage is minimized; andadjusting a magnitude of said second voltage source, such that said middle voltage is further minimized,wherein said adjusting of said magnitude of said second voltage source further comprises: dividing a predetermined range of said magnitudes of said second voltage source into at least two sub-ranges;performing a plurality of samples of said middle voltage when said second voltage source is at a maximum magnitude and at a minimum magnitude;identifying a sub-range in which said minimum magnitude of said middle voltage occurs;dividing said identified sub-range into two or more sub-sub ranges;performing a plurality of samples of said middle voltage when said second voltage source is at each of two magnitudes within each sub-sub range; andidentifying a minimized magnitude for said second voltage source, which minimizes said middle voltage.
CROSS-REFERENCE TO RELATED APPLICATION

This application claims the benefit of U.S. Provisional Application No. 61/937,796 filed on Feb. 10, 2014, the content of which is incorporated herein by reference.

US Referenced Citations (2)
Number Name Date Kind
2749510 Rively Jun 1956 A
6608492 Entenmann Aug 2003 B1
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Entry
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Related Publications (1)
Number Date Country
20150227159 A1 Aug 2015 US
Provisional Applications (1)
Number Date Country
61937796 Feb 2014 US