Fast-charging battery pack including a charging switch

Information

  • Patent Grant
  • 12166186
  • Patent Number
    12,166,186
  • Date Filed
    Friday, September 1, 2023
    a year ago
  • Date Issued
    Tuesday, December 10, 2024
    12 days ago
Abstract
One embodiment provides a battery pack including a housing, a plurality of battery cells supported by the housing, and a terminal block. The terminal block is configured to be coupled to a power tool to provide operating power from the plurality of battery cells to the power tool. The terminal block has a positive power terminal, a charging terminal, and a ground terminal. The battery pack also includes a charging circuit provided between the charging terminal and the plurality of battery cells. The charging circuit is configured to receive and transfer charging current above 12 Amperes to the plurality of battery cells during charging. The charging circuit includes a charging switch and a fuse coupled between the charging terminal and the charging switch.
Description
FIELD OF THE INVENTION

The present invention relates to battery packs for electrical devices, such as power tools, and, more particularly, to such battery packs capable of fast charging.


BACKGROUND OF THE INVENTION

Cordless electrical devices (e.g., electrical devices, such as power tools, outdoors tools, other motorized devices, non-motorized devices, etc.) have a limited run-time compared to comparable corded electrical devices. The run-time of cordless electrical devices generally depends on the capacity (ampere-hours (Ah)) of the associated battery pack. The capacity of a battery pack depends on the capacity of the individual battery cells and the number and configuration of those cells. For example, a “5S1P” battery pack includes one string of five series-connected battery cells. With battery cells having a capacity of about 1.3 Ah, the capacity of the 5S1P battery pack is about 1.3 Ah. The capacity of a “5S2P” battery pack (having two parallel-connected strings of five series-connected battery cells) is about 2.6 Ah. The capacity of a “5S3P” battery pack (having three parallel-connected strings of five series-connected battery cells) is about 3.9 Ah. The capacity of the 1P, 2P, and 3P packs will vary based on the capacity of the individual battery cells.


The charging time of a battery pack generally depends on the amount of current provided by the charger (and accepted by the battery pack), the capacity of the battery cells, and the overall capacity of the battery pack. For example, a battery pack including battery cells having a capacity of 1.3 Ah being charged by a charger providing a charging current of 3 Amps (A) takes about 35-40 minutes to reach full charge. The higher the capacity of the battery cells, the longer the charging time to fully charge the battery pack. With the same 3 A charging current, the 3.9 Ah battery pack takes about 75-80 minutes to reach full charge.


While it may be desirable to increase the charging current to decrease the time to charge battery packs with higher capacity cells (e.g., provide a charging current of between about 6 A and about 18 A for battery packs with cells having a capacity of between about 3 Ah and about 4 Ah), components of the battery pack (e.g., the printed circuit board (PCB), a fuse, a field effect transistor (FET)) may not be capable of handling increased current (e.g., more than about 6 A) without adverse effects, such as excessive heating, wear, irreversible damage, etc. Accordingly, there may be a need for battery packs having charging circuitry and components able to handle charging current in the range of more than about 6 A to about 18 A or even higher.


SUMMARY OF THE INVENTION

One embodiment provides a battery pack including a housing, a plurality of battery cells supported by the housing, and a terminal block. The terminal block is configured to be coupled to a power tool to provide operating power from the plurality of battery cells to the power tool. The terminal block has a positive power terminal, a charging terminal, and a ground terminal. The battery pack also includes a charging circuit provided between the charging terminal and the plurality of battery cells. The charging circuit is configured to receive and transfer charging current above 12 Amperes to the plurality of battery cells during charging. The charging circuit includes a charging switch and a fuse coupled between the charging terminal and the charging switch.


In some constructions, the charging switch may include a N-Channel FET. The fuse may have at least about a 8 A rating; in some constructions, the fuse may have about a 20 A rating. The battery pack may include an electronic controller, the controller being configured to control the FET to selectively connect the charging terminal to the battery cells.


Another embodiment provides a battery pack charging system including a charger configured to provide a charging current between about 6 Amperes and about 20 Amperes and a battery pack detachably connectable to the charger and configured to be charged by the charger. The battery pack includes a plurality of battery cells and a terminal block. The terminal block is configured to be coupled to a power tool to provide operating power from the plurality of battery cells to the power tool. The terminal block has a positive power terminal, a charging terminal, and a ground terminal. The battery pack also includes a charging circuit provided between the charging terminal and the plurality of battery cells. The charging circuit is configured to receive and transfer charging current above 12 Amperes to the plurality of battery cells during charging. The charging circuit includes a charging switch and a fuse coupled between the charging terminal and the charging switch.


Other independent aspects of the invention may become apparent by consideration of the detailed description and accompanying drawings.





BRIEF DESCRIPTION OF THE DRAWINGS


FIGS. 1A-1E are perspective views of battery packs for electrical devices, such as power tools, outdoors tools, other motorized devices, non-motorized devices, etc.



FIG. 2 is a block diagram of a battery pack connected to a fast-charging battery charger.



FIG. 3 is a block diagram of a charging circuit of the battery pack.



FIG. 4 is a schematic illustration of the charging circuit of FIG. 3 on a circuit board of the battery pack.



FIG. 5 is a flowchart illustrating a method of enabling fast charging of the battery pack.



FIG. 6 is a flowchart illustrating a method of disabling fast charging of the battery pack.



FIG. 7 is a block diagram of a charging circuit of the battery pack.



FIG. 8 is a block diagram of a charging circuit of the battery pack.



FIG. 9 is a schematic illustrating the charging circuit of FIG. 7 on a circuit board of the battery pack.





DETAILED DESCRIPTION

Before any independent embodiments of the invention are explained in detail, it is to be understood that the invention is not limited in its application to the details of construction and the arrangement of components set forth in the following description or illustrated in the following drawings. The invention is capable of other independent embodiments and of being practiced or of being carried out in various ways. Also, it is to be understood that the phraseology and terminology used herein is for the purpose of description and should not be regarded as limiting.


Use of “including” and “comprising” and variations thereof as used herein is meant to encompass the items listed thereafter and equivalents thereof as well as additional items. Use of “consisting of” and variations thereof as used herein is meant to encompass only the items listed thereafter and equivalents thereof.


Relative terminology, such as, for example, “about”, “approximately”, “substantially”, etc., used in connection with a quantity or condition would be understood by those of ordinary skill to be inclusive of the stated value and has the meaning dictated by the context (for example, the term includes at least the degree of error associated with the measurement of, tolerances (e.g., manufacturing, assembly, use) associated with the particular value, etc.). Such terminology should also be considered as disclosing the range defined by the absolute values of the two endpoints. For example, the expression “from about 2 to about 4” also discloses the range “from 2 to 4”.


The relative terminology may refer to plus or minus a percentage (e.g., 1%, 5%, 10% or more) of an indicated value. For example, with a 10% range, “about 20 Volts” may indicate a range of 18 Volts (V) to 22 V, and “about 1%” may mean from 0.9-1.1. Other meanings of relative terms may be apparent from the context, such as rounding off, so, for example “about 20 V” may also mean from 19.5 V to 20.4 V.


Also, the functionality described herein as being performed by one component may be performed by multiple components in a distributed manner. Likewise, functionality performed by multiple components may be consolidated and performed by a single component. Similarly, a component described as performing particular functionality may also perform additional functionality not described herein. For example, a device or structure that is “configured” in a certain way is configured in at least that way but may also be configured in ways that are not listed.


Furthermore, some embodiments described herein may include one or more electronic processors configured to perform the described functionality by executing instructions stored in non-transitory, computer-readable medium. Similarly, embodiments described herein may be implemented as non-transitory, computer-readable medium storing instructions executable by one or more electronic processors to perform the described functionality. As used in the present application, “non-transitory computer-readable medium” comprises all computer-readable media but does not consist of a transitory, propagating signal. Accordingly, non-transitory computer-readable medium may include, for example, a hard disk, a CD-ROM, an optical storage device, a magnetic storage device, a ROM (Read Only Memory), a RAM (Random Access Memory), register memory, a processor cache, or any combination thereof.


Many of the modules and logical structures described are capable of being implemented in software executed by a microprocessor or a similar device or of being implemented in hardware using a variety of components including, for example, application specific integrated circuits (“ASICs”). Terms like “controller” and “module” may include or refer to both hardware and/or software. Capitalized terms conform to common practices and help correlate the description with the coding examples, equations, and/or drawings. However, no specific meaning is implied or should be inferred simply due to the use of capitalization. Thus, the claims should not be limited to the specific examples or terminology or to any specific hardware or software implementation or combination of software or hardware.



FIGS. 1A-1E illustrate several embodiments of a battery pack 10 operable to power cordless electrical devices (e.g., electrical devices, such as power tools, outdoors tools, other motorized devices, non-motorized devices, etc.). FIG. 1A illustrates a battery pack 10A having a “5S3P” configuration (three parallel-connected strings of five series-connected battery cells), FIG. 1B illustrates a battery pack 10B having a “5S2P” configuration (two parallel-connected strings of five series-connected battery cells), and FIG. 1C illustrates a battery pack 10C having a “5S1P” configuration (one string of five series-connected battery cells). Similar battery packs are described and illustrated in U.S. Provisional Patent Application Nos. 62/536,807, filed Jul. 25, 2017, and 62/570,828, filed Oct. 11, 2017, entitled “HIGH POWER BATTERY-POWERED SYSTEM,” and U.S. patent application Ser. No. 16/045,513, filed on Jul. 25, 2018, the entire contents of all of which are hereby incorporated by reference.



FIG. 1D illustrates a battery pack 10D having a “20S1P” configuration (one string of twenty series-connected cells), and FIG. 1E illustrates a battery pack 10E having a “20S2P” (two parallel-connected strings of twenty series-connected cells). Similar battery packs are described and illustrated in U.S. Provisional Patent Application No. 62/527,735, filed Jun. 30, 2017, entitled “HIGH POWER BATTERY-POWERED SYSTEM,” and U.S. patent application Ser. No. 16/025,491, filed on Jul. 2, 2018, the entire contents of both of which are hereby incorporated by reference.


The battery pack 10 includes battery cells 14 having a nominal voltage (e.g., between about 3 volts (V) and about 5 V) and a nominal capacity (e.g., between about 3 Amp-hours (Ah) and about 5 Ah or more (e.g., up to about 9 Ah)). The battery cells may be any rechargeable battery cell chemistry type, such as, for example, lithium (Li), lithium-ion (Li-ion), other lithium-based chemistry, nickel-cadmium (NiCd), nickel-metal hydride (NiMH), etc.


The battery pack 10 includes a number and arrangement of battery cells 14 to provide a desired output (e.g., nominal voltage, capacity, etc.) In FIGS. 1A-1C, the battery packs 10A-10C have a nominal voltage of between about 16 V and about 21 V, and the capacity of the battery pack 10A is about three times the capacity of the battery pack 10C (e.g., about 9 Ah compared to about 3 Ah). In FIGS. 1D-1E, the battery packs 10D-10E have a nominal voltage of between about 72 V and about 84 V, and the capacity of the battery pack 10E is about two times the capacity of the battery pack 10D (e.g., about 6 Ah compared to about 3 Ah).



FIG. 2 is a block diagram illustrating the battery pack 10 coupled to a charger 18. The battery pack 10 includes the battery cells 14, a battery controller 22, an analog front end (AFE) 26, a charging field effect transistor (FET) 30, a positive battery terminal 34, a positive charging terminal 38, and a ground terminal 42.


The positive battery terminal 34 and the ground terminal 42 are coupled to corresponding power terminals of a powered electrical device to provide operating power to the electrical device. The positive charging terminal 38 and the ground terminal 42 are coupled to corresponding charging terminals of the charger 18 to receive a charging current from the charger 18. The charging FET 30 is coupled between the positive charging terminal 38 and the battery cells 14 to selectively provide the charging current to the battery cells 14.


The charging FET 30 is controlled to open or close by the battery controller 22. When the charging FET 30 is open, the battery cells 14 are disconnected from the charger 18 and, therefore, do not receive the charging current. When the charging FET 30 is closed, the battery cells 14 are connected to the charger 18 and, therefore, receive the charging current. The AFE 26 individually monitors and balances the battery cells 14 and provides operating power to the battery controller 22.



FIG. 3 illustrates one example embodiment of a charging circuit 50 implemented in the battery pack 10. The illustrated charging circuit 50 includes the charging FET 30, a gate driver 54, and a fuse 58. In the illustrated example, the charging FET 30 includes a 40V N-Channel power MOSFET, for example, a 40V N-Channel power NexFET™ MOSFET CSD18511Q5A manufactured by Texas Instruments. The N-Channel FET may have a lower drain-source on resistance RDS(on) and less current loss per unit area compared to a P-Channel FET. Compared to other charging circuits in which a charging FET and a fuse may limit the charging current to about 6 A, in the illustrated construction, the FET 30 and the fuse 58 may allow higher charging currents more than about 6 A to about 18 A or even higher (e.g., up to about 20 A).


The drain D of the charging FET 30 is coupled to the charging terminal 38 through the fuse 58. The source S of the charging FET 30 is coupled to the battery cells 14 and, in particular, to the most positive terminal of the one or more strings of battery cell 14. The source S of the charging FET 30 is also coupled to a source input of the gate driver 54. The gate G of the charging FET 30 is coupled to a gate output of the gate driver 54. As described above, the charging FET 30 selectively couples the charger 18 to the battery cells 14.


The gate driver 54 is used to drive the charging FET 30. In one example, the gate driver 54 is an ultra-small low-side MOSFET driver MC5060 manufactured by Micrel. As described above, a source input of the gate driver 54 is coupled to the source S of the charging FET 30, and the gate output of the gate driver 54 is coupled to the gate G of the charging FET 30. The gate driver 54 receives operating power from the battery cells 14 at a positive power supply input V+. The gate driver 54 receives a control input CHG EN from the battery controller 22. The battery controller 22 provides control signals to open or close the charging FET 30 to the gate driver 54 through the control input CHG EN. In response to the control signals received from the battery controller 22, the gate driver 54 opens or closes the charging FET 30 to selectively connect the charger 18 to the battery cells 14.


A first switch 62 is coupled between the battery cells 14 and the power supply input V+. The drain of the first switch 62 is coupled to the battery cells 14, and the source of the first switch 62 is coupled to the power supply input V+. The gate of the first switch 62 is controlled by a second switch 66, and the gate of the second switch 66 is controlled by the battery controller 22 using a control signal CHG FET. The battery controller 22 sets the control signal CHG FET to a logical high to close the second switch 66 and sets the control signal CHG FET to a logical low to open the second switch 66. The first switch 62 is closed when the second switch 66 is closed, and the first switch 62 is opened when the second switch 66 is opened.


A capacitor 70 (for example, a timer circuit) is coupled between the positive power input V+ and ground. When the first switch 62 is enabled, the capacitor 70 is first charged before the gate driver 54 is controlled to open the charging FET 30. The capacitance value of the capacitor 70 may be selected to control the amount of time for the capacitor 70 to reach full charge (i.e., a time constant).


The charger 18 is configured to provide a charging current between about 6 A and about 20 A to charge the battery pack 10. The charger 18 may provide a charging current corresponding to the configuration of the battery pack 10. In one embodiment, the charger 18 provides a charging current of about 6 A to charge the 5S1P battery pack 10C (or the 20S1P battery pack 10D), provides a charging current of about 12 A to charge the 5S2P battery pack 10B (or the 20S2P battery pack 10E), and provides a charging current of about 18 A to charge the 5S3P battery pack 10A.


In some embodiments, the charger 18 may limit the maximum charging current to about 13.5 A regardless of the configuration of the battery pack 10. Accordingly, the charger 18 provides a maximum charging current of about 13.5 A to the 5S3P battery pack 10A. The charging FET 30 and the fuse 58 are selected to allow fast charging of the battery pack 10 at high currents as described above. The illustrated charging FET 30 may be configured to handle a voltage of 40 V and a maximum current of approximately 20 A or more. The illustrated fuse 58 is, for example, an 8 A fuse rated to allow a maximum current of 13.5 A. In other embodiments, the fuse 58 may be rated (e.g., a 20 A fuse) to handle higher maximum currents, for example, up to 18 A or 20 A.



FIG. 4 illustrates placement of components of the illustrated charging circuit 50 on a printed circuit board 74 of the battery pack 10. The charging FET 30, the fuse 58, and the capacitor 70 are placed immediately behind the terminal block 32 (including the positive battery terminal 34, the charging terminal 38, and the ground terminal 42).



FIG. 5 is a flowchart of an example method 78 for enabling fast charging of the battery pack 10. The battery controller 22 enables charging of the battery cells 14 in response to detecting a connection to the charger 18. The illustrated method 78 includes controlling, using the battery controller 22, the first switch 62, coupled between the battery cells 14 and the power supply input V+ of the gate driver 54, to close (at block 82). The battery controller 22 opens the first switch 62 by setting the control signal CHG FET to high. As described above, the control signal CHG FET closes the second switch 66 which, in turn, closes the first switch 62. When the first switch 62 is closed, the power supply input V+ of the gate driver 54 is coupled to the battery cells 14, thereby providing operating power supply to the gate driver 54.


The method 78 includes setting, using the battery controller 22, a first delay timer corresponding to a time to full charge of the capacitor 70 coupled between the power supply input V+ and ground (at block 86). The battery controller 22 waits for the capacitor 70 to reach full charge by setting a timer corresponding to the amount of time the capacitor 70 takes to reach full charge.


The method 78 further includes controlling, using the battery controller 22, the charging FET 30 to close when the first delay timer expires (at block 90). The battery controller 22 waits for the capacitor 70 to reach full charge before providing an enable signal to the control input CHG EN. The gate driver 54 controls the charging FET 30 to close to charge the battery cells 14 in response to the gate driver 54 receiving the enable signal over the control input CHG EN.



FIG. 6 is a flowchart of an example method 94 for disable fast charging of the battery pack 10. The battery controller 22 disables charging of the battery cells 14 in response to, for example, detecting that the battery pack 10 is fully charged, disabled due to a fault condition, etc. or in response to detecting that the charger 18 is disconnected from the battery pack 10.


The illustrated method 94 includes controlling, using the battery controller 22, the charging FET 30 to open (at block 98). The battery controller 22 provides a disable signal to the control input CHG EN. When the gate driver 54 receives the disable signal over the control input CHG EN, the gate driver 54 control the charging FET 30 to open to disable charging of the battery cells 14.


The method 94 includes setting, using the battery controller 22, a second delay timer to ensure that the charging FET 30 is completely switched OFF (at block 102). The method 94 further includes controlling, using the battery controller 22, the first switch 62, coupled between the battery cells 14 and the power supply input V+ of the gate driver 54, to open when the second delay timer expires (at block 106). The battery controller 22 waits for the charging FET 30 to be completely switched OFF before disabling the gate driver 54. When the second delay timer expires, the battery controller 22 opens the second switch 66 to open the first switch 62. The battery controller 22 thereby disables the power supply to the gate driver 54.



FIG. 7 illustrates one example embodiment of a charging circuit 110 implemented in the battery pack 10. The illustrated charging circuit 110 is similar to the charging circuit 50, except that the gate driver 54 is on the high-side of the charging FET 30 rather than the low-side of the charging FET 30 such that the gate driver 54 receives operating power from the charging terminal 38. In the example illustrated, the charging FET includes a 200 V 36A N-Channel MOSFET BSC320N20NS3 manufactured by Infineon Technologies. The gate driver 54 is a surge protector LTC4380CMS manufactured by Linear Technologies.



FIG. 8 illustrates one example embodiment of a charging circuit 114 implemented in the battery pack 10. The illustrated charging circuit 114 includes a first charging FET 118, a second charging FET 122, and a fuse 58. In the illustrated example, the first charging FET 118 and the second charging FET 122 include 40V P-Channel power MOSFET, for example, a 40V P-Channel MOSFETs SiS443DN manufactured by Vishay® Siliconix.


The drain D of each charging FET 118, 122 is coupled to the charging terminal 38 through the fuse 58. The source S of each charging FET 118, 122 is coupled to the battery cells 14 and, in particular, to the most positive terminal of the one or more strings of battery cell 14. The gate G of each charging switch 118, 122 is coupled to a switch 126. The battery controller 22 controls the switch 126 to open and close the charging FETs 118, 122. For example, the battery controller 22 opens the switch 126 to open the charging FETs 118, 122 and closes the switch 126 to close the charging FETs 118, 122.



FIG. 9 illustrates placement of components of the illustrated charging circuit 114 on the printed circuit board 74 of the battery pack 10. The charging FETs 118, 122 and the fuse 58 are placed immediately behind the terminal block 32 (including the positive battery terminal 34, the charging terminal 38, and the ground terminal 42).


In other constructions (not shown), the charging circuit 50, 110, 114 may not include a fuse, such as the fuse 58. In such constructions, the voltage may be measured across the FET (e.g., the FET 30 or the FET(s) 118 or 122), and the current through the FET may be determined (e.g., by the controller 22) based on a known internal resistance. If the calculated current is above a threshold, the FET can open.


Thus, the invention may provide, among other things, fast-charging battery packs.


Although the invention has been described in detail with reference to certain preferred embodiments, variations and modifications exist within the scope and spirit of one or more independent aspects of the invention as described.


One or more independent features and/or independent advantages of the invention may be set forth in the claims.

Claims
  • 1. A battery pack, comprising: a housing;a plurality of battery cells supported by the housing, the plurality of battery cells and the battery pack having a nominal capacity of up to about 15 Amp-hours (Ah);a terminal block configured to be coupled to a power tool to provide operating power from the plurality of battery cells to the power tool, the terminal block having a positive power terminal, a charging terminal, and a ground terminal; anda charging circuit provided between the charging terminal and the plurality of battery cells, the charging circuit configured to receive and transfer charging current above 12 Amperes to the plurality of battery cells during charging, wherein the charging circuit includes a charging switch operable to provide the charging current to the plurality of battery cells.
  • 2. The battery pack of claim 1, further comprising a battery controller coupled to the charging circuit.
  • 3. The battery pack of claim 2, further comprising a gate driver coupled between the battery controller and the charging switch, wherein the battery controller controls the charging switch via the gate driver.
  • 4. The battery pack of claim 3, wherein the gate driver is coupled on a high side of the charging switch such that the gate driver receives operating power from the charging terminal.
  • 5. The battery pack of claim 3, further comprising: a first switch coupled between the battery cells and the gate driver; anda timer circuit coupled to the gate driver and having a time constant.
  • 6. The battery pack of claim 5, wherein the battery controller is further configured to: detect a connection to a charger;control the first switch to close;set a delay timer to the time constant of the timer circuit; andcontrol the charging switch to close when the delay timer expires.
  • 7. The battery pack of claim 6, wherein the battery controller is further configured to detect a condition for disabling charging of the plurality of battery cells;control the charging switch to open;set a second delay timer to the time constant of the timer circuit; andcontrol the first switch to open when the second delay timer expires.
  • 8. The battery pack of claim 7, further comprising a second switch for controlling the first switch, wherein the battery controller is coupled to the second switch to control the second switch, wherein the battery controller controls the first switch by controlling the second switch.
  • 9. The battery pack of claim 1, further comprising a printed circuit board (PCB) coupled to the terminal block, wherein the charging switch is provided adjacent the terminal block on the PCB.
  • 10. The battery pack of claim 1, wherein the charging switch is a N-Channel power MOSFET.
  • 11. A battery pack charging system comprising: a charger configured to provide a charging current between about 6 Amperes and about 20 Amperes;a battery pack detachably connectable to the charger and configured to be charged by the charger, the battery pack having a nominal capacity of up to about 6 Amp-hours (Ah) and including:a plurality of battery cells;a terminal block configured to be coupled to a power tool to provide operating power from the plurality of battery cells to the power tool, the terminal block having a positive power terminal, a charging terminal, and a ground terminal; anda charging circuit provided between the charging terminal and the plurality of battery cells, the charging circuit configured to receive and transfer charging current above 12 Amperes to the plurality of battery cells during charging, wherein the charging circuit includes a charging switch operable to provide the charging current to the plurality of battery cells.
  • 12. The battery pack charging system of claim 11, wherein the battery pack receives a charging current of about 12 Amperes for charging the plurality of battery cells, further comprising: a second battery pack detachably connectable to the charger and configured to be charged by the charger, the second battery pack having a nominal capacity of between about 6 Ah and about 27 Ah including:a second plurality of battery cells;a second terminal block configured to be coupled to the power tool to provide operating power from the second plurality of battery cells to the power tool, the second terminal block having a second positive power terminal, a second charging terminal, and a second ground terminal; anda second charging circuit provided between the second charging terminal and the second plurality of battery cells, the second charging circuit configured to receive and transfer charging current above 12 Amperes to the second plurality of battery cells during charging, wherein the second charging circuit includes:a second charging switch operable to provide the charging current to the second plurality of battery cells,wherein the second battery pack receives a charging current of about 18 Amperes for charging the second plurality of battery cells.
  • 13. The battery pack charging system of claim 11, further comprising: a battery controller coupled to the charging circuit;a gate driver coupled between the battery controller and the charging switch, wherein the battery controller controls the charging switch via the gate driver;a first switch coupled between the battery cells and the gate driver; anda timer circuit coupled to the gate driver and having a time constant.
  • 14. The battery pack charging system of claim 13, wherein the battery controller is further configured to: detect a connection to a charger;control the first switch to close;set a delay timer to the time constant of the timer circuit; andcontrol the charging switch to close when the delay timer expires.
  • 15. The battery pack charging system of claim 14, wherein the battery controller is further configured to: detect a condition for disabling charging of the plurality of battery cells;control the charging switch to open;set a second delay timer to the time constant of the timer circuit; andcontrol the first switch to open when the second delay timer expires.
  • 16. The battery pack charging system of claim 11, wherein the charging switch is a N-Channel power MOSFET.
  • 17. A method for fast charging battery pack comprising: connecting a charging switch between a charging terminal of a battery pack and a plurality of battery cells of the battery pack, the battery pack having a nominal capacity of up to about 27 Amp-hours (Ah);measuring, via a battery controller of the battery pack, a voltage across the charging switch;calculating, via the battery controller, a current through the charging switch based on the voltage and a resistance of the charging switch;determining, via the battery controller, whether the current is greater than a current threshold; andtransferring, in response to determining that the current is greater than the current threshold, a charging current above 12 Amperes to the plurality of battery cells during charging.
  • 18. The method of claim 17, further comprising: detecting, via a battery controller of the battery pack, a connection of the battery pack to a charger;controlling, via the battery controller, a first switch to close, wherein the first switch is coupled between the plurality of battery cells and a gate driver of the charging switch;setting, via the battery controller, a delay timer to a time constant of a timer circuit, wherein the timer circuit is coupled to the gate driver; andcontrolling, via the battery controller, the charging switch to close when the delay timer expires.
  • 19. The method of claim 18, further comprising: detecting, via the battery controller, a condition for disabling charging of the plurality of battery cells;controlling, via the battery controller, the charging switch to open;setting, via the battery controller, a second delay timer to the time constant of the timer circuit; andcontrolling, via the battery controller, the first switch to open when the second delay timer expires.
  • 20. The method of claim 17, wherein the charging switch is a N-Channel power MOSFET.
RELATED APPLICATIONS

This application is a continuation of U.S. patent application Ser. No. 16/425,570, filed May 29, 2019, now U.S. Pat. No. 11,749,846, which claims priority to U.S. Provisional Patent Application No. 62/678,050, filed on May 30, 2018, the entire content of each of which is hereby incorporated by reference

US Referenced Citations (123)
Number Name Date Kind
3477009 Nichols Nov 1969 A
3517294 Ruben Jun 1970 A
3531706 Mullersman Sep 1970 A
3623139 Dickerson Nov 1971 A
3700997 Smith Oct 1972 A
3863129 Yamauchi Jan 1975 A
3968168 Strong Jul 1976 A
4048404 Bro Sep 1977 A
4609860 Fasen Sep 1986 A
4639656 Mukai Jan 1987 A
4712055 Houser Dec 1987 A
4767977 Fasen et al. Aug 1988 A
5130634 Kasai Jul 1992 A
5166596 Goedken Nov 1992 A
5177427 Bugaj Jan 1993 A
5217395 Bailey et al. Jun 1993 A
5225763 Krohn et al. Jul 1993 A
5349281 Bugaj Sep 1994 A
5350996 Tauchi Sep 1994 A
5410238 Ishizuka et al. Apr 1995 A
5500584 Shimomoto Mar 1996 A
5557188 Piercey Sep 1996 A
5576612 Garrett et al. Nov 1996 A
5640079 Nelson et al. Jun 1997 A
5642027 Windes et al. Jun 1997 A
5675235 Nagai Oct 1997 A
5845217 Lindell et al. Dec 1998 A
5852332 Shearer Dec 1998 A
5861730 Lee Jan 1999 A
5880576 Nagai Mar 1999 A
5912546 Sakou et al. Jun 1999 A
5949216 Miller Sep 1999 A
6008629 Saeki et al. Dec 1999 A
6326770 Patino et al. Dec 2001 B1
6603288 Sakakibara Aug 2003 B2
6803746 Aker et al. Oct 2004 B2
6813443 Lin Nov 2004 B1
6859014 Bohne et al. Feb 2005 B2
6949914 Aradachi et al. Sep 2005 B2
6950320 Shin Sep 2005 B2
6992464 Takano et al. Jan 2006 B2
7208917 Yang Apr 2007 B2
7221124 Howard et al. May 2007 B2
7273676 Wheeler et al. Sep 2007 B2
7288337 Kim Oct 2007 B2
7301308 Aker et al. Nov 2007 B2
7323849 Robinett et al. Jan 2008 B1
7719234 Carrier et al. May 2010 B2
7839119 Onose Nov 2010 B2
7839121 Kim Nov 2010 B2
7982428 Kim Jul 2011 B2
7994756 Rowland Aug 2011 B2
8193777 Nakashima Jun 2012 B2
8217628 Yang et al. Jul 2012 B2
8604754 Cegnar et al. Dec 2013 B2
8618769 Johnson Dec 2013 B2
8674657 Kaino Mar 2014 B2
8698457 Hogari et al. Apr 2014 B2
8698458 Kim Apr 2014 B2
8729851 Bobbin et al. May 2014 B2
8963505 Odaohhara et al. Feb 2015 B2
9075422 Vemula Jul 2015 B2
9083192 Tinaphong et al. Jul 2015 B2
9142993 Kawai et al. Sep 2015 B2
9231427 Yasuda et al. Jan 2016 B2
9252606 Aronov et al. Feb 2016 B1
9276421 Weissinger et al. Mar 2016 B2
9634511 Zhao et al. Apr 2017 B2
9643506 Lei May 2017 B2
9664745 Fearn May 2017 B1
9689753 Ramey et al. Jun 2017 B2
9692244 Lee Jun 2017 B2
9721723 Lohr et al. Aug 2017 B2
9748780 Suzuki et al. Aug 2017 B2
9759778 Nagato Sep 2017 B2
9780581 Weissinger et al. Oct 2017 B2
9784795 Umemura et al. Oct 2017 B2
9800074 Adames Oct 2017 B2
9812878 Stieber et al. Nov 2017 B1
9859548 Cruise et al. Jan 2018 B2
9906062 Terlizzi et al. Feb 2018 B2
10431857 Johnson Oct 2019 B2
11749846 Fieldbinder Sep 2023 B2
11894528 Fieldbinder Feb 2024 B2
20030090239 Sakakibara May 2003 A1
20040070369 Sakakibara Apr 2004 A1
20050046387 Aker et al. Mar 2005 A1
20050077878 Carrier Apr 2005 A1
20050275372 Crowell Dec 2005 A1
20060164031 Leem Jul 2006 A1
20080238370 Carrier Oct 2008 A1
20090009008 Heinrich Jan 2009 A1
20090309547 Nakatsuji Dec 2009 A1
20100019737 Leboeuf Jan 2010 A1
20100085012 Cruise et al. Apr 2010 A1
20100148731 Notten et al. Jun 2010 A1
20100207581 Sakaue Aug 2010 A1
20110114350 Johnson et al. May 2011 A1
20110248670 Yamazaki et al. Oct 2011 A1
20120104991 Suzuki et al. May 2012 A1
20130049675 Minami Feb 2013 A1
20130098646 Funabashi et al. Apr 2013 A1
20140091754 Shum et al. Apr 2014 A1
20140117922 Pham May 2014 A1
20150091497 Leung et al. Apr 2015 A1
20150180244 Jung et al. Jun 2015 A1
20150340894 Horie et al. Nov 2015 A1
20150340907 Lei Nov 2015 A1
20160118818 Yamauchi Apr 2016 A1
20160126755 Kechmire et al. May 2016 A1
20160285282 Adrends Sep 2016 A1
20160372801 Clemente et al. Dec 2016 A1
20160380263 Nakayama et al. Dec 2016 A1
20170005499 Zhang et al. Jan 2017 A1
20170040587 Yang et al. Feb 2017 A1
20170040822 Li et al. Feb 2017 A1
20170085108 Zhang Mar 2017 A1
20170117726 Jore et al. Apr 2017 A1
20170170439 Jarvis et al. Jun 2017 A1
20170288436 Reed Oct 2017 A1
20170294788 Curtis Oct 2017 A1
20170370994 Nagato Dec 2017 A1
20180003773 Umemura et al. Jan 2018 A1
Foreign Referenced Citations (36)
Number Date Country
1052824 Jul 1991 CN
1669161 Sep 2005 CN
101421902 Apr 2009 CN
101496256 Jul 2009 CN
101599552 Dec 2009 CN
102035054 Apr 2011 CN
102315665 Jan 2012 CN
102447283 May 2012 CN
102452069 May 2012 CN
102959826 Mar 2013 CN
104319832 Jan 2015 CN
204145012 Feb 2015 CN
104967200 Oct 2015 CN
106068593 Nov 2016 CN
3515998 Nov 1985 DE
3526045 Jan 1987 DE
4123168 Jan 1992 DE
526874 Feb 1993 EP
665628 Aug 1995 EP
1715558 Oct 2006 EP
2405525 Jan 2012 EP
2448036 May 2012 EP
3142217 Mar 2017 EP
8401060 Mar 1984 WO
8805222 Jul 1988 WO
9316518 Aug 1993 WO
3041255 May 2003 WO
4038832 May 2004 WO
7119683 Oct 2007 WO
8015931 Feb 2008 WO
8155209 Dec 2008 WO
2012029982 Mar 2012 WO
2013153889 Oct 2013 WO
2014070507 May 2014 WO
2016192007 Dec 2016 WO
2017070645 Apr 2017 WO
Non-Patent Literature Citations (4)
Entry
International Search Report for International Patent Application No. PCT/US2019/034414 dated Sep. 20, 2019 (3 pages).
Written Opinion for International Patent Application No. PCT/US2019/034414 dated Sep. 20, 2019 (6 pages).
Extended European Search Report for Application No. 19810056.2 dated Jan. 25, 2022 (8 pages).
Chinese Patent Office Action for Application No. 201980036649.X dated Nov. 1, 2023 (17 pages including machine English translation).
Related Publications (1)
Number Date Country
20240055677 A1 Feb 2024 US
Provisional Applications (1)
Number Date Country
62678050 May 2018 US
Continuations (1)
Number Date Country
Parent 16425570 May 2019 US
Child 18459827 US