This relates to tuning an RF signal initiated by a digital sequence generator, and in particular, tuning an RF filter in coordination with the digital sequence generator to reduce the switching time interval when the operating frequency is changed.
A digital sequence generator may be used to produce a sequence of digital words that are converted into an analog signal with a high-speed digital to analog converter (DAC). The output is generally an approximation of a sinusoidal signal. Various strategies may be used to produce such a signal as is known in the art. An example of a suitable digital sequence generator is a Direct Digital Sequence (DDS). While this term is used the discussion below, it will be understood that other types of digital sequence generators may also be used. As used herein, the term DDS may include a component that produces an analog signal based on a digitally controlled signal. This may involve a digital sequence generator and a DAC, which may be implemented using separate components, or one or more blocks that perform one or more functions.
Referring to
Assume that the DDS produces a time sampled approximation of the sinusoidal signal with a frequency of fDDS that is input to the tracking filter. An example of a typical output is shown in
According to an aspect, there is provided a method of tuning an RF signal, the method comprising the steps of: producing a first signal at a first frequency using a digital sequence generator; filtering the first signal using a frequency-tunable tracking filter that is tuned to the first frequency, the tracking filter comprising one or more variable resonators; tuning the tracking filter from the first frequency to a second frequency over a transition period; and tuning the first signal to the second frequency by causing the digital sequence generator to transition between two or more states during the transition period, the two or more states being selected such that, immediately after the transition period, the analog signal substantially matches a desired steady state at the second frequency.
According to other aspects, the method may comprise one or more of the following features, alone or in combination: the first signal may be a digital signal filtered to produce an analog signal that is filtered by the tracking filter; the one or more variable resonators may comprise a variable capacitor, such as a varactor having a capacitance that is controlled by a bias voltage; the tracking filter may be tuned from the first frequency to the second frequency by changing the bias voltage; each of the first frequency and the second frequency may be different by greater than 100 MHz and the transition time may be about 500 nanoseconds or less; the tracking filter may be Q-tunable, and may further comprise the step of, during the transition time, tuning the Q of the tracking filter such that a signal amplitude at the second frequency is maintained relative to the first frequency; the method may further comprise the step of tuning the Q of the tracking filter to produce a constant signal amplitude during the transition time; the two or more states may be determined by calibrating the digital sequence generator and the tracking filter, and the method may further comprise the step of storing the two or more states in a calibration table, the calibration table may comprise the two or more states corresponding to a plurality of first frequency and second frequency pairs; the two or more states may be coordinated with changes in the tracking filter during the transition time; calibrating the digital sequence generator and the tracking filter may comprise generating a feedback signal based on samples of at least the analog signal and the RF signal, the samples may be obtained at least during the transition time; calibrating the digital sequence generator and the tracking filter may comprise iteratively applying an optimization algorithm to determine the two or more states for each first frequency and second frequency pair; the set of first frequency and second frequency pairs may be used to determine an empirical relationship that estimates the two or more states for an additional first frequency and second frequency pair that is not stored in the calibration table; the two or more states may be defined by differences in phase, amplitude, frequency, or combinations thereof.
According to an aspect, there is provided a method to reduce the switching time of a transition from an initial frequency (f1) to a destination frequency (f2) as the DDS abruptly changes frequency from f1 to f2 with phase coherence. The tracking filter (TF) also abruptly changes its center band. Starting with a DDS circuit generating a digital signal, a tracking RF filter comprising one or more active feedback analog tunable filters is used to generate the desired frequency output f1. At a subsequent time, the DDS-TF arrive at the desired output frequency f2. We show a reduction in switching time by:
In other aspects, the features described above may be combined together in any reasonable combination as will be recognized by those skilled in the art.
These and other features will become more apparent from the following description in which reference is made to the appended drawings, the drawings are for the purpose of illustration only and are not intended to be in any way limiting, wherein:
A method of tuning an RF signal will now be described with reference to
Referring to
To provide adequate filtering of the DDS output in circuits that do not incorporate the techniques of this disclosure, the Q of the TF is typically large, such as over 1000. As a numerical example, consider a TF with a Q=1000 and a center frequency of 1.0 GHz. In this case the transition period is on the order of 1 μsec. It is this transition period that is an issue as it slows the switching time of a DDS and consequently the overall switching in frequency from f1 to f2. In contrast, a much shorter transition period, such as on the order of 10 nsec, may result in circuits incorporating the techniques of this disclosure.
DDS frequency generation may be used in frequency agile applications where it is beneficial to change frequency abruptly with the minimum transient epoch at the point frequency transitions. The TF is necessary to remove spurious frequency components of the DDS output. As used herein, the term abrupt is used to describe an event as occurring over a time interval that is very much less than the signal period of a particular application. Similarly, except where noted, ‘instantaneous’ is an idealized step change of a parameter such as frequency or varactor bias voltage.
The DDS response, denoted as x(t), for an instantaneous frequency change at t=0 from f1 to f2 is
where A is the desired amplitude, Ø1 is a desired phase shift for the f1 epoch and Ø2 is a desired phase shift for the f2 epoch.
Referring to
Due to the settling time of the TF, there will generally be a transition switch time of Ts wherein the output signal x(t) is undefined and hence unusable. Therefore, the implementable combination of the DDS 12 and TF 14 will have an output that may be described by:
The discussion below addresses methods of minimizing the total transition time between T and Ts.
Referring to
The DDS makes adjustments with one sequence of digital samples converted by a DAC for the TF signal input, and another sequence of digital samples converted by a DAC for the control of the TF. Adjustment samples are provided between 0<t<T. For t<0 the DDS samples are commensurate with steady state operation at f1, and for t>Ts the DDS samples are likewise commensurate with steady state operation at f2.
If the DDS transition is not ideal, then there will be a small residual transient in the DDS-TF output in t>Ts. This transient is what may be eliminated with optimization of the DDS transition states. The determination of these states may be determined, for example, using a calibration method, such as the one discussed below.
The DDS may be considered to progress through one or more intermediate states between 0<t<T. Such intermediate DDS states may include a phase shift and/or a signal amplitude change. Phase shifts may be accomplished by shaping the waveform, such as by inserting or removing digital samples. The states used may be particular to a specific tuning operation, e.g., a specific f1 and f2. Generalizing, the states may be defined by the DDS digital samples in the transition sequence over 0<t<T.
A typical implementation of a TF is a phase locked loop (PLL), that locks to the DDS output frequency and attempts to transition as fast as possible from f1 to f2. However, even with complex mechanisms to pre-bias the VCO frequency control input and loop filter, achieving sub-microsecond transient times may be very difficult. Also, the PLL may cycle slip during the transition such that phase coherency may be lost in x(t).
The TF considered in this discussion is the active feedback filter based on a plurality of resonators used in an active feedback loop, and example of which is shown in
As discussed above, the frequency switching time of Ts consists of two sub-intervals P1 and P2 as illustrated in
The method discussed herein may be used to reduce or eliminate P2 using appropriate control of the DDS and TF throughout P1. It is based on the following observations:
Consider the first point of the mapping of the resonator energy when the varactor bias is changed. Referring to
TF 14 will have a frequency response approximately equivalent to a single pole resonator as
where D is the damping coefficient and ω0 is the natural resonance frequency. The Q of the resonator is given as Q=½D. The Q of TF 14 is selected to be sufficiently high that the bandwidth is sufficiently narrow for the DDS application.
The natural resonance frequency is tuned to f1 and f2 by abruptly changing the bias on the varactor of the resonator 20. That is ω0=2πƒ1 for the epoch of f1 and is ω0=2πƒ2 for the epoch of f2. For the resonator we have
where C is the total resonator capacitance, including the capacitance of the varactor diode(s) that is a function of the bias voltage v as expressed by C(v). If the bias voltage v(t) could be changed instantly, then C will also change instantly.
Now consider the DDS excitation into the TF if an ideal TF varactor bias voltage could be changed instantly. If the DDS frequency output is synchronized precisely with the varactor bias voltage step, then the output x(t) would follow
In this case of instant bias voltage change, the amplitude A would not change from the f1 and f2 epochs. This follows as the input is a current source that at resonance A is given by the product of the amplitude of the DDS synthesized waveform and R, the equivalent parallel resistor of LC resonator tank 20.
Consider what happens in this ideal case if the instantaneous bias voltage is not changed precisely at the zero-voltage crossing of
Now consider what happens when the ideal TF resonator frequency is not perfectly matched to the DDS. In this case the f1 will be mapped into a new frequency f2′ that is slightly different from f2. This will lead to a beating of the residual energy at f2′ with the new signal at f2 that is being built up. The beat frequency of f2′−f2 can be small depending on the accuracy. However, the f2′ component will decay in amplitude. The duration of P2 will be on the order of Q frequency cycles which is longer than desired.
Next consider a varactor diode 32 and the associated bias circuitry 30 as shown in
Clearly the resonator capacitance C cannot change instantaneously. A key feature of varactor 32 is that the signal and bias are superimposed across the two terminals of the device and cannot be separated. Hence a fast bias change will contribute spectral components within the passband of the signal. However, for microwave frequencies, such spectral contamination leaking into the signal band can be shown to be negligibly small and therefore will not be considered further.
This simplified model of varactor 32 uses a separate port for the capacitor control signal, simplifying simulation as used in this disclosure. This is an approximation as it ignores the injection of the bias signal into the signal passband. Secondly the instantaneous signal energy that is stored in the capacitor is varied by a change in capacitance. In a varactor diode this energy change is driven by the bias.
By way of a general discussion, referring to
Referring now to
Referring to
DDS 12 generates a sequence of digital samples through the transition over 0<t<T. On either side of the transition period, the samples represent an approximation of the sinusoidal signal at f1 (t<0) and f2 (t>T). Now during the interval 0<t<T, there are a small number of digital samples that the DDS generates based on lookup tables or computation and such, for example, N digital sequence samples.
The calibration of the system may involve the direct optimization of these N values based on the constraint of constant amplitude output in all three regions t<0, 0<t<T and t>T as well as a consistent phase shift in the regions of t<0 and t>T. The N values may be selected as those that arrive at Ts, at which point the desired steady state signal strength, frequency, and phase is achieved, as quickly as possible and ideally at T=Ts.
The DDS begins to generate samples at the frequency of f2 that are in-phase with the residual of the oscillating energy of f1. The frequency change of the DDS may therefore be made abruptly from f1 to f2. The only condition added to the DDS stepping algorithm is that the phase is 0 (or 180 degrees) when f1 ends and that the f2 is 0 degrees (or 180 deg) when it starts. This relative phasing of the DDS between the f1 and f2 epochs is trivial to implement as is the requirement that we stop f1 right at 0 or 180 degrees.
What is a bit more difficult is that practical implementations of resonators will not be ideal. Three possible issues include:
These issues may be mitigated by appropriate calibration. This may involve measuring the TF 14 output at f1 and f2 as the capacitance is tuned. This may be done by taking a sampling of the circuit and voltage signals, i(t) and v(t), generating a mixer product of this, and sampling the DC output when the configuration is for a specific frequency, say f1. The samples may be taken at several different values of C from which the precise pole position of the TF can be determined along with any measurement of delay and fixed phase shift. From this we can get the modelling of the TF and then make compensations to the DSS stepping algorithm. These measurements may be stored in a calibration look up table (LUT) for future reference. This may also be used in the f1 to f2 transition, that is, the low pass filter output of the product of v(t) i(t) may be sampled during the f1 to f2 transition and compared to ideal output.
The result can be as simple as switching the DDS from f1 to f2 at a phase that is not zero but commensurate with the phase shift within the TF from the input to the resonant capacitor.
DDS 12 is deterministic as it is digital, and the only uncertainties from DDS 12 is the time jitter caused in the clocking of DDS 12. TF resonator 20 on the other hand is an analog circuit that is subject to temperature fluctuations and component aging effects. The phase shift of TF resonator 20 relative to DDS 12 will therefore vary a bit, as will the varactor capacitance and analog bias circuit. This may be addressed with a calibration circuit that is built into the DDS-TF system as discussed later.
With a tightly coupled architecture, the DDS may control a number of features that result in the reduction or elimination of the P2 settling time. A block diagram of the overall DDS-TF system 50 is shown in
To minimize the settling time P2 of the DDS-TF (see
Referring to
Now consider tuning using the phase changed at t=500 of the first segment at f1 and then add a phase change to the second segment at f2.
Referring to
Referring to
With the TF statically characterized it is possible to precisely predict how a step change in the DDS frequency output will behave as it passes through the TF. Elaborating slightly, the DDS output is a sinusoidal signal with a frequency that changes instantaneously from f1 to f2 during P1 and is constant at f2 during P2. As the periods of 1/f1 and 1/f2 are both short relative to the interval of P1 or P2, it is meaningful to generate the quadrature component of the DDS over P1 and P2. The TF output may then be demodulated in terms of these quadrature DDS generated components. This results in a sequence of complex valued phasor samples that can be analyzed in terms of phase and amplitude distortions of the TF output. The key is that the DDS output is fully deterministic, and in quadrature, such that from the complex phasor measurements it is possible to reconstruct the TF output in both P1 and P2 intervals. This can then be compared with the desired output from which the fitness of the parameters can be quantified.
With this, the DAC control voltages, phase of the f1 at the transition point and phase of f2 as it starts can be set to minimize the transient response. The DDS 12 can then generate the f1 to f2 transition and the actual transition measured based on the low pass filtering and sampling feedback. There can then be an iterative optimization loop where parameters of the DDS stepping algorithm can be optimized Once complete, these parameters are stored in the calibration tables.
With respect to timing issues, it is worth noting that a current DDS may be clocked at a rate of several GHz so that the DAC may read out new samples every few hundred picoseconds. All that is required of the DDS is to synthesize a DAC analog voltage output that drives the TF bias voltages and the RF input. Hence the resolution of the control input to the TF may be sub-nanoseconds.
Further, although the DDS-TF control may be open loop during run time, during calibration, this control loop is sensed and then calibration tables may be updated. Ultimately the calibration table output may generate the sequence of digital samples required for the DDS to execute the upcoming f1 to f2 event. As such, the procedure may be implemented without additional functionality of the DDS.
The calibration procedure detects the end phase of f1 and the start phase of f2. Additionally, the total transition period of Ts may be adjusted as the tightly coupled DDS will control the DAC to set the varactor bias voltage directly. The calibration circuit of
The set of parameters may be determined as:
The objective function of the calibration optimization is based on the desire to transition from f1 to f2 with the interval of P1+P2 minimized A constraint is that leading up to the transition which starts at t=0, the output of the TF may be a steady state sinusoidal waveform with a frequency of f1 and no discernible amplitude or phase distortion, where ‘discernible’ is in the context of a specific application. The output of the TF after t=Ts (in
The reason for these constraints is that phase and frequency distortions typically degrade the coherency of the RF processing. For instance:
In the optimization, P1 and P2 are variables, and it may be advantageous to increase P1 slightly to achieve a reduction in P2.
Finally, due to residual noise present in any processing system there will be a finite residue of phase and amplitude distortion in the f1 and f2 regions. Hence the constraint of the objective is more of an inequality that should be based on a tolerable limit of the phase and amplitude distortion.
A useful observation in this context is that the change in capacitance with time during P1 results in an additional loss term in the resonator. This may be mitigated by implementing a constant signal amplitude method to minimize or reduce the P2 transition interval to zero.
As a simulation example, refer to the circuit of a coupled resonator as in
For this discussion, assume a parallel LRC resonator driven by a current source as in
The source current is may be defined by
where ic is the capacitor current and v is the voltage across the parallel resonator. Now the inductor does not change with time and therefore
The capacitor can change with time and therefore
It may be assumed that C is a function of the bias voltage which is much larger than the signal voltage. As such the change in bias voltage is the dominant cause of the change in C. Putting this together
and then
which holds as L is a constant, then
From here it can be seen that the damping coefficient is given as
this becomes
Hence when C increases with time the Q decreases. When C decreases with time then Q increases. Consider now the change in frequency from f1 to f2 where f1>f2 so that C increases with time with a dropping bias voltage. During the transition, Q will drop as
However, suppose R is modified during the transition such that
Now a constant Q may be maintained throughout the transition and then the amplitude of the signal should not change during the transition period P2 as shown in
Alternately, the signal amplitude out of the DDS may be adjusted to achieve constant amplitude which might not be convenient, as a result of a design trade.
A transition from an initial frequency of f1 to a final frequency of f2 may be considered. This has led to method of optimizing the transition by reducing P2 towards zero, and by constraining the amplitude to be constant throughout the transition interval to take the P2 transition period to zero.
If the DDS-TF are required to perform a finite number of such transitions, then calibration may be done for each f1 to f2 pair. However, this set of frequency pairs can grow to a large enough number that pairwise calibration is inconvenient. However, the calibrations may be very similar and therefore a set of empirical relations can be abstracted out of the set of pairwise calibrations. There may be a large number of algorithms for fitting empirical calibration relations to a set of calibration points of {f1 to f2}, examples of which are identified as points 66 on
It may also be noted that the transition period of P1 is generally considered a nuisance but in other applications, a calibrated linear frequency chirp, or more generally a general frequency modulation, may be required from the DDS. Clearly the P1 interval can be expanded to include either a linear frequency chirp or a general frequency modulation.
In this patent document, the word “comprising” is used in its non-limiting sense to mean that items following the word are included, but items not specifically mentioned are not excluded. A reference to an element by the indefinite article “a” does not exclude the possibility that more than one of the elements is present, unless the context clearly requires that there be one and only one of the elements.
The scope of the following claims should not be limited by the preferred embodiments set forth in the examples above and in the drawings, but should be given the broadest interpretation consistent with the description as a whole.
Number | Date | Country | |
---|---|---|---|
63187854 | May 2021 | US |