Patent Application
20110156671
Embodiments of the disclosure relate to fast load transient response circuit in a low dropout (LDO) regulator.
An LDO regulator is a type of linear regulator. A linear regulator uses a transistor, to subtract excess voltage from the applied input voltage and produces a regulated output voltage. Dropout voltage is the minimum input to output voltage differential required for the regulator to sustain an output voltage at its nominal value. LDO regulators use a pass transistor for controlling output voltages. The LDO is sometimes operated with very low voltage across the pass transistor, i.e. very close to dropout. The size of the pass transistor of an LDO regulator is determined by its dropout specification. Typically, the size of the pass transistor is much larger than what is required to meet the load transient specification. In case of a load transient, driving the gate of a pass transistor that is larger than what is necessary delays and degrades the response to a load transient. What is needed is a circuit that can respond fast to load transient in LDO regulators.
An example embodiment provides a fast load transient response circuit in a low dropout (LDO) regulator. The fast load transient response circuit includes a feedback loop that senses a load transient; a first driver and a second driver responsive to a feedback signal from the feedback loop; and a first pass transistor and a second pass transistor with sources and drains being coupled to each other, and a gate of the first pass transistor being driven by the first driver and a gate of the second pass transistor being driven by the second driver. A width of the channel to length of the channel (W/L) ratio of the first pass transistor is different than that of the second pass transistor such that second pass transistor reacts faster than the first pass transistors to a load transient.
An example embodiment provides a fast load transient response circuit. The fast load transient response circuit includes a feedback loop that senses a load transient; a set of drivers responsive to a feedback signal from the feedback loop; and a set of transistors with sources and drains being coupled to each other. Gates of each of the set of pass transistors being individually driven by corresponding each of the set of drivers. The W/L ratio of each pass transistor of the set of pass transistors are in such a way that gain of each pass transistor and an input capacitance offered by each pass transistor to the corresponding driver are optimized to provide a fast load transient response.
An example embodiment provides a method for achieving fast transient response in a circuit. A load transient is sensed. In response to the load transient, a set of drivers that drives a set of pass transistors are activated. W/L ratio of each of the set of pass transistors are in such a way that gains of each of the set of pass transistors and an input capacitance offered by each of the set of pass transistors to the corresponding driver are optimized to provide a fast load transient response. Then, gates of each of the set of pass transistors are driven individually using the set of drivers.
Other aspects and example embodiments are provided in the Drawings and the Detailed Description that follows.
Embodiments of the disclosure provide a fast load transient response circuit. One embodiment provides a fast load transient response circuit for a low dropout (LDO) regulator. Various embodiments are explained using an LDO regulator as an example. However, it will be appreciated that various embodiments can be used in other voltage regulators and amplifiers. In one embodiment the fast load transient response circuit includes a pass transistor of the LDO regulator that is split with disproportionately sized drivers.
Various embodiments minimize the quiescent current and size of the LDO regulator by driving a part of the pass transistor that is just enough to respond to a load transient. For the same quiescent current and silicon area, better load transient can be achieved, or the same load transient performance can be achieved with less quiescent current and silicon area.
It is noted that LDO regulator needs a smaller pass transistor than the dropout specification, which is discussed below. It is also noted that a smaller pass transistor has faster response than a larger pass transistor, which is discussed thereafter.
Using an example, it is explained why an LDO regulator requires a smaller pass transistor than the dropout specification. Consider an LDO with the following specification:
In dropout, the pass transistor is in linear mode of operation, the input voltage of the LDO regulator is close to the rated output voltage and the gate is at ground potential. Then the expression for the drain current of the pass transistor can be expressed as:
I
D
=K*(W1/L)*[(VGS−VT)*VDS−VDS2/2]
200 mA=K*(W1/L)*[(2−0.6)*0.1−0.12/2]
200 mA=K*(W1/L)*0.135 (Equation 1)
It is noted that the pass transistor is in linear mode of operation when responding to a load transient. The gate is close to ground, but the input is at the nominal voltage. If the amplifier provides just enough current to supply to the load, the expression would be:
I
D
=K*(W2/L)*[(VGS−VT)*VDS−VDS2/2]
200 mA=K*(W2/L)*[(2.5−0.6)*0.5−0.52/2]
200 mA=K*(W2/L)*0.825 (Equation 2)
Comparing equation (1) and equation (2), the ratio of sizes of the pass transistor required to meet the dropout and load transient specifications can be expressed as:
W
1
/W
2=0.825/0.135=6.1 (Equation 3)
In practice, during load transient, extra current would be needed in addition to the current drawn by the load to recharge the output capacitor of the LDO regulator and restore the output voltage to a nominal value. If the extra current is equal to the load current, then the ratio (as in equation 3) becomes 3. In other words, to meet the load transient specification, the pass transistor can be 3 times smaller than what it needs to be for the dropout specification.
Depending on particular circuit parameters and operating conditions, the pass transistor may even remain in saturation mode during the transient because of the large VDS. In such a case the size of the pass transistor needed to provide transient current would be even smaller than what is calculated above assuming linear mode of operation. However, we proceed with the assumption and show that a smaller pass transistor can deliver load transient current faster as follows.
Calculation showing that a smaller pass transistor has faster response than a larger pass transistor is discussed now. Compare two pass transistors of relative sizes 1:p that provide transient current from no load to full load. Even though the pass transistor may enter into a linear mode of operation during the transient, before the transient as well as after the transient is over and the LDO regulator is regulating in steady state, the pass transistor would be operating in the saturation mode. Then, current (I) in the pass transistor can be expressed as:
I∝W*(VGS−VT)2 (Equation 4)
Table 1 shows the ratio of various parameters of the second pass transistor in relation to the first pass transistor:
From table 1 it can be noted that for the same change in load current, the gate voltage of the smaller pass transistor has to swing more compared to the bigger pass transistor (note p−1/2% in the table). However, the swing is compensated by the gate capacitance of the smaller pass transistor in a way that the charge to be moved out of the gate is smaller. With p=3, ΔQ is smaller by a ratio of 1/√3=0.58. With the smaller pass transistor, the amplifier needs to drive 0.58 times smaller current, and therefore can provide load current faster to recover from the load transient.
Having proved that LDO regulator needs a smaller pass transistor than the dropout specification, and that a smaller pass transistor has faster response than a larger pass transistor, the fast load transient response circuit according to an embodiment is now discussed.
Referring to
According to one embodiment the pass transistor is split into two sections, namely pass transistor 115 and pass transistor 120 with sources as well as drains of the two sections shorted together and the gates driven by separate drivers (105 and 110). The transistor 115 is sized for load transient. Pass transistor 115 and driver 105 together is referred to as a fast section. The transistor 120 and the driver 110 together is referred to as a slow section. The overall pass transistor (consisting of the fast section and the ‘slow section’) is sized to meet the dropout specification of the LDO regulator. It is noted that the sizes of the drivers 105 and 110 are not proportional to the sizes of the sections they drive. Instead, the driver 105 for the fast section is larger in relation to the fraction of the transistor (115) it drives. The drivers are sized according to the output driving capability and an output impedance of each driver. The output impedance of each driver is set in such a way to obtain a maximum bandwidth. The output driving capability is set in such a way to obtain fastest load transient response. If the ratio of the sizes of the fast section and the slow section is n:1−n and the ratio of the strengths of their drivers is k:1−k, then the drivers 105 and 110 are designed such that k/n is greater than 1.
In an event of a load transient at the output, a feedback loop (for example, the feedback loop illustrated in
The LDO regulator includes a bandgap reference circuit 255 supplying a reference voltage (VREF) to an inverting terminal of an operational amplifier 250 on the line 260. A non-inverting terminal of the operational amplifier 250 receives a feedback signal that is generated from a feedback node 245, on a line 265. The feedback node 245 is defined on a resistor divider (with resistors 235 and 240). The resistor divider is connected between the output 280 (VOUT) and the ground. A feedback loop, that sense a load transient, consists of the resistor divider, the line 265 that provides the feedback signal and the operational amplifier 250. An output of the operational amplifier 250 is connected to a plurality of drivers (220A, 220B and 220N). Outputs of the plurality of the drivers (220A, 220B and 220N) are connected to corresponding pass transistors (205A, 205B and 205N) through the gates of those pass transistors. In other words, gates of each of the set of pass transistors are individually driven by corresponding each of the set of drivers. An output capacitor (COUT) 270 is connected between the output node 118 and ground.
The set of drivers (220A, 220B and 220N) is sized according to the output driving capability of each of the set of drivers and an output impedance of each of the set of drivers. The output impedance is set to obtain a maximum bandwidth and the output driving capability is set to obtain fastest load transient response. The set of drivers (220A, 220B and 220N) and the pass transistors (205A, 205B and 205N) are not sized proportionately. Instead, small pass transistors are connected to drivers that are larger than the fraction of the pass transistors they are driving. The smaller pass transistors are capable of providing the load transient current, and the drivers connected to them are larger so that they can react fast and provide load transient current sooner. It is noted that the pass transistor can be split into any number wherein a width of the channel to length of the channel (W/L) ratio of each pass transistor of the set of pass transistors (205A, 205B and 205N) are in such a way that gain of each pass transistor and an input capacitance offered by each pass transistor to the corresponding driver are optimized to provide a fast load transient response.
In an event of a load transient at the output of the LDO regulator, the feedback loop senses the load transient and activates the plurality of drivers (220A, 220B and 220N). Since the pass transistor is split in to the aforementioned condition, the set of pass transistors (205A, 205B and 205N) separate or in combination reacts fast to the load transient. The set of pass transistors then provides a required transient output current to a load at the output of the LDO regulator.
Ratios of the pass transistor and the drivers are given by the following equations
gm1/gm2=n/(1−n) (Equation 5)
C
1
/C
2
=n/(1−n) (Equation 6)
R
1
/R
2=(1−k)/k (Equation 7)
The two sections of the pass transistor and the driver together make up the whole transistor and the driver:
gm1+gm2=gm (Equation 8)
C
1
+C
2
=C (Equation 9)
1/R1+1/R2=1/R (Equation 10)
gm1=n*gm, (Equation 11)
gm2=(1−n)*gm (Equation 12)
C
1
=n*C, (Equation 13)
C
2=(1−n)*C (Equation 14)
R
1
=R/k, (Equation 15)
R
2
=R/(1−k) (Equation 16)
Total small signal current,
Equation 17 can be simplified to:
I
OUT
=gm*V
d*[1+sCRn(1−n)/k(1−k)]/[{1+sCRn/k}*{1+sCR(1−n)/(1−k)}] (Equation 18)
Referring now to
ωp1=k/nCR (Equation 19)
ωp2=(1−k)/(1−n)CR (Equation 20)
ωz=k(1−k)/n(1−n)CR (Equation 21)
If the strengths of the drivers are proportional to the size of the pass transistor sections, i.e. n=k, it is equivalent to the pass transistor not being split. In this case, there would be only one pole at frequency 1/C1R1.
From equations 19, 20 it can be seen that splitting the pass transistor with disproportional driver strengths creates a pole-zero pair, with the second pole (ωp2) being at a higher frequency than the original pole.
In the foregoing discussion, the term “connected” means at least either a direct electrical connection between the devices connected or an indirect connection through one or more passive or active intermediary devices. The term “circuit” means at least either a single component or a multiplicity of components, either active or passive, that are connected together to provide a desired function. The term “signal” means at least one current, voltage, charge, data, or other signal. It is to be understood that the term transistor can refer to devices including MOSFET, PMOS, and NMOS transistors. Furthermore, the term transistor can refer to any array of transistor devices arranged to act as a single transistor.
The forgoing description sets forth numerous specific details to convey a thorough understanding of the invention. However, it will be apparent to one skilled in the art that the invention may be practiced without these specific details. Well-known features are sometimes not described in detail in order to avoid obscuring the invention. Other variations and embodiments are possible in light of above teachings, and it is thus intended that the scope of invention not be limited by this Detailed Description, but only by the following Claims.
