Patent Application
20140077704
The present invention relates to lighting, and more specifically, to electronic ballasts for lighting.
A typical ballast provides regulated power to a lamp. Low pressure and high pressure discharge lamps, such as fluorescent lamps and sodium-based lamps, use a ballast to provide the proper starting voltage for the lamp and to limit the operating current once the lamp is ignited. Generally, a ballast is configured to provide appropriate and consistent power to the lamp(s) connected thereto. However, there are fault conditions that may occur in a lighting system, during which the continued supply of power to the lamps is undesirable and potentially dangerous. For example, during the end of life (EOL) stage of a fluorescent lamp, the lamp's end caps may overheat due to a depletion of an emission mix in the filament and due to the small spacing between the cathode and lamp wall. When this occurs, one or both of the lamp's end caps may exceed a design temperature limit and detrimentally affect the reliability of the lamp. These conditions may cause the lamp to crack. Another fault condition associated with the lamp is an arcing condition. This occurs when a small gap persists between the lamp's end caps and the socket in which the lamp is located. Arcing can lead to fire and other injuries.
Given the potential dangers posed by the occurrence of fault conditions in lamps operated by ballasts, there is a need for a ballast to be able to detect fault conditions and to shut down the associated lamps as needed.
Embodiments of the present invention provide a fault condition detection circuit for a ballast that detects a fault condition and, in response, discontinues the energization of any lamps connected to the ballast. In some embodiments, a ballast comprises a rectifier for receiving an alternating current (AC) voltage signal from a power source and producing a rectified voltage signal therefrom. A power factor correction circuit receives the rectified voltage signal and provides a corrected voltage signal. An inverter circuit receives the corrected voltage signal and provides a lamp voltage to the one or more lamps for energizing the one or more lamps. The inverter circuit includes a transformer for providing voltage to the one or more lamps. In particular, the transformer comprises a core, a primary winding wound on the core and connected to the power factor correction circuit, and a secondary winding wound on the core for connecting to the one or more lamps. A fault condition detection circuit is connected to the inverter circuit for disabling the operating of the inverter circuit and thereby discontinuing energization of the one or more lamps when a fault condition occurs. The fault detection circuit comprises an other primary winding wound on the core of the transformer for receiving a voltage signal proportional to a voltage across the secondary winding. A high pass filter is connected to the other primary winding for receiving the voltage signal from the other primary winding. The high pass filter is configured to pass the received voltage signal when the received voltage signal has a frequency exceeding a threshold frequency associated with normal operation and to block the received voltage signal when the received voltage signal has a frequency less than or equal to the threshold frequency associated with normal operation. A capacitor is connected between the high pass filter and ground potential for receiving the voltage signal passed from the high pas filter and for storing a voltage in response thereto. An output terminal is connected to the inverter circuit for providing a disabling signal to the inverter circuit based on the voltage stored by the capacitor.
In an embodiment, there is provided a ballast. The ballast includes: an inverter circuit to selectively energize one or more lamps, the inverter circuit having a transformer to provide voltage to the one or more lamps, wherein the transformer includes: a core; a primary winding wound on the core and connected to a direct current (DC) voltage bus; and a secondary winding wound on the core to connect to the one or more lamps; and a fault condition detection circuit connected to the inverter circuit to disable operation of the inverter circuit and thereby discontinue selective energization of the one or more lamps when a fault condition occurs, the fault condition detection circuit comprising: an other primary winding wound on the core of the transformer to receive a voltage signal proportional to a voltage across the secondary winding, the other primary winding having a first terminal and a second terminal, wherein the second terminal of the primary winding is connected to ground potential; a voltage blocking circuit connected to the first terminal of the other primary winding to receive the voltage signal from the other primary winding, the voltage blocking circuit configured to selectively conduct and block the received voltage signal as a function of the frequency of the received voltage signal; a capacitor connected between the voltage blocking circuit and ground potential to receive the conducted voltage signal from the voltage blocking circuit and to store a voltage in response thereto; wherein the voltage blocking circuit is configured to conduct the voltage signal received by the voltage blocking circuit and provide the conducted voltage signal to the capacitor when the frequency of the voltage signal received by the voltage blocking circuit exceeds a threshold frequency associated with normal operation of the one or more lamps; wherein the voltage blocking circuit is configured to block the voltage signal received by the voltage blocking circuit when the frequency of the voltage signal received by the voltage blocking circuit is less than or equal to the threshold frequency associated with normal operation of the one or more lamps; and an output terminal connected to the inverter circuit to provide a disabling signal to the inverter circuit based on the voltage stored by the capacitor.
In a related embodiment, the capacitor connected between the voltage blocking circuit and ground potential may be a first capacitor, and the voltage blocking circuit may include a second capacitor and a diode, the second capacitor and the diode connected together in series. In another related embodiment, the fault condition detection circuit may further include an operational amplifier connected between the capacitor and the output terminal to amplify the voltage stored by the capacitor. In a further related embodiment, the operational amplifier may be a differential operational amplifier having a non-inverting input terminal, an inverting input terminal, and an output terminal, and the fault condition detection circuit may further include a voltage supply connected between the inverting input terminal of the operational amplifier and ground potential, the non-inverting input terminal of the operational amplifier may be connected to the capacitor, and the output terminal of the operational amplifier may be connected to the output terminal of the fault condition detection circuit. In a further related embodiment, the fault condition detection circuit may further include a diode connected between the output terminal of the operational amplifier and the output terminal of the fault condition detection circuit. In another further related embodiment, the fault condition detection circuit may further include a resistor-capacitor circuit connected between the output terminal of the operational amplifier and the output terminal of the fault condition detection circuit. In a further related embodiment, the fault condition detection circuit may further include a diode having an anode and a cathode, the anode may be connected to the output terminal of the operational amplifier and the cathode may be connected to the resistor-capacitor circuit.
In yet another related embodiment, the threshold frequency associated with normal operation may be substantially 45 kilohertz. In still another related embodiment, the ballast may further include: a rectifier to receive an alternating current (AC) voltage signal from a power source and to produce a rectified voltage signal therefrom; and a power factor correction circuit to receive the rectified voltage signal and to provide a corrected voltage signal; wherein the inverter circuit may be connected to the power factor correction circuit via the DC voltage bus to receive the corrected voltage signal therefrom.
In another embodiment, there is provided a ballast. The ballast includes: an inverter circuit to selectively energize one or more lamps, the inverter circuit having a transformer to provide voltage to the one or more lamps, wherein the transformer includes: a core; a primary winding wound on the core and connected to a direct current (DC) voltage bus; and a secondary winding wound on the core for connecting to the one or more lamps; and a fault condition detection circuit connected to the inverter circuit to disable operation of the inverter circuit and thereby discontinue energization of the one or more lamps when a fault condition occurs, the fault condition detection circuit includes: an other primary winding wound on the core of the transformer to receive a voltage signal proportional to a voltage across the secondary winding, the other primary winding having a first terminal and a second terminal, wherein the second terminal of the primary winding is connected to ground potential; a high pass filter connected to the first terminal of the other primary winding to receive the voltage signal from the other primary winding, the high pass filter configured to pass the received voltage signal when the received voltage signal has a frequency exceeding a threshold frequency associated with normal operation and to block the received voltage signal when the received voltage signal has a frequency less than or equal to the threshold frequency associated with normal operation; a capacitor connected between the high pass filter and ground potential to receive the voltage signal passed from the high pass filter and to store a voltage in response thereto; and an output terminal connected to the inverter circuit to provide a disabling signal to the inverter circuit based on the voltage stored by the capacitor.
In a related embodiment, the capacitor connected between the high pass filter and ground potential may be a first capacitor, and the high pass filter may include a second capacitor. In a further related embodiment, a diode may be connected between the first capacitor and the second capacitor.
In another related embodiment, the fault condition detection circuit may further include an operational amplifier connected between the capacitor and the output terminal to amplify the voltage stored by the capacitor. In a further related embodiment, the operational amplifier may be a differential operational amplifier having a non-inverting input terminal, an inverting input terminal, and an output terminal, and the fault condition detection circuit may further include a voltage supply connected between the inverting input terminal of the operational amplifier and ground potential, the non-inverting input terminal of the operational amplifier may be connected to the capacitor, and the output terminal of the operational amplifier may be connected to the output terminal of the fault condition detection circuit. In a further related embodiment, the fault condition detection circuit may further include a resistor-capacitor circuit connected between the output terminal of the operational amplifier and the output terminal of the fault condition detection circuit. In another further related embodiment, the fault condition detection circuit may further include a diode connected between the output terminal of the operational amplifier and the output terminal of the fault condition detection circuit. In a further related embodiment, the fault condition detection circuit may further include a diode having an anode and a cathode, the anode may be connected to the output terminal of the operational amplifier and the cathode may be connected to the resistor-capacitor circuit.
In still another related embodiment, the threshold frequency associated with normal operation may be substantially 45 kilohertz.
In another embodiment, there is provided a ballast. The ballast includes: a rectifier to receive an alternating current (AC) voltage signal from a power source and to produce a rectified voltage signal therefrom; a power factor correction circuit to receive the rectified voltage signal and to provide a corrected voltage signal; an inverter circuit to receive the corrected voltage signal and to provide a lamp voltage to energize one or more lamps, the inverter circuit having a transformer to provide voltage to the one or more lamps, wherein the transformer includes: a core; a primary winding wound on the core and connected to the power factor correction circuit; and a secondary winding wound on the core to connect to the one or more lamps; and a fault condition detection circuit connected to the inverter circuit to disable operation of the inverter circuit and thereby discontinue energization of the one or more lamps when a fault condition occurs, the fault condition detection circuit includes: an other primary winding wound on the core of the transformer to receive a voltage signal proportional to a voltage across the secondary winding, the other primary winding having a first terminal and a second terminal, wherein the second terminal of the primary winding is connected to ground potential; a high pass filter connected to the first terminal of the other primary winding to receive the voltage signal from the other primary winding, the high pass filter configured to pass the received voltage signal when the received voltage signal has a frequency exceeding a threshold frequency associated with normal operation and to block the received voltage signal when the received voltage signal has a frequency less than or equal to the threshold frequency associated with normal operation; a capacitor connected between the high pass filter and ground potential to receive the voltage signal passed from the high pass filter and to store a voltage in response thereto; and an output terminal connected to the inverter circuit to provide a disabling signal to the inverter circuit based on the voltage stored by the capacitor.
In a related embodiment, the capacitor connected between the high pass filter and ground potential may be a first capacitor, and the high pass filter may include a second capacitor, and the ballast may further include a diode connected between the first capacitor and the second capacitor.
The foregoing and other objects, features and advantages disclosed herein will be apparent from the following description of particular embodiments disclosed herein, as illustrated in the accompanying drawings in which like reference characters refer to the same parts throughout the different views. The drawings are not necessarily to scale, emphasis instead being placed upon illustrating the principles disclosed herein.
The ballast 104 includes one or more input terminals adapted for connecting to the input power source 102 and a ground terminal connectable to ground potential. In some embodiments, the input power source 102 includes a first voltage source and a second voltage source. The ballast 104 is operatively connected to either the first voltage source or the second voltage source. Thus, the ballast 104 may selectively receive power from either the first voltage source (e.g., 208 volts AC) or the second voltage source (e.g., 347 volts, 480 volts). Other input power sources 102 known in the art may be used without departing from the scope of the present invention. Although the ballast 104 as shown in
The ballast 104 receives an input AC power signal from the input power source 102 via the input terminal. In some embodiments, the ballast 104 includes an electromagnetic interference (EMI) filter and a rectifier (e.g., full-wave rectifier), illustrated generally at 110. The EMI filter prevents noise, which may be generated by the ballast 104, from being transmitted back to the input power source 102. The rectifier converts AC voltage of the input power signal to DC (direct current) voltage.
The ballast 104 includes a power stage for converting power supplied by the input power source 102 to drive the lamp 106. In
The ballast 104 also includes a fault condition detection circuit 120 for detecting a fault condition associated with one or more of the lamps 106. When the fault condition detection circuit 120 detects the occurrence of a fault, such as but not limited to one of the lamps 106 breaking, the fault condition detection circuit 120 shuts down (i.e., disables) the inverter circuit 118 so that energization of the lamps 106 is discontinued. A fault condition occurs when the ballast 104 does not behave in an expected manner for any reason that is caused, in part, by a lamp 106. Thus, a fault condition may occur when a component of the ballast 104 suffers a total failure (e.g., the component ceases to function properly and must be replaced by a new, proper functioning component) as well as when a component of the ballast 104 suffers an intermittent transient failure (e.g., the component functions properly, then fails to function properly, but resumes proper functioning without any outside action being taken). For example, a fault condition may include the occurrence of a lamp 106 reaching the end of its life due to degradation of filaments. This condition is commonly referred to as “End of Life lamp (EOLL)” or “Diode mode lamp”. A fault condition may also include arcing between a pin of one of the lamps 106 and the lamp connector/holder into which that lamp 106 is placed, because of a small persistent gap between the pin and the lamp connector/holder.
In the lamp system 100, the fault condition detection circuit 120 includes an other primary winding (hereinafter “detect winding”) W3 of the output transformer, a voltage detection and conversion circuit 122, and an output terminal 123 connecting the fault condition detection circuit 120 to the inverter circuit 118. The detect winding W3 is coupled (e.g., magnetically coupled) with the primary winding W1 since they are wound on the same core. Accordingly, the detect winding W3 generates a voltage signal (also referred to throughout as a “detect winding signal”) that is proportional to the voltage across the secondary winding W2. In other words, the voltage across the secondary winding W2 is reflected in the voltage across the detect winding W3. In some embodiments, the voltage across the secondary winding W2, and thereby the voltage across the detect winding W3, oscillates during normal operation of the lamp(s) 106 at a frequency substantially similar to that of the lamp voltage. For example, the voltage across the primary winding W1, the secondary winding W2, and the detect winding W3 oscillates at a frequency of substantially 45 KHz during normal operation. As further described below, a fault condition associated with a lamp 106 causes an increase in the frequency of the voltage signal across the secondary winding W2 relative to the frequency of the voltage signal across the secondary winding W2 during normal operation of the lamp(s) 106. Since the voltage across the secondary winding W2 is reflected in the voltage across the detect winding W3, the frequency of the voltage signal across the detect winding W3 likewise increases during a fault condition relative to the frequency of the voltage signal across the detect winding W3 during normal operation of the lamp(s) 106. Thus, the detect winding W3 of the fault condition detection circuit 120 indicates a fault condition associated with a lamp(s) 106 via an increase in the frequency of the detect winding signal. The voltage detection and conversion circuit 122 is connected to the detect winding W3 and to the inverter circuit 118 via the output terminal 123. In operation, the voltage detection and conversion circuit 122 detects the increase in the frequency of the detect winding signal, and converts its output voltage to a voltage (i.e., shutdown signal) suitable for disabling the inverter circuit 118.
The inverter circuit 218 includes a shutdown circuit 230 connected between the base B and the emitter E of the second switch Q2 and connected to the fault condition detection circuit 120. For example, in some embodiments the shutdown circuit 230 includes a shutdown switch Q3 (not shown), such as but not limited to a silicon-controlled rectifier (SCR) latch, connected between the base B and the emitter E of the second switch Q2. When a fault is detected, the fault condition detection circuit 120 generates a shutdown signal from the increase in frequency of the detect winding signal. The shutdown signal is received by the shutdown switch Q3, causing the shutdown switch Q3 to turn on (i.e., operate in a conductive state), thereby shorting the base B and the emitter E of the second switch Q2 of the inverter circuit 218. This causes the inverter circuit 218 to discontinue the energization of the lamps 206A and 206B.
In
The voltage detection and conversion circuit 322 may, in some embodiments does, also include additional components for conditioning/converting the voltage stored by the capacitor C11 to a voltage suitable for disabling the inverter circuit of the ballast that includes the fault condition detection circuit 320. In some embodiments, an operational amplifier OPAMP amplifies the voltage stored by the capacitor C11. As generally known, the operational amplifier OPAMP has a non-inverting input terminal, an inverting input terminal, and an output terminal. The non-inverting input terminal is connected to the capacitor C11, and a voltage supply V5 is connected to the inverting input terminal. The operational amplifier OPAMP amplifies the difference between the voltage stored by the capacitor C11 and the voltage supply V5. The voltage supply V5 is a small voltage (e.g., 5 Volts) selected to cancel out any noise that may be present at the non-inverting input terminal. As such, the operational amplifier OPAMP generates an amplified voltage signal from the voltage stored by the capacitor C11 only when the voltage stored by the capacitor C11 exceeds the voltage provided by the voltage supply V5. Accordingly, the operational amplifier OPAMP prevents false triggering of the shutdown circuit 230 due to noise.
In some embodiments, a diode D15 is connected between the voltage blocking circuit 324 and the shutdown circuit 230. In operation, the diode D15 holds the voltage signal generated by the operational amplifier OPAMP for a short period of time after the fault condition occurrence, so that it is not discharged through the operational amplifier OPAMP output terminal when the fault is intermittently cleared. In some embodiments, a resistor-capacitor (RC) circuit is additionally and/or alternatively connected between the voltage blocking circuit 324 and the shutdown circuit 230 for holding a voltage at the output terminal 323 of the fault detection condition circuit 320 for a finite period of time, which enables the shutdown circuit 230 to be activated. In
Thus, the fault detection condition circuit 320 operates without (i.e., devoid of) a controller as an isolated circuit to detect various lamp-related faults and discontinue energization of the lamps 106 in response thereto. For example, the fault detection circuit 320 detects a fault if a lamp 106 is operating in diode mode. In general, if a lamp 106 begins operating in diode mode, the lamp 106 starts jittering (flashing on and off) at a relatively high frequency, causing the intermittent sputtering of lamp current and the voltage across output transformer winding L4 to oscillate at a relatively high frequency. The relatively high frequency of oscillation of the voltage across the transformer winding L4 is correspondingly reflected in the voltage across the detect winding L6. The increase in frequency of the voltage across the detect winding L6 causes a threshold voltage to be generated across the capacitor C11, as discussed above. The threshold voltage is amplified by the operational amplifier OPAMP and provided to the shutdown circuit 230 for a finite period of time defined by the RC time constant.
Unless otherwise stated, use of the word “substantially” may be construed to include a precise relationship, condition, arrangement, orientation, and/or other characteristic, and deviations thereof as understood by one of ordinary skill in the art, to the extent that such deviations do not materially affect the disclosed methods and systems.
Throughout the entirety of the present disclosure, use of the articles “a” and/or “an” and/or “the” to modify a noun may be understood to be used for convenience and to include one, or more than one, of the modified noun, unless otherwise specifically stated. The terms “comprising”, “including” and “having” are intended to be inclusive and mean that there may be additional elements other than the listed elements.
Elements, components, modules, and/or parts thereof that are described and/or otherwise portrayed through the figures to communicate with, be associated with, and/or be based on, something else, may be understood to so communicate, be associated with, and or be based on in a direct and/or indirect manner, unless otherwise stipulated herein.
Although the methods and systems have been described relative to a specific embodiment thereof, they are not so limited. Obviously many modifications and variations may become apparent in light of the above teachings. Many additional changes in the details, materials, and arrangement of parts, herein described and illustrated, may be made by those skilled in the art.
