Fault correction for Clifford circuits

Abstract

A method to correct a fault in application of a Clifford circuit to a qubit register of a quantum computer comprises: (A) receiving circuit data defining the Clifford circuit; (B) emitting outcome code based on the circuit data, the outcome code including a series of outcome checks each corresponding to an anticipated error syndrome of the application of the Clifford circuit to the qubit register; and (C) emitting space-time quantum code corresponding to the Clifford circuit based on the circuit data and on the outcome code, the space-time quantum code including a series of check operators that support quantum-error correction, thereby enabling fault correction in the application of the Clifford circuit to the qubit register.

Description

BACKGROUND

A quantum computer is a physical machine configured to execute logical operations based on or influenced by quantum-mechanical phenomena. Such logical operations may include, for example, mathematical computation. Current interest in quantum-computer technology is motivated by analysis suggesting that the computational efficiency of an appropriately configured quantum computer may surpass that of any practicable non-quantum computer when applied to certain types of problems. Such problems include computer modeling of natural and synthetic quantum systems, integer factorization, data searching, and function optimization as applied to systems of linear equations and machine learning.

SUMMARY

One aspect of this disclosure relates to a method to correct a fault in application of a Clifford circuit to a qubit register of a quantum computer. The method comprises: (A) receiving circuit data defining the Clifford circuit; (B) emitting outcome code based on the circuit data, the outcome code including a series of outcome checks each corresponding to an anticipated error syndrome of the application of the Clifford circuit to the qubit register; and (C) emitting space-time quantum code corresponding to the Clifford circuit based on the circuit data and on the outcome code, the space-time quantum code including a series of check operators that support quantum-error correction, thereby enabling fault correction in the application of the Clifford circuit to the qubit register.

Another aspect of this disclosure relates to a computer system coupled operatively to a quantum computer. The computer system comprises a processor and, operatively coupled to the processor, computer memory holding instructions that cause the processor to correct a fault in application of a Clifford circuit to a qubit register of the quantum computer. The instructions comprise: instructions (A) for receiving circuit data defining the Clifford circuit; instructions (B) for emitting outcome code based on the circuit data, the outcome code including a series of outcome checks each corresponding to an anticipated error syndrome of the application of the Clifford circuit to the qubit register; and instructions (C) for emitting space-time quantum code corresponding to the Clifford circuit based on the circuit data and the outcome code, the space-time quantum code including a series of check operators that support quantum-error correction, thereby enabling fault correction in the application of the Clifford circuit to the qubit register.

This Summary is provided to introduce in simplified form a selection of concepts that are further described in the Detailed Description. This Summary is not intended to identify key features or essential features of the claimed subject matter, nor is it intended to be used to limit the scope of the claimed subject matter. The claimed subject matter is not limited to implementations that solve any or all disadvantages noted in any part of this disclosure.

BRIEF DESCRIPTION OF THE DRAWINGS

FIG. 1 shows aspects of an example quantum computer.

FIG. 2 illustrates a Bloch sphere, which graphically represents the quantum state of one qubit of a quantum computer.

FIG. 3 shows aspects of an example signal waveform for effecting a quantum-gate operation in a quantum computer.

FIG. 4 shows aspects of reduction of the problem of correcting faults in a Clifford Circuit to the decoding of a quantum LDPC code.

FIG. 5A and FIG. 5B show aspects of a circuit with depth three made with Pauli measurements and unitary Clifford gates.

FIG. 6 shows aspects of an example method to correct a fault in the application of a Clifford circuit to a qubit register of a quantum computer

FIG. 7 shows aspects of an example algorithm for construction of the checks of the outcome code of a Clifford circuit.

FIG. 8 shows aspects of an example algorithm for construction of generators for a stabilizer group induced on a subset of qubits.

FIG. 9 shows aspects of an example algorithm for construction of low weight stabilizers of a space-time code.

FIG. 10 shows aspects of an example classical computer system.

DETAILED DESCRIPTION

1. Overview of Circuit-Fault Correction

Disclosed is a scheme for correction of faults in Clifford circuits, which applies not only to quantum error-correction circuits but to any Clifford circuit including redundant measurements. The construction relies on the observation that the set of all possible outcome bit-strings of a Clifford circuit is a linear code and therefore can be used to detect and correct faults in the circuit. Exploiting this property, the problem of correcting circuit faults is reduced to the correction of Pauli errors with a stabilizer code, which herein is called the space-time code of the circuit. To build the space-time code of the circuit, the circuit-to-code construction of Bacon, Flammia, Harrow and Shi [Ref. 1] is revisited and extended to include intermediate measurements and multi-qubit measurements.

This formalism is used to automate the construction of a full set of checks for detection and correction of circuit faults. Combined with a lookup decoder, this leads to a circuit-fault decoder exploiting all the redundancy available in the circuit. To go beyond the regime of the lookup decoder, which is only practical for small circuits, an algorithm is proposed for generating low-weight checks, which can be combined with efficient LDPC code decoders.

2. Quantum-Computer Architecture

In order to provide a context for circuit-fault correction, some aspects of an example quantum-computer architecture will first be described. Turning now to the drawings, FIG. 1 shows aspects of an example quantum computer 10 configured to execute quantum-logic operations (vide infra). Whereas conventional computer memory holds digital data in an array of bits and enacts bit-wise logic operations, a quantum computer holds data in an array of qubits and operates quantum-mechanically on the qubits in order to implement the desired logic. Accordingly, quantum computer 10 of FIG. 1 includes a set of qubit registers 12—e.g., state register 12S and ancillary register 12A. Each qubit register includes a series of qubits 14. The number of qubits in a qubit register is not particularly limited but may be determined based on the complexity of the quantum logic to be enacted by the quantum computer.

Qubits 14 of qubit register 12 may take various forms, depending on the desired architecture of quantum computer 10. Each qubit may comprise: a superconducting Josephson junction, a trapped ion, a trapped atom coupled to a high-finesse cavity, an atom or molecule confined within a fullerene, an ion or neutral dopant atom confined within a host lattice, a quantum dot exhibiting discrete spatial- or spin-electronic states, electron holes in semiconductor junctions entrained via an electrostatic trap, a coupled quantum-wire pair, an atomic nucleus addressable by magnetic resonance, a free electron in helium, a molecular magnet, or a metal-like carbon nanosphere, as non-limiting examples. A qubit may be implemented in the plural processing states corresponding to different modes of light propagation through linear optical elements (e.g., mirrors, beam splitters and phase shifters), as well as in states accumulated within a Bose-Einstein condensate. More generally, each qubit 14 may comprise any particle or system of particles that can exist in two or more discrete quantum states that can be measured and manipulated experimentally.

FIG. 2 is an illustration of a Bloch sphere 16, which provides a graphical description of some quantum mechanical aspects of an individual qubit 14. In this description, the north and south poles of the Bloch sphere correspond to the standard basis vectors |0 and |1, respectively—up and down spin states, for example, of an electron or other fermion. The set of points on the surface of the Bloch sphere comprise all possible pure states |ψ of the qubit, while the interior points correspond to all possible mixed states. A mixed state of a given qubit may result from decoherence, which may occur because of undesirable coupling to external degrees of freedom.

Returning now to FIG. 1, quantum computer 10 includes a controller 18. The controller may include at least one processor 20 and associated computer memory 22. Processor 20 may be coupled operatively to peripheral componentry, such as network componentry, to enable the quantum computer to be operated remotely. Processor 20 may take the form of a central processing unit (CPU), a graphics processing unit (GPU), or the like. As such, controller 18 may comprise classical electronic componentry. The terms ‘classical’ and ‘non-quantum’ are applied herein to any component that can be modeled accurately without considering the quantum state of any individual particle therein. Classical electronic components include integrated, microlithographed transistors, resistors, and capacitors, for example. Computer memory 22 may be configured to hold program instructions 24 that cause processor 20 to execute any function or process of controller 18. The computer memory may also be configured to hold additional data 26. In some examples, data 26 may include a register of classical control bits 28 that influence the operation of the quantum computer during run time—e.g., to provide classical control input to one or more quantum-gate operations. In examples in which qubit register 12 is a low-temperature or cryogenic device, controller 18 may include control componentry operable at low or cryogenic temperatures—e.g., a field-programmable gate array (FPGA) operated at 77K. In such examples, the low-temperature control componentry may be coupled operatively to interface componentry operable at normal temperatures.

Controller 18 of quantum computer 10 is configured to receive a plurality of inputs 30 and to provide a plurality of outputs 32. The inputs and outputs may each comprise digital and/or analog lines. At least some of the inputs and outputs may be data lines through which data is provided to and/or extracted from the quantum computer. Other inputs may comprise control lines via which the operation of the quantum computer may be adjusted or otherwise controlled.

Controller 18 is operatively coupled to qubit registers 12 via quantum interface 34. The quantum interface is configured to exchange data (solid lines) bidirectionally with the controller. The quantum interface is further configured to exchange signal associated with the data (dashed lines) bidirectionally with the qubit registers. Depending on the physical implementation of qubits 14, such signal may include electrical, magnetic, and/or optical signal. Via signal conveyed through the quantum interface, the controller may interrogate and otherwise influence the quantum state held in any, some, or all of the qubit registers, as defined by the collective quantum state of the qubits therein. To that end, the quantum interface includes qubit writer 36 and qubit reader 38. The qubit writer is configured to output a signal to one or more qubits of a qubit register based on write-data received from the controller. The qubit reader is configured to sense a signal from one or more qubits of a qubit register and to output read-data to the controller based on the signal. The read-data received from the qubit reader may, in some examples, be an estimate of an observable to the measurement of the quantum state held in a qubit register. Taken together, controller 18 and interface 34 may be referred to as a ‘controller system’.

In some examples, suitably configured signal from qubit writer 36 may interact physically with one or more qubits 14 of a qubit register 12, to trigger measurement of the quantum state held in the one or more qubits. Qubit reader 38 may then sense a resulting signal released by the one or more qubits pursuant to the measurement, and may furnish read-data corresponding to the resulting signal to controller 18. Stated another way, the qubit reader may be configured to output, based on the signal received, an estimate of one or more observables reflecting the quantum state of one or more qubits of a qubit register, and to furnish the estimate to controller 18. In one non-limiting example, the qubit writer may provide, based on data from the controller, an appropriate voltage pulse or pulse train to an electrode of one or more qubits, to initiate a measurement. In short order, the qubit reader may sense photon emission from the one or more qubits and may assert a corresponding digital voltage level on a quantum-interface line into the controller. Generally speaking, any measurement of a quantum-mechanical state is defined by the operator O corresponding to the observable to be measured; the result R of the measurement is guaranteed to be one of the allowed eigenvalues of O. In quantum computer 10, R is statistically related to the qubit-register state prior to the measurement, but is not uniquely determined by the qubit-register state.

Pursuant to appropriate input from controller 18, quantum interface 34 may be configured to implement one or more quantum-logic gates to operate on the quantum state held in a qubit register 12. The term ‘state vector’ refers herein to the quantum state held in the series of qubits 14S of state register 12S of quantum computer 10. The state vector is a convenient representation that may be used to interpret measurement outcomes. Whereas the function of each type of logic gate of a classical computer system is described according to a corresponding truth table, the function of each type of quantum gate is described by a corresponding operator matrix. The operator matrix operates on (i.e., multiplies) the complex vector representing a qubit register state and effects a specified rotation of that vector in Hilbert space.

For example, the Hadamard gate H is defined by

$\begin{array}{cc}H=\frac{1}{\sqrt{2}}\left[\begin{array}{cc}1& 1\\ 1& -1\end{array}\right].& \left(1\right)\end{array}$ The H gate acts on a single qubit; it maps the basis state |0 to (|0+|1)/√{square root over (2)}, and maps |1 to (|0−|1)/√{square root over (2)}. Accordingly, the H gate creates a superposition of states that, when measured, have equal probability of revealing |0 or |1.

The phase gate S is defined by

$\begin{array}{cc}S=\left[\begin{array}{cc}1& 0\\ 0& e^{i\pi /2}\end{array}\right].& \left(2\right)\end{array}$ The S gate leaves the basis state |0 unchanged but maps |1 to e^iπ/2|1. Accordingly, the probability of measuring either |0 or |1 is unchanged by this gate, but the phase of the quantum state of the qubit is shifted. This is equivalent to rotating ψ by 90 degrees along a circle of latitude on the Bloch sphere of FIG. 2.

Some quantum gates operate on two or more qubits. The SWAP gate, for example, acts on two distinct qubits and swaps their values. This gate is defined by

$\begin{array}{cc}\mathrm{SWAP}=\left[\begin{array}{cccc}1& 0& 0& 0\\ 0& 0& 1& 0\\ 0& 1& 0& 0\\ 0& 0& 0& 1\end{array}\right].& \left(3\right)\end{array}$

A ‘Clifford gate’ is a quantum gate that belongs to the Clifford group—viz., a set of quantum gates that effect permutations of the Pauli operators. For the n-qubit case the Pauli operators form a groupP_n={e^iθπ/2σ_j1⊗ . . . ⊗σ_jn|θ=0,1,2,3,j_k=0,1,2,3},  (4)where σ₀, . . . σ₃ are the single-qubit Pauli matrices. The Clifford group is then defined as the group of unitaries that normalize the Pauli group,C_n={V∈U_2n|VP_nV^†=P_n}.  (5)

The foregoing list of quantum gates and associated operator matrices is non-exhaustive, but is provided for ease of illustration. Other quantum gates include Pauli −X, −Y, and −Z gates, the √{square root over (NOT)} gate, additional phase-shift gates, the √{square root over (SWAP)} gate, controlled cX, cY, and cZ gates, and the Toffoli, Fredkin, Ising, and Deutsch gates, as non-limiting examples.

Continuing in FIG. 1, suitably configured signal from qubit writer 36 of quantum interface 34 may interact physically with one or more qubits 14 of a qubit register 12 so as to assert any desired quantum-gate operation. As noted above, the desired quantum-gate operations include specifically defined rotations of a complex vector representing a qubit register state. In some examples, in order to effect a desired rotation O, the qubit writer may apply a predetermined signal level S_i for a predetermined duration T_i. In some examples, plural signal levels may be applied for plural sequenced or otherwise associated durations, as shown in FIG. 3, to assert a quantum-gate operation on one or more qubits of a qubit register. In general, each signal level S_i and each duration T_i is a control parameter adjustable by appropriate programming of controller 18.

The terms ‘oracle’ and ‘quantum algorithm’ are used herein to describe a predetermined sequence of elementary quantum-gate and/or measurement operations executable by quantum computer 10. An oracle may be used to transform the quantum state of a qubit register 12 to effect a classical or non-elementary quantum-gate operation or to apply a density operator, for example. In some examples, an oracle may be used to enact a predefined ‘black-box’ operation f(x), which may be incorporated into a complex sequence of operations. To ensure adjoint operation, an oracle mapping n input qubits |x to m output or ancilla qubits |y=f(x) may be defined as a quantum gate O(|x⊗|y) operating on the (n+m) qubits. In this case, O may be configured to pass the n input qubits unchanged but combine the result of the operation f(x) with the ancillary qubits via an XOR operation, such that O(|x⊗|y)=|x⊗|y⊕f(x).

Implicit in the description herein is that each qubit 14 of any qubit register 12 may be interrogated via quantum interface 34 so as to reveal with confidence the standard basis vector |0 or |1 that characterizes the quantum state of that qubit. In some implementations, however, measurement of the quantum state of a physical qubit may be subject to error. Accordingly, any qubit 14 may be implemented as a logical qubit, which includes a grouping of physical qubits measured according to an error-correcting oracle that reveals the quantum state of the logical qubit with above-threshold confidence.

3. Introduction to Circuit-Fault Correction

Several small quantum computing platforms are available today. However, the high noise rate of quantum hardware is a major obstacle to the scalability. Some form of quantum error correction is desirable to achieve a noise rate sufficiently low to run quantum algorithms capable of solving large-scale industrial problems.

Disclosed herein is a method for correction of faults in Clifford circuits. These circuits are used, inter alia, to implement standard protocols such as quantum teleportation, preparation of Bell states, and quantum error correction with stabilizer codes. Even though they are not universal for quantum computing one can achieve universality with Clifford circuit by injection of magic states [Ref. 2].

Considered herein are circuits made with unitary Clifford gates and Pauli measurements. Not only single-qubit measurements, but all Pauli measurements are permitted, as well as internal measurements that can occur at any time step of the circuit.

Each run of a Clifford circuit produces a classical bit-string. The basic idea is to correct circuit faults using the redundancy in these bit-strings. It is proved that the set of all possible outcome bit-strings of a Clifford circuit is a linear code (up to relabeling the measurement outcomes). An algorithm is disclosed that returns a complete set of checks for this linear code.

One can directly use this outcome code to detect and correct circuit faults. However, this requires construction of a decoder, which is generally a non-trivial task. Instead of constructing a new decoder that maps check values onto circuit faults, the approach herein is to construct a stabilizer code associated with a Clifford circuit, the space-time code, with the property that the measurement of the stabilizer generators of the space-time code returns the value of the checks of the outcome code. It is then shown that one can design a circuit decoder that returns a most likely fault configuration using a most likely error decoder for the space-time stabilizer code.

The space-time code used in this disclosure is related to the circuit-to-code construction of Bacon, Flammia, Harrow and Shi [Ref. 1]. In this reference, the authors proposed a construction of subsystem codes from a class of Clifford circuits with the goal of building new subsystem codes. They considered a subclass of post-selection circuits and computed the parameters of the subsystem code as a function of the input circuit. The space-time code considered in the present work can be seen as the stabilizer code associated with the subsystem code of [Ref. 1] after generalizing their construction to arbitrary Clifford circuits. More specifically, multi-qubit Pauli measurements are added, and measurements are permitted at any time-step of the circuit.

This disclosure provides alternative proofs of the properties of the space-time code based on the relation between the forward and the backward propagation of the faults through the circuit. In particular, it is proved that the backpropagation operator is the adjoint of the propagation operator. This relation could be relevant for other applications also.

Based on reduction of the problem of circuit-fault correction to construction of a decoder for the space-time code, one can build a scheme for the correction of any small Clifford circuit using a lookup decoder. Even though the construction of a lookup decoder can be optimized [Ref. 3], it is limited to small system sizes. To expand the range of application of this scheme, an algorithm to produce a set of low-weight stabilizer generators for the space-time code is proposed, which results in a low-density parity-check (LDPC) space-time code, for which efficient decoders exist [Ref. 4], [Ref. 5], [Ref. 6], [Ref. 7]. Starting from a local code in D dimensions the algorithm produces local stabilizer generators in D+1 dimensions for the space-time code, and topological code decoders such as the renormalization-group decoder [Ref. 8] may then be used.

The fault-correction scheme herein applies to any Clifford circuit, but the case of a syndrome extraction circuit of a quantum error-correction code is of special interest. The design of a quantum error-correction scheme is a non-trivial task which requires (i) a syndrome extraction circuit, (ii) a syndrome map, (iii) a decoder. Based on this disclosure the construction of the syndrome map and the decoder can be automated in some cases. No performance guarantee for the resulting scheme is provided, and it is believed that some specialized schemes, highly optimized for a specific circuit, are likely to perform better. The main advantage of the approach here is its flexibility. This approach only requires the circuit to be given as an input and it applies to codes implemented with Clifford operations or Pauli measurements. This includes for instance CNOT-based surface codes [Ref. 9], [Ref. 10] or color codes [Ref. 11], Majorana-based surface codes [Ref. 12] or Floquet codes [Ref. 13] that are implemented with only joint measurements.

FIG. 4 shows aspects of the reduction of the problem of correcting faults in a Clifford circuit 40 to the decoding of a quantum LDPC code 42. The LDPC code produced can be decoded using any quantum LDPC-code decoder, thereby providing an end-to-end strategy for the correction of faults in the Clifford circuit given only the circuit as an input. The first step 44 which produces the outcome code 46 is described in Algorithm 1. Section 8 explains the construction 48 of the space-time code 50 from the outcome code. The low-weight generators of the space-time code are obtained using Algorithm 3. Finally the LDPC space-time code is emitted via construction, at 52, of low-weight stabilizers for the space-time code. The whole procedure runs in polynomial time. This procedure results in a trivial LDPC space-time code if the input circuit has no redundancy or if the space-time code has no generator with weight≤M. In Section 9, sufficient conditions for the existence of low-weight generators for the space-time code of a circuit are provided.

The balance of this disclosure is organized as follows. Technical context is introduced in Section 4. Then, Section 5 proves some core technical results and establishes the relation between the propagation and the backpropagation operators. The outcome code is defined in Section 6 which also describes an algorithm (Algorithm 1) to compute a complete set of checks for this code. The stabilizer generators of the space-time code are introduced in Section 7 and Section 8 proves that a most-likely error decoder for the space-time code can be converted into a circuit decoder that returns a most likely set of faults (Theorem 2). Section 9 provides an algorithm (Algorithm 3) to generate low-weight stabilizer for the space-time code. Finally, in Section 10, the solution is integrated and the implementation of an automated scheme for the correction of circuit faults in Clifford circuits is discussed.

4. Technical Context

4.1. Linear Codes

A linear code with length n is a ₂-linear subspace of ₂ⁿ. It encodes k bits into n bits where k is the dimension of the code.

The dual code of a linear code C with length n, denoted C^⊥, is the set of vectors of ₂ⁿ that are orthogonal with all the vectors of C. In this context, the term ‘orthogonal’ means orthogonal for the binary inner product (u|v)=Σ_i=1ⁿu_iv_i (mod 2). In some instances the vectors of the dual codes are referred to as the check of the code because the code is fully defined the relations (u_i|v)=0 where u_i runs over a basis for the dual code.

One can define a linear code by providing a set of generators of the code or by providing a set of generators of the dual code. Given a set of generators of the dual code u₁, . . . , u_r∈₂ⁿ, the code is the set of vectors v∈₂ⁿ that satisfy (u_i|v)=0 for all i=1, . . . , r. Vectors u_i are referred to as the checks of the code.

The syndrome map associated with the checks u₁, . . . , u_r∈₂ⁿ is the mapσ:₂ⁿ→₂^r  (6)that sends a vector v onto the vector s whose i th component is s_i=(u_i|v). The vector s is called the syndrome of u. The value of the syndrome of a vector can be used to correct some bit flips affecting this vector and to map it back to the code space.

4.2. Stabilizer Codes

A stabilizer code with length n is defined by a set of commuting n-qubit Pauli operators , called stabilizer generators, such that the group they generate does not contain −I. The group is referred to as the stabilizer group of the code, and a Pauli operator P such that ±P∈ is called a stabilizer.

The code space of a stabilizer code with length n is the subspace of (₂)^⊗n that is invariant under the stabilizer generators. If stab contains r independent operators, the code space is a subspace of (₂)^⊗n isomorphic with (₂)^⊗n-r. This subspace is interpreted as the encoding of k=n−r qubits into n qubits.

Error correction with a stabilizer code is based on the measurement of a set of stabilizer generators ={S₁, . . . , S_r}. This produces an outcome σ∈₂^r called the syndrome. Here the outcome σ_i corresponds to the eigenvalue (−1)^σi for the i th measured stabilizer generator. If the state of the system before syndrome measurement is a code state suffering from Pauli error E∈_n, then the measurement returns a syndrome σ such that σ_i=[E,S_i] where [E,S_i] is 0 if E and S_i commute and 1 otherwise. In the absence of error, the syndrome is trivial. Therefore, a non-trivial syndrome can be used to detect and correct errors on encoded states.

In what follows, _n denotes the set of n-qubit Pauli operators and _n is its quotient by the phase operators {±I,±iI}. In other words, considered in _n are the Pauli operators up to a phase. It is natural to consider Pauli errors up to a phase because a global phase has no effect on quantum states.

Provided is a Pauli noise model which prescribes the probability of each Pauli error. A most likely error decoder (MLE decoder) is a map ₂^r_n that sends a syndrome σ onto a Pauli error E which has maximum probability among the error with syndrome σ.

A logical operator for a stabilizer code with length n is a Pauli operator that commutes with all the stabilizer generators of the code. It is a non-trivial logical operator if in addition it is not a stabilizer.

In what follows, for any subset A of _n,A^⊥={Q∈_n|∀P∈A,[P,Q]=0}  (7)for the set of n-qubit Pauli operators that commute with all the elements of A. If is a stabilizer group, then ^⊥ is the set of logical operators and ^⊥\ is the set of non-trivial logical operators of the code.

4.3. Clifford Circuits

This disclosure considers circuits made with the following operations: (a) unitary Clifford gate, and (b) Pauli measurements. One can use these operations to prepare a qubit in the state |0 using a measurement Z. It is assumed that all the qubits are present at the beginning of the circuit and that no qubit can be added through the circuit. This is not a restriction because a qubit can be reinitialized using a single qubit measurement as explained above. No restriction is placed on the size of the support of allowed operations, but the results also apply to circuits limited to single-qubit and two-qubit gates or circuit respecting a given qubit connectivity where only operations acting on neighboring qubits are available.

A Clifford circuit is a sequence of s Clifford operations =(C₁, . . . , C_s) applied to n qubits. Each operation C_i is applied at a given time step level(C_i)∈{1, 2, . . . } called the level of the operation. The depth of a circuit, denoted Δ(), is the maximum level of its operations. To guarantee that they can be implemented simultaneously, it is required that two operations with the same level have disjoint support. In what follows, it is assumed that the circuit operations are given in chronological order, that is i≤j implies level(C_i)≤level(C_j).

The state of the n qubits of the circuit before the first circuit operation is referred to as the input state of the circuit and the final state of the n qubits is the output state of the circuit. No constraint is placed on the input state of the circuit.

Throughout this disclosure, m denotes the number of Pauli measurements in the circuit and S₁, . . . , S_m denotes the measured operators. For all j=1, . . . , m, the level of the measurement S_j is denoted _j. By definition, 0≤m≤s, and each _j is an integer in the set {1, . . . , Δ}.

4.4. Circuit Faults

The standard circuit noise model is considered, where each circuit operation C_i and each waiting qubit is faulty with probability p_i. If a unitary gate or a waiting qubit is faulty, it is followed by a uniform random Pauli error E acting on its support. A faulty measurement is followed by a uniform random Pauli error E acting on its support combined with a flip of the measurement outcome with probability 1/2.

In light of [Ref. 1], it is convenient to represent faults as Pauli operators acting on half-integer time steps as shown in FIG. 5A and FIG. 5B (vide infra). A fault operator for a circuit acting on n qubits with depth Δ is a Pauli operator F∈_n(Δ+1) acting on n(Δ+1) qubits indexed by pairs (+0.5,q) where ∈{0, 1, . . . , Δ} represents a level of the circuit and q∈{1, . . . , n} corresponds to a qubit. =0 is included to represent faults on the input qubits of the circuit. The component of F on qubit (+0.5,q) is denoted F_+0.5,q∈{I, X, Y, Z}. It corresponds to the fault occurring right after level on qubit q. The notation F_+0.5 is used for the n-qubit Pauli operator ⊗_q=1ⁿ which represents the fault occurring right after the level of the circuit.

The flip of a measurement outcome can also be represented as a fault operator. Let P∈_n be a measured Pauli operator and let Q∈_n be a weight-one operator Q that anti-commutes with P. Then, the fault operator F such that =Q and =Q is a representation of the flip of the outcome of the measurement of P at level .

Throughout this disclosure, it is assumed that a noise model is provided, which describes the probability of each combination of circuit faults. The corresponding probability distribution over the set of fault operators is denoted by .

4.5. Propagation of Pauli Faults

The effect of a set of faults on the outcomes of a circuit can be determined by propagating the faults through the circuit as shown.

FIG. 5A and FIG. 5B show aspects of a circuit with depth three made with Pauli measurements and unitary Clifford gates. Pauli faults are supported on the white circles. More specifically, a fault operator is shown in FIG. 5A and its backpropagation in FIG. 5B. In this circuit, the third measurement is redundant and the three measurement outcomes o₁, o₂, o₃ satisfy o₁+o₂+o₃=0 (mod 2). This defines a check of the outcome code. The stabilizer generator of the space-time code corresponding to this check is obtained by the backpropagation of the three measurements through the circuit. This results in the weight-four Pauli operator shown in FIG. 5B supported on the circles.

The basic idea of fault propagation is that a Pauli fault P∈_n occurring before a unitary operation U is equivalent to a fault UPU⁻¹ after the operation g. UPU⁻¹ refers to the conjugation of P by U. In the case of a Pauli measurement, a fault propagates through the corresponding projector unchanged, and it leads to a flip of the measurement outcome if the Pauli fault preceding the measurement anti-commutes with the measured operator.

The propagation of a fault operator F through a circuit with depth Δ, is the fault operator denoted {right arrow over (F)} obtained by the following procedure.

• • 1. Initialize {right arrow over (F)} as {right arrow over (F)}=F.
  • 2. For all level =1, 2, . . . , Δ do:
    • (a) Let E=
    • (b) Conjugate E by the product of all unitary operations of with level .
    • (c) Multiply by E.When propagating through the operations with level , the order in which these operations are selected is not relevant because they do not overlap.

The propagation {right arrow over (F)} is defined in such a way that the operator is the Pauli error resulting from all the faults occurring during the first levels of the circuit.

4.6. Effect of Circuit Faults

Consider a Clifford circuit acting on n qubits with depth Δ. Assume that the circuit contains m Pauli measurements. The m measured operators are denoted by S₁, . . . , S_m and for all j=1, . . . , m_j denotes the level of the measurement of the operator S_j.

Executing the quantum circuit produces two types of data: (a) The outcome vector o∈₂^m is the bit string whose j th component is the outcome of the measurement of S_j; and (b) The output state ρ_o is the state of the n qubits of the system after running the circuit. The outcome vector is generally not deterministic. denotes the outcome distribution of the circuit when the input state of the circuit is ρ, i.e. the circuit returns the outcome vector o with probability (o). The output state ρ_o generally depends on the outcome vector o. A set of circuit faults represented by a fault operator F∈_n(Δ+1) can affect the outcome vector and the output state of the circuit.

The goal is to protect the outcome vector and the output state of the circuit from the effect of faults occurring throughout the circuit. Faults are represented by a fault operator F∈_n(Δ+1). The notation is used for the outcome distribution of the circuit with input state ρ with faults corresponding to F and the output state is denoted by ρ_o^(F). The following proposition describes the effect of faults on the outcome vector and the output state.

Proposition 1. [Effect of faults] If F∈_n(Δ+1) then,(o)=(o+f) where f=(f₁, . . . ,f_m)∈₂^m such that f_j=[,S_j],  (8)ρ₀^(F)=Eρ_o+fE where E={right arrow over (F)}_Δ+0.5.  (9)

The pair f,E associated with a fault operator F is called the effect of F and is denoted eff(F). In what follows, it is said that F flips the j th outcome of the circuit if [S_j]=1, and the Pauli error E={right arrow over (F)}_Δ+0.5 refers to the residual error of F.

Proof. By definition of the propagation, the accumulation of the circuit faults occurring before the measurement of S_j is equivalent to the Pauli error As a result, an outcome vector o is mapped onto the vector o+f given in the proposition. When the vector o is observed, the output state is the state Eρ_o+fE because o was mapped onto o+f and the accumulation of all the circuit faults acts as an error E={right arrow over (F)}_Δ+0.5 on the output state of the circuit.

4.7. Correction of Circuit Faults with Circuit Decoders

For the circuit to be correct in the presence of faults, it must be guaranteed that both the outcome vector and the output states can be recovered. An error affecting the outcome vector can be just as harmful as an error on the output state. For example, one can prepare a state |+ by measuring X, which produces either |+ with outcome 0 or |− with outcome 1. To obtain the state |+, Z is applied to the qubit when the outcome 1 is observed. An incorrect outcome in this protocol directly translates into a qubit error.

The output of the circuit lives in a stabilizer code and therefore it is sufficient to correct the residual error up to a stabilizer of this code. Formally, define the output stabilizer group of the circuit, denoted , to be the stabilizer group that keeps invariant all the possible output states ρ_o of the circuit corresponding to the outcome o. An operator of is an output stabilizer, and the stabilizer code associated with the stabilizer group generated by is the output stabilizer code of the circuit. The output stabilizer group of a circuit can be computed efficiently as in Algorithm 1.

A circuit decoder for the circuit is defined to be a map₂^m→₂^m×_n  (10)o({circumflex over (f)},Ê)  (11)that takes as an input an outcome vector o and that returns an estimation of the outcome flips {circumflex over (f)} and an estimation of the residual error Ê.

Assume that the faults corresponding to F∈_n(Δ+1) occur and let (f,E)=eff(F) be the effect of F. The decoder is said to be successful if {circumflex over (f)}=f and if the error ÊE is correctable for the output stabilizer code. In this context, ‘correctable’ means correctable for the output stabilizer code equipped with a decoder and a noiseless syndrome extraction circuit for the measurement of the stabilizer generators. This notion of correctability depends on the decoder used for the output code. Unless otherwise stated, a minimum weight error decoder is selected for the output code—i.e., a decoder returning a minimum weight Pauli error for a given syndrome.

Denote by ρ_M the density matrix of the maximally mixed state

${\rho }_M={\left(\frac{I}{2}\right)}^{{\otimes }_n}.$ A most likely fault operator given an outcome vector o∈₂^m is defined to be a fault operator {circumflex over (F)}∈_n(Δ+1) that maximizes the productQ_MLF({circumflex over (F)},o)=(o)({circumflex over (F)}).  (12)This definition is motivated by Bayes' theorem, from which the probability of a fault operator {circumflex over (F)} given an outcome o can be written as

$\begin{array}{cc}\mathbb{P}\left(\hat{F}❘o\right)=\frac{{\mathbb{P}}_{𝒞,{\rho }_M}^{\left(\hat{F}\right)}\left(o\right){\mathbb{P}}_{}\left(\hat{F}\right)}{{\sum }_{\hat{F}\in {n\left(\Delta +1\right)}_{}}{\mathbb{P}}_{}\left(\hat{F}\right){\mathbb{P}}_{𝒞,{\rho }_M}^{\left(\hat{F}\right)}\left(o\right)}& \left(13\right)\end{array}$ where the input state of the circuit is chosen to be the maximally mixed state ρ_M because no specific input state is assumed. For a fixed circuit and a fixed outcome vector, this number is proportional with (o)({circumflex over (F)}) because the denominator is independent of {circumflex over (F)}.

A circuit decoder that returns the effect of a most likely fault operator is said to be a most likely fault decoder or MLF decoder.

5. Properties of the Fault Propagation

This section introduces the main technical tools of this disclosure. Introduced here is the backpropagation, and it is shown in Proposition 3 that it is the adjoint of the propagation. This relation makes it possible to replace the fault propagation by the backpropagation of the measured operators and leads to the definition of stabilizer generators of the space-time code in Section 7.

5.1. Definition of the Backpropagation

The backpropagation of a fault operator F, denoted , is defined similarly to the propagation with the following procedure.

• • 1. Initialize as =F.
  • 2. For all level =Δ, Δ−1, . . . , 1 do:
    • (a) Let E=
    • (b) Conjugate E by the inverse of the product of all unitary operations of with level .
    • (c) Multiply by E.

Similarly to the propagation, the backpropagation is defined in such a way that the operator is equivalent to the accumulation of all the faults occurring during the levels ′≤ of the circuit.

5.2. Explicit Propagation and Back-Propagation

The following proposition provides an explicit description of the propagation of a fault operator.

Proposition 2. [Explicit propagation and backpropagation] Let be a Clifford circuit. Let be the product of all the unitary operations of the circuit with level and let U_i,j=U_jU_j−1 . . . U_i+1 for j≥i. If F is a fault operator then for all ∈{0, 1, . . . , Δ},

$\begin{array}{cc}{\overrightarrow{F}}_{+0.5}=\prod _{i=0}^{}{U}_{i,}{F}_{i+0.5}{U}_{i,}^{-1}& \left(14\right)\end{array}$ $\mathrm{and}$ $\begin{array}{cc}{\overleftarrow{F}}_{+0.5}=\prod _{j=}^{\Delta }{U}_{,j}^{-1}{F}_{j+0.5}{U}_{,j}.& \left(15\right)\end{array}$ Therein, by convention, U_i,j=I if j≤i. When j>i, the operation U_i,j is defined in such a way that it maps the faults occurring right after level i onto equivalent faults occurring right after level j.

Proof. The component of {right arrow over (F)} is obtained by conjugating all the components F_i+0.5 of F with i≤ through the level i+1, i+2, . . . of the circuit. This corresponds to the conjugation by , justifying the propagation formula.

To back-propagate F_j+0.5 from level j+0.5 to level +0.5 with j≥, this operator is conjugated by the inverse of the unitary operations of the circuit at levels , −1, . . . , j+1 in that order. This is equivalent to the conjugation byU_j+1⁻¹ . . .   (16)which is equal to .

The operators U_i,j obey the relationsU_a,c=U_b,cU_a,b,  (17)U_b,c⁻¹U_a,c=U_a,b  (18)andU_a,bU_a,c⁻¹=U_b,c⁻¹  (19)where a, b, c are three integers such that 0≤a≤b≤c≤Δ.

Corollary 1. The propagation map and the backpropagation map are automorphisms of the group _n(Δ+1).

Thanks to this corollary, one can write{right arrow over (FG)}={right arrow over (F)}{right arrow over (G)}  (20)and=  (21)for all fault operators F,G.

Proof. Based on Eq. (14),

$\begin{array}{cc}{\overrightarrow{\mathrm{FG}}}_{+0.5}=\prod _{i=0}^{}{U}_{i,}{F}_{i+0.5}{G}_{i+0.5}{U}_{i,}^{-1}& \left(22\right)\end{array}$ $\begin{array}{cc}=\prod _{i=0}^{}{U}_{i,}{F}_{i=0.5}{U}_{i,}^{-1}{U}_{i,}{G}_{i+0.5}{G}_{i+0.5}{U}_{i,}^{-1}& \left(23\right)\end{array}$ $\begin{array}{cc}=\prod _{i=0}^{}{U}_{i,}{F}_{i+0.5}{U}_{i,}^{-1}\prod _{j=0}^{}{U}_{j,}{G}_{j+0.5}{U}_{j,}^{-1}& \left(24\right)\end{array}$ $\begin{array}{cc}={\overrightarrow{F}}_{+0.5}{\overrightarrow{G}}_{+0.5}& \left(25\right)\end{array}$ Therein, it is possible to reorder the Pauli operators F_i+0.5 and G_j+0.5 because Pauli operators are considered up to a phase. This proves that the propagation map is a group morphism.

Therefore, the propagation map is ₂-linear map over _n(Δ+1)≃₂^2n(Δ+1). To show that it is bijective, it suffices to see that its matrix is lower triangular with the identity on the diagonal in the basis obtained by concatenating a basis of Pauli operators acting on level 0, 1, . . . , Δ. One can show that the backpropagation is a group automorphism with the same technique.

5.3. Basic Properties of Pauli Commutators

For two Pauli operators P and Q, denote by [P,Q]∈₂ the commutator of P and Q which takes the value 0 if P and Q commute and takes the value 1 otherwise.

In what follows, the following basic properties of the commutator are used. Let n,m be integers. For all Pauli operators P,Q∈_n,[P,Q]=[Q,P].  (26)For all Pauli operators P, Q, R∈_n,[P,QR]=[P,Q]+[P,R](mod 2).  (27)For all Pauli operators P,Q∈_n and P′,Q′∈_m,[P⊗P′,Q⊗Q′]=[P,Q]+[P′,Q′](mod 2).  (28)For all Pauli operators P,Q∈_n and for all Clifford unitary operations U,[P,Q]=[UPU⁻¹,UQU⁻¹].  (29)

5.4. Interplay Between Fault Propagation and Commutation

Based on Proposition 1, to clarify the effect of faults on the outcomes of a circuit, it is important to understand the interplay between fault propagation and commutation. The following proposition is a key technical result of this disclosure and is used many times in the rest of the disclosure. It proves that the back-propagation is the adjoint of the propagation.

Proposition 3. [Propagation adjoint] For all fault operators F, C for a circuit ,[{right arrow over (F)},G]=[F, ].  (30)

Proof. Because and G=,

$\begin{array}{cc}\left[\overrightarrow{F},G\right]=\sum _{=0}^{\Delta }\left[{\overrightarrow{F}}_{+0.5},G_{+0.5}\right]& \mathrm{Using}\mathrm{Eq}.\left(28\right)\end{array}$ $\begin{array}{cc}=\sum _{=0}^{\Delta }\left[\prod _{i=0}^{}\left(U_{i,}{F}_{i+0.5}{U}_{i,}^{-1}\right),G_{+0.5}\right]& \mathrm{Using}\mathrm{Eq}.\left(14\right)\end{array}$ $\begin{array}{cc}=\sum _{=0}^{\Delta }\sum _{i=0}^{}\left[U_{i,}{F}_{i+0.5}{U}_{i,}^{-1},G_{+0.5}\right]& \mathrm{Using}\mathrm{Eq}.\left(27\right)\end{array}$ $\begin{array}{cc}=\sum _{=0}^{\Delta }\sum _{i=0}^{}\left[F_{i+0.5},U_{i,}^{-1}{G}_{+0.5}{U}_{i,}\right]& \mathrm{Using}\mathrm{Eq}.\left(29\right)\end{array}$ $=\sum _{i=0}^{\Delta }\sum _{=i}^{\Delta }\left[F_{i+0.5},U_{i,}^{-1}{G}_{+0.5}{U}_{i,}\right]$ Interchanging the summation order

$\begin{array}{cc}=\sum _{i=0}^{\Delta }\left[F_{i+0.5},\prod _{=i}^{\Delta }\left(U_{i,}^{-1}{G}_{+0.5}{U}_{i,}\right)\right]& \mathrm{Using}\mathrm{Eq}.\left(27\right)\end{array}$ $\begin{array}{cc}=\sum _{i=0}^{\Delta }\left[F_{i+0.5},{\overleftarrow{G}}_{i+0.5}\right]& \mathrm{Using}\mathrm{Eq}.\left(15\right)\end{array}$ $\begin{array}{cc}=\left[F,\overleftarrow{G}\right].& \mathrm{Using}\mathrm{Eq}.\left(28\right)\end{array}$ In the last equality are used the factorizations F=⊗_i=0^ΔF_i+0.5 and =⊗_i=0^Δ_i+0.5.

6. The Outcome Code of a Clifford Circuit

FIG. 6 shows aspects of an example method 54 to correct a fault in application of a Clifford circuit to a qubit register of a quantum computer.

At 56 of method 54, circuit data defining the Clifford circuit is received. In some examples the Clifford circuit may include one or more Clifford gates. In these and other examples, the Clifford circuit may include one or more Pauli measurements—e.g., redundant measurements. For a significant subset of the problems to which method 54 is applicable, the Clifford circuit may be an error-syndrome extraction circuit. That aspect, however, is not strictly necessary.

At 58 outcome code based on the circuit data is emitted. The outcome code includes a series of outcome checks each corresponding to an anticipated error syndrome of the application of the Clifford circuit to the qubit register. At 60 space-time quantum code corresponding to the Clifford circuit is emitted. The space-time quantum code is emitted based on the circuit data and on the outcome code. The space-time quantum code includes a series of check operators that support quantum-error correction, thereby enabling fault correction in the application of the Clifford circuit to the qubit register. In some examples, the space-time quantum code is a quantum-stabilizer code. In some examples, each of the check operators is a stabilizer generator of the space-time quantum code. Here the measurement of each stabilizer generator returns a result of a corresponding outcome check of the outcome code.

The space-time quantum code emitted at 60 may be used in various ways, two of which are illustrated in FIG. 6. At 62 a lookup decoder for the space-time quantum code is built. Then, at 64, pursuant to detection of a fault in the application of the Clifford circuit, the space-time quantum code is decoded via the lookup decoder to correct the fault in the application of the Clifford circuit to the qubit register.

The branch starting at 66 of method 54 illustrates a different implementation. At 66 the LDPC space-time quantum code is emitted. The LDPC space-time quantum code is based on the circuit data, the outcome code, and the space-time quantum code. The LDPC space-time quantum code includes connected stabilizers of the space-time quantum code up to a predetermined weight. In some examples, emitting the LDPC space-time quantum code comprises receiving the space-time quantum code in D dimensions and producing local stabilizer generators in D+1 dimensions.

In the more particular, illustrated example, emitting the LDPC space-time quantum code comprises, at 72 constructing a space-time graph of the Clifford circuit; and at 74 constructing a set of stabilizer generators of the space-time code that are supported on local regions of the space-time graph. In these and other examples, pursuant to detection of a fault in the application of the Clifford circuit, the LDPC space-time quantum code, at 76, is decoded in an LDPC decoder to correct the fault in the application of the Clifford circuit to the qubit register.

Operationally, method 54 may be enacted on a classical computer system coupled operatively to a quantum computer. As described hereinafter, the classical computer system comprises one or more processors and, operatively coupled to the one or more processors, computer memory holding instructions corresponding to method 54. Such instructions may include instructions (A) corresponding to step 56, instructions (B) corresponding to step 58, etc.

In this section, it is shown that the set of possible outcome vectors of a Clifford circuit is almost linear code. ‘Almost’ means that it is not a linear subspace but an affine subspace of ₂^m for some integer m. However, by changing the description of the circuit, one can make it a proper linear code. An algorithm is proposed to efficiently compute a set of checks for this code. The outcome code can be used to detect and correct faults in a Clifford circuit. A Clifford circuit is considered to act on n qubits with depth Δ containing m measurements. S_j denotes the measured operators for j=1, . . . , m and is the level of the measurement of the operator S_j. In this context, FIG. 7 shows aspects of an example algorithm for construction of the checks of the outcome code of a Clifford circuit.

In many cases, the outcomes observed through a circuit are not independent. For instance, if a measurement is repeated twice in a row, one expects to obtain the same outcome twice. The following proposition proves that the set of outcomes of a Clifford circuit is an affine subspace. It is defined by a set of affine checks of the form Σ_k∈Ko_k=0 or 1.

Proposition 4. [Outcome code of a Clifford circuit] The set of all possible outcome vectors for a Clifford circuit with m Pauli measurements is an affine sub space () of ₂^m. Moreover a set of affine equations defining () is computed by Algorithm 1. The proof of Proposition 4 is derived from the following lemma.

Lemma 1. Stabilizer update rules Let |ψ be a state of a stabilizer code () with length n and assume that the Pauli operator M∈_n is measured with outcome o∈{−1,+1}. Then, the following holds.

• • 1. If ±M∈, the outcome of the measurement of M is ±1 and the state of the system is unchanged after measurement.
  • 2. If ±M∉ and M commutes with all the elements of . Denote ′=∪{M}.
    • (a) For all outcomes o∈{+1,−1} there exists a state of () such that the measurement of M has outcome o with non-zero probability.
    • (b) For all states |ψ′ in (′) there exists a state |ψ∈() such that the measurement of M projects |ψ onto |ψ with non-zero probability.
  • 3. If ±M∉ and M anti-commutes with an element S₁ of . Let S₁, S₂, . . . , S_r be a generating set for such that S₂, . . . , S_r commute with M. Denote ′={M, S₂, . . . , S_r}.
    • (a) For all outcomes o∈{+1,−1} there exists a state of () such that the measurement of M has outcome o with non-zero probability.
    • (b) For all states |ψ′ in (′) there exists a state |ψ∈() such that the measurement of M projects |ψ onto |ψ′ with non-zero probability.

Proof. The first item is an immediate consequence of the postulates of quantum mechanics. Consider the second item. For the state

$❘{\psi }_o\rangle =\frac{I+{\left(-1\right)}^{o}M}{2}❘\psi \rangle$ where |ψ is a state of (), the outcome of the measurement M is o with probability 1 proving the first part. Moreover, the measurement of M maps any state |ψ′ of (′) onto itself with probability 1.

The third item remains to proven. Consider a set of logical operators X₁, Z₁, . . . , X_k, Z_k of the stabilizer code (). Without loss of generality, one can assume that all these logical operators commute with M. Otherwise, if a logical operator L anti-commutes with M, replace L by LS₁ which is another representative of the same logical operator. Therefore, the operators X₁, Z₁, . . . , X_k, Z_k also form a basis of logical operators for the code ().

Consider the logical state |x the stabilizer code () where x∈₂^k. It is the state of () fixed by the operators (−1)^xiZ_i. This state is mapped onto the logical state |x of (′) with probability 1/2. To see this, denote _x=∪{(−1)^x1Z₁, . . . , (−1)^xkZ_k}. Then, {circumflex over (x)}=2⁻ⁿΣ_S∈Sx S and the measurement of M produces the outcome o with probability

$\begin{array}{cc}\mathrm{tr}\left(\frac{I+{\left(-1\right)}^{o}M}{2}\langle \stackrel{\_}{x}\rangle \right)=2^{-\left(n+1\right)}\left(\mathrm{tr}\sum _{S\in \langle {𝒮}_x\rangle }S+{\left(-1\right)}^o\mathrm{tr}\sum _{S\in \langle {𝒮}_x\rangle }\mathrm{MS}\right)=1/2.& \left(31\right)\end{array}$ Indeed, the first sum is Σ_S∈<Sx> S=2ⁿ because all the Pauli operators are traceless except the identity which has trace 2ⁿ. The second sum is trivial because MS=±I would imply ±M∉_x which is impossible because M anti-commute with _x.

Thus demonstrated is the existence of a state |{circumflex over (x)} of () which leads both measurement outcomes o=0 or 1 with probability 1/2. Moreover, its image when the outcome is trivial is the state |x of the code (′). Therefore, it is possible to reach any of the basis state |x of (′) from some state of () by measuring M. By linearity of the projection, this proves that one can reach any state of the code (′).

Proof. [Proof of Proposition 4] Based on Lemma 1, the set of states that belong to the output of the subcircuit (C₁, . . . , C_i−1) is a stabilizer code. Moreover, a set of stabilizer generators for this code is computed by updating the stabilizer generators of the circuit after each operation as in Algorithm 1.

If the operator C_i is the measurement of an operator S_j such that neither S_j nor −S_j belong to the stabilizer group of the outcome of the circuit (C₁, . . . , C_i−1), then the outcome o_j can be either 0 or 1. However, if ±S_j belongs to the stabilizer group, its outcome is constrained and this defined a check of the affine code. This check is computed in Algorithm 1.

Without loss of generality, one can assume that the outcome code () of a Clifford circuit not only an affine subspace but also a proper ₂-linear code. Indeed, replacing the measured operator S_j by −S_j for all the measurements such that −S_j∈ in Algorithm 1 makes all the checks linear without modifying the output of the circuit. This leads to the following corollary.

Corollary 2. [Linearization of the outcome code] Let be a Clifford circuit and let ′ the circuit obtained by running Algorithm 1 and replace S_j by −S_j if the condition −S_j∈ is met. Then the outcome code of ′ is a linear code.

In what follows, it is assumed that the outcome code () is linear. One may refer to a vector of ()^⊥ as a check of the outcome code (). The outcome code can be immediately used to correct faults in a quantum circuit. Indeed, a fault configuration induces a flip of some of the circuit outcomes which can be detected using the values of the checks of the outcome code.

7. Check Operators

Introduced here is a set of Pauli operators associated with the checks of the outcome code that is used later to define a stabilizer code associated with the Clifford circuit.

7.1. Definition of Check Operators

It is convenient to introduce another notation from [Ref. 1]. The fault operator F∈_n(Δ+1) obtained by placing a n-qubit Pauli operator P at level +0.5 is denoted (P). By definition, =P and =I for all ′≠. For any vector u∈()^⊥, define the check operator to be the fault operator obtained by back-propagating the fault operator

$\begin{array}{cc}F\left(u\right)=\prod _{\begin{array}{c}j=0\\ u_j=1\end{array}}^m{\eta }_{{\ell }_j-0.5}\left(S_j\right)& \left(32\right)\end{array}$ Recall that S₁, . . . , S_m are the m measured operators of the circuit and S_j is measured at level . In other words, F(u) is the fault operator obtained by placing each measured operator S_j with u_j=1 at the level right before it is measured.

One may prefer to use the propagation instead of the backpropagation. Then, one can define the propagation operators as {right arrow over (F′(u))} where

$\begin{array}{cc}{F}^{\prime }\left(u\right)=\prod _{\begin{array}{c}j=0\\ u_j=1\end{array}}^m{\eta }_{{\ell }_j+0.5}\left(S_j\right).& \left(33\right)\end{array}$ The definition is discussed in Section 13 where it is proved that ={right arrow over (F′(u))} for vectors u of ()^⊥. In what follows, is preferred because it makes some proofs more straightforward. What makes the backpropagation natural is the fact that it is the adjoint of the propagation (Proposition 3). Informally, that means that one can replace the propagation of faults by the backpropagation of measurements. This assertion will be made rigorous throughout this section.

Proposition 5. The map u is an injective group morphism from ₂^m to _n(Δ+1).

Proof. For all u, v∈₂^m, the operators F(u) and F(v) satisfy F(u)F(v)=F(u+v). Combined with Eq. (21), this leads to = which proves that uis a group morphism. It is injective as the composition of an injective map uF(u) and a bijection F (Corollary 1). Used extensively in what follows is the relation =which is a consequence of Proposition 5.

7.2. Outcomes of the Check Operators

The section relates the value of a check of the outcome code to the measurement outcome of a check operators, justifying the definition of check operators.

The first lemma provides a description of the outcomes flipped by a set of faults as a commutator of the corresponding fault operator.

Lemma 2. Outcome flip Let F be a fault operator. The faults corresponding to F induce a flip of the measurement of S_j iff [{right arrow over (F)},(S_j)]=1.

Proof. Based on Proposition 1, the faults represented by F induce a flip of the outcome of S_j iff [,S_j]=1 and because (S_j) is trivial on all level but −0.5, [,S_j]=[{right arrow over (F)},(S_j)].

The following Lemma shows that the measurement of a check operators returns the value of the corresponding check of the outcome code.

Lemma 3. Check operator outcome Let F be a fault operator. The faults corresponding to F induce a flip of an outcome check u∈()^⊥ iff [F, ]=1.

Proof. By definition of F(u),

$\begin{array}{cc}\left[F,\overleftarrow{F\left(u\right)}\right]=\left[F,\overleftarrow{\prod _{\begin{array}{c}j=0\\ u_j=1\end{array}}^m{\eta }_{j_{}-0.5}\left(S_j\right)}\right]& \left(34\right)\end{array}$ which leads to

$\begin{array}{cc}\left[F,\overleftarrow{F\left(u\right)}\right]=\left[F,\prod _{\begin{array}{c}j=0\\ u_j=1\end{array}}^m\overleftarrow{{\eta }_{j_{}-0.5}\left(S_j\right)}\right]& \mathrm{Using}\mathrm{Eq}.\left(21\right)\end{array}$ $\begin{array}{cc}=\sum _{\begin{array}{c}j=0\\ u_j=1\end{array}}^m\left[F,\overleftarrow{{\eta }_{j_{}-0.5}\left(S_j\right)}\right]& \mathrm{Using}\mathrm{Eq}.\left(27\right)\end{array}$ $\begin{array}{cc}=\stackrel{m}{\sum _{\begin{array}{c}j=0\\ u_j=1\end{array}}}\left[\overrightarrow{F},{\eta }_{j_{}-0.5}\left(S_j\right)\right]& \mathrm{By}\mathrm{Proposition}.3\end{array}$ By Lemma. 2, this last sum coincides with the check Σ_ju_jo_j of the outcome code corresponding to the vector u.

The next lemma states that an error S_j right before or right after the measurement of S_j does not flip any of the check operator outcomes.

Lemma 4. Stabilizer error For all u∈()^⊥ and for all measured operator S_j, [,(S_j), ]=0.

Proof. Because S_j belongs to the stabilizer group of system right after level _j, the faults corresponding to (S_j) do not flip any of the checks of the outcome code. Based on Lemma 3, this leads to the lemma for the sign _j+0.5. The same result holds for +0.5 because a fault S_j after the measurement of S_j is equivalent to a fault S_j before this measurement.

A Pauli error on the input state also keeps the check operator outcomes trivial.

Lemma 5. Input error For all u∈()^⊥ and for all P∈_n, [η_0.5(P), ]=0.

Proof. An fault P on the input state of the circuit cannot flip the value of a check because the outcome code () is the set of outcomes for all possible input states. Based on Lemma 3, this implies [η_0.5(P), ]=0 for all check u of the outcome code.

7.3. Commutation of the Check Operators

The goal of this section is to prove that check operators are pairwise commuting. Proposition 6. Let be a Clifford circuit. For all u, v∈()^⊥, [, ]=0.

Proof. Based on Eq. (28),

$\begin{array}{cc}\left[\overleftarrow{F\left(u\right)},\overleftarrow{F\left(v\right)}\right]=\sum _{=0}^{\Delta }\left[{\overleftarrow{F\left(u\right)}}_{+0.5},{\overleftarrow{F\left(v\right)}}_{+0.5}\right]& \left(35\right)\end{array}$ In the remainder of this proof, it is demonstrated by induction on (in decreasing order) that [, ]=0 for all .

For =Δ, by definition, F(u)_Δ+0.5=F(v)_Δ+0.5=I and therefore _Δ+0.5=_Δ+0.5=I which yields [_Δ+0.5, _Δ+0.5]=0.

Assume now that [, ]=0. It will now be proved that [, ]=0. Using Proposition 2 and Eq. (17) is found

$\begin{array}{cccc}{\overleftarrow{F\left(u\right)}}_{+0.5}& =& \prod _{j=}^{\Delta }{U}_{,j}^{-1}{F\left(u\right)}_{j+0.5}{U}_{,j}& \left(36\right)\\ =& {F\left(u\right)}_{+0.5}\prod _{j=+1}^{\Delta }{U}_{,j}^{-1}{F\left(u\right)}_{j+0.5}{U}_{,j}& \left(37\right)\\ =& {F\left(u\right)}_{+0.5}\prod _{j=+1}^{\Delta }{\left(U_{+1,j}{U}_{,+1}\right)}^{-1}{F\left(u\right)}_{j+0.5}{U}_{+1,j}{U}_{,+1}& \left(38\right)\\ & =& {F\left(u\right)}_{+0.5}{U}_{,+1}^{-1}\left(\prod _{j=+1}^{\Delta }{U}_{+1,j}^{-1}{F\left(u\right)}_{j+0.5}{U}_{+1,j}\right)U_{,+1}& \left(39\right)\\ & =& {F\left(u\right)}_{+0.5}{U}_{,+1}^{-1}{\overleftarrow{F\left(u\right)}}_{+1.5}{U}_{,+1}& \left(40\right)\end{array}$ The same holds for v, that is =F(v). Using these expressions for and and applying Eq. (27),

$\begin{array}{ccc}\begin{array}{cc}\left[{\overleftarrow{F\left(u\right)}}_{\ell +0.5},{\overleftarrow{F\left(v\right)}}_{\ell +0.5}\right]& =\end{array}& \left[{F\left(u\right)}_{\ell +0.5},{F\left(v\right)}_{\ell +0.5}\right]+& \left(41\right)\\ & U_{\ell ,\ell +1}^{-1}{\overleftarrow{F\left(u\right)}}_{\ell +1+0.5}{U}_{\ell ,\ell +1},& \left(42\right)\\ & U_{\ell ,\ell +1}^{-1}{\overleftarrow{F\left(v\right)}}_{\ell +1+0.5}{U}_{\ell ,\ell +1}]+& \\ & \left[{F\left(u\right)}_{\ell +0.5},U_{\ell ,\ell +1}^{-1}{\overleftarrow{F\left(v\right)}}_{\ell +1+0.5}{U}_{\ell ,\ell +1}\right]+& \left(43\right)\\ & \left[U_{\ell ,\ell +1}^{-1}{\overleftarrow{F\left(u\right)}}_{\ell +1+0.5}{U}_{\ell ,\ell +1}{F\left(v\right)}_{\ell +0.5}\right].& \left(44\right)\end{array}$ It will now be shown that each of these four terms is trivial. The first one [F(u)_+0.5,F(v)_+0.5] is trivial by definition of the F(u) and F(v). Using Eq. (29) and the induction hypothesis,[,]=[, ]=0   (45)proving that the second term is trivial. Because the operator is the product of the unitary gates at level +1 and F(u) and F(v) corresponds to measurements at the same level support of cannot overlap with the supports of F(u) and F(v). As a result acts trivially on F(u) and F(v). Therefore,

$\begin{array}{cccc}\left[{F\left(u\right)}_{\ell +0.5},U_{\ell ,\ell +1}^{-1}{\overleftarrow{F\left(v\right)}}_{\ell +1+0.5}{U}_{\ell ,\ell +1}\right]& =& \begin{array}{c}[U_{\ell ,\ell +1}{F\left(u\right)}_{\ell +0.5}{U}_{\ell ,\ell +1}^{-1},\\ {\overleftarrow{F\left(v\right)}}_{\ell +1.5}]\end{array}& \left(46\right)\\ =& \left[{F\left(u\right)}_{\ell +0.5},{\overleftarrow{F\left(v\right)}}_{\ell +1.5}\right].& \left(47\right)\end{array}$ Therein, was used Eq. (29) in the first equality. To see that [F(u), ]=0, write this commutator as[F(u), ]=[_+1.5(F(u)), ].  (48)and apply Lemma 4. This lemma can be applied because F(u) is a product of some measured operators S_j with level _j=+1 in the circuit. It was proved that the third term is trivial. By symmetry, the fourth term is trivial by the same argument. This proves that [, ]=0 concluding the proof of the proposition.

8. The Space-Time Code of a Clifford Circuit

Introduced in this section is a stabilizer code associated with a Clifford circuit. It is shown that the problem of correcting faults in a circuit reduces to the problem of correcting Pauli errors in this stabilizer code.

8.1. The Space-Time Code

The following theorem proves that the check operators form a stabilizer group. The corresponding stabilizer code is referred to as the space-time code of the circuit, denoted ().

Theorem 1. The space-time code. Let be a Clifford circuit with depth Δ. Then, the set of all the check operators with u∈()^⊥ is a stabilizer group. Moreover, if the outcome code () of the circuit has parameters [m,k], the space-time code of the circuit () has parameters [[N,K]] with N=n(Δ+1) and K=N−(m−k).

Proof. Based on Proposition 5, the set of operators with u∈()^⊥ is a subgroup of _n(Δ+1). Proposition 6 proves that this subgroup is commutative. Moreover, it cannot contain −I because the map u is injective. Another consequence of the injectivity is that the rank of the image stabilizer group is equal to the dimension of ()^⊥ which is m−k. This provides the stabilizer code parameters.

8.2. Logical Operators of the Space-Time Code

To describe the logical operators of the space-time code, some notation will be introduced. For any =1, . . . , Δ and for any P∈_n, define the fault operator F(P,) asG(P,)=_−0.5(P)_+0.5().  (49)These operators satisfy{right arrow over (G(P,))}=_−0.5(P).  (50)For any vector v∈₂^m, define the fault operator L(v) as

$\begin{array}{cc}L\left(v\right)=\prod _{j=1}^m{G\left(P_j,j_{}\right)}^{v_j}& \left(51\right)\end{array}$ where _j is the level of the j th measured operator S_j and P_j∈_n is an arbitrary Pauli operator acting on the support of S_j that anti-commute with S_j. Because P_j is included in the support of S_j it commutes with all the other measured operator at level _j.

Proposition 7. Let be a Clifford circuit acting on n qubits with depth Δ. The stabilizers and logical operators of the space-time code are generated by the following operators.

• • 1. A set of operators η_Δ+0.5(P) where P∈_n runs over a basis of _n.
  • 2. A set of operators G(P,) for all =1, . . . , Δ where P∈_n runs over a basis of the space of Pauli operators that commutes with all the measured operators at level .
  • 3. A set of operators L(v) where v∈₂^m runs over a basis of the space ().

The following lemma is used in the proof of the proposition.

Lemma 6. For all u, v∈₂^m, [,L(v)]=(u|v).

Proof.

$\begin{array}{cc}\left[\overleftarrow{F\left(u\right)},L\left(v\right)\right]=\left[F\left(u\right),\overleftarrow{L\left(v\right)}\right]& \mathrm{By}\mathrm{Proposition}3\\ =\left[F\left(u\right),\overleftarrow{\prod _{j=1}^m{L\left(P_j,j_{}\right)}^{v_j}}\right]& \mathrm{By}\mathrm{definition}\mathrm{of}L\left(v\right)\\ =\left[F\left(u\right),\prod _{j=1}^m\overrightarrow{{G\left(P_j,j_{}\right)}^{v_j}}\right]& \mathrm{By}\mathrm{Eq}.\left(20\right)\\ =\sum _{j=1}^m{v}_j\left[F\left(u\right),\overleftarrow{G\left(P_j,j_{}\right)}\right]& \mathrm{By}\mathrm{Eq}.\left(27\right)\\ =\sum _{j=1}^m{v}_j\left[F\left(u\right),{\eta }_{j_{}-0.5}\left(P_j\right)\right]& \mathrm{By}\mathrm{Eq}.\left(50\right)\\ =\sum _{j=1}^m{v}_j\left[{F\left(u\right)}_{j_{}-0.5},P_j\right]& \end{array}$ By definition of P_i, [F(u),P_j]=u_j which yields [,L(v)]=(u|v).

Proof. [Proof of Proposition 7] First it will be proved that these three families of operators are logical operators of the space-time code, that is that they commute with all stabilizers with u∈()^⊥.

The operators of the form η_Δ+0.5(P) satisfy

$\begin{array}{cccc}\left[\overleftarrow{F\left(u\right)},{\eta }_{\Delta +0.5}\left(P\right)\right]& =& \left[F\left(u\right),\overleftarrow{{\eta }_{\Delta +0.5}\left(P\right)}\right]& \left(52\right)\\ =& \left[F\left(u\right),{\eta }_{\Delta +0.5}\left(P\right)\right]& \left(53\right)\end{array}$ which is trivial because F(u) is trivial over level Δ+0.5.

For the operators G(P,),[,G(P,)]=[F(u),{right arrow over (G(P,))}]  (54)which is equal to [F(u),_−0.5(P)] by Eq. 50. Because P commute with all the measured operators at level ,

$\begin{array}{cccc}\left[\overleftarrow{F\left(u\right)},G\left(P,\right)\right]& =& \left[{\eta }_{-0.5}\left(P\right),F\left(u\right)\right]& \left(55\right)\\ =& \left[{F\left(u\right)}_{-0.5},P\right]=0.& \left(56\right)\end{array}$

For the operators L(v), based on Lemma 6, [, L(v)]=(u|v) and this inner product is trivial because v is in the code () and u belongs to its dual.

To prove that these three families of operators generate all stabilizers and logical operators, it is enough to show that the group they generate has rank 2K+R where K is the number of logical qubits of the stabilizer code and R is the rank of the stabilizer group. For the space-time code, K=n(Δ+1)−r and R=r

Denote by L₁, L₂, L₃ the subgroups of _n(δ+1) generated by these three sets of operators. L₁∩L₂={I} because the operators of L₂ are supported on at least two levels and L₁ has support on level Δ+0.5. Also, L₁∩L₃={I} because the operators of L₁ cannot flip any outcome and the only operator of L₃ that induces no outcome flip is I. The same argument also shows that L₂∩L₃={I}. As a result, the rank of the subgroup of _n(δ+1) generated by all the operators of L₁, L₂ and L₃ is the sum of the ranks of the three subgroups rank(L₁)+rank(L₂)+rank(L₃).

It is immediate to see that rank(L₁)=2n. For a circuit without measurement the rank of L₂ is 2nΔ. The constraint associated with the commutation with each measurement decreases the rank by 1, which yields rank(L₂)=2nΔ−m where m is the number of measurements of the circuit. Finally, the rank of L₃ is given by the dimension of the outcome code, that is rank(L₃)=m−r.

Putting things together this proves that these three sets of operators generate a group with rank 2n(Δ+1)−r which coincides with the value of 2K+R. This proves that this family of operators generate all stabilizer and logical operators.

8.3. Application to the Correction of Circuit Faults

Here, the space-time code is used to show that one can reduce the problem of correcting circuit faults to the correction of Pauli errors in a stabilizer code.

Considered now is a set of checks u₁, . . . , u_r for the outcome code () of a Clifford circuit. The syndrome map associated with these checks is denoted:₂^m→₂^r.  (57)Recall that the i th syndrome bit of a vector v is (u_i|v). Consider the space-time code () with stabilizer generators , . . . , . The corresponding syndrome map is denoted:_n(Δ+1)→₂^r  (58)and the i th syndrome bit of a Pauli error F is [,F].An MLE decoder is used for the stabilizer code (), which is a map:₂^r→_n(Δ+1)  (59)that returns a most likely Pauli error given a syndrome (F). Considered here is Pauli error according to the distribution of circuit faults. Finally, recall that the effect of a fault operator F in a circuit is obtained from a mapeff:_n(Δ+1)→₂^m×_n  (60)which maps a fault operator onto its effect on the outcome vector and the output state.

Theorem 2. Circuit decoder from stabilizer code decoder. Let be a Clifford circuit. If is a MLE decoder for stabilizer code (), then eff∘∘ is an MLF circuit decoder for the circuit .

First a lemma will be proved. Recall that ρ_M denotes the n-qubit maximally mixed state. The indicator function of a set A is denoted δ_A. It takes the value δ_A(x)=1 if x∈A and 0 otherwise.

Lemma 7. Let be a Clifford circuit and let F be a fault operator with effect eff(F)=(f,E). If () is the outcome code of , then

$\begin{array}{cc}{\mathbb{P}}_{𝒞,{\rho }_M}^{\left(ℱ\right)}\left(o\right)=\frac{1}{2^k}{\delta }_{f+\left(𝒞\right)}\left(o\right)& \left(61\right)\end{array}$ where k=dim().

Proof. Consider first the case of a trivial fault operators F=I. Then, from Proposition 4 the set of outcomes o with non-zero probability is a subset of the outcome code (). The mam difference with Proposition 4 is that the input state is restricted to be the maximally mixed state. The unitary operations of the circuit preserve the maximally mixed states and applying a Pauli measurement to the maximally mixed state returns a uniform outcome and the post-measurement state is the maximally mixed state. This proves that all outcome vectors of () can occur when the input state of the circuit is fixed to be the maximally mixed state ρ_M. Moreover, they occur with the same probability. This proves that

$\begin{array}{cc}{\mathbb{P}}_{𝒞,{\rho }_M}^{\left(I\right)}\left(o\right)=\frac{1}{2^k}{\delta }_{𝒪\left(𝒞\right)}\left(o\right).& \left(62\right)\end{array}$ Injecting F in the circuit shifts the outcome vector o by f, which leads to the shifted indicator function in the lemma.

Proof. [Proof of Theorem 2] It can be proved that for all o∈₂^m, the fault operator F=eff∘∘(o) maximizes the function Q_MLF(F,o) introduced in Eq. (12). Based on Lemma 7,

$\begin{array}{cc}{Q}_{\mathrm{MLF}}\left(F,o\right)=\frac{1}{2^k}{\delta }_{f+𝒪\left(𝒞\right)}\left(o\right){\mathbb{P}}_{}\left(F\right)& \left(63\right)\end{array}$ which means that one can maximize Q_MLF(F,o) by selecting a fault operator F such that o∈f+() that has maximum probability (F). The condition o∈f+() is equivalent to (f)=(o). Finally, Lemma 3, it is known that (f)=(F). Overall, it was shown that a MLF decoder for the circuit is a circuit decoder that returns the effect of a fault operator F such that (F)=(o) with maximum probability. Therefore the map eff∘∘ is an MLF decoder.

8.4. Beyond MLF Circuit Decoders

An MLF decoder is sometimes good enough but it ignores the fact that two fault operators may have the same effect and two residual errors that differ in an output stabilizer can be considered equivalent.

In some cases one may prefer a most likely coset decoder (MLC decoder), which is defined to be a circuit decoder that takes as an input an outcome vector o and returns a pair ({circumflex over (f)},Ê) that maximizes the sum

$\begin{array}{cc}{Q}_{\mathrm{MLC}}\left(\hat{f},\hat{E},o\right)=\sum _{E^{\prime }\in \hat{E}\langle {𝒮}_o\rangle }\sum _{\begin{array}{c}\hat{F}\in {\overline{𝒫}}_{n\left(\Delta +1\right)}\\ \mathrm{eff}\left(\hat{F}\right)=\left(\hat{f},E^{\prime }\right)\end{array}}{\mathbb{P}}_{𝒞,{\rho }_M}^{\left(\hat{F}\right)}\left(o\right)\left(\hat{F}\right).& \left(64\right)\end{array}$ Therein, Ê denotes the coset of Ê in the output stabilizer group. Based on Eq. (13), this sum is proportional with the sum of the probabilities of all the fault operators that leads to an effect ({circumflex over (f)},E′) where the Pauli error E′ is equivalent to Ê up to a stabilizer of the output code.

One can design a MLC decoder using a subsystem version of the space-time code obtained by gauging logical operators which correspond to faults with trivial effect. Namely, one can define a subsystem code from the gauge group generated by the operators G(P,) where P commutes with all the measurements at level and the operators (S_j) where S_j is an operator measured at level _j. Then, the center of the gauge group is the stabilizer group of the space-time code. Equivalently, the subsystem space-time code can be seen as a variant of the stabilizer space-time code obtained by gauging the logical qubits corresponding to the operators G(P,) such that P commutes with all the measured operators at level . This subsystem code can be seen as a generalization of the circuit-to-code construction proposed in [Ref. 1]. Considered here are circuits including intermediate measurements and multi-qubit measurement whereas [Ref. 1] focuses on post-selection circuits.

Then, one could design a MLC decoder from a decoder for the subsystem space-time code that returns a most likely coset of the gauge group. This strategy will not be expanded herein because designing a most likely coset for a subsystem code is generally challenging. In what follows, the focus is on the strategy suggested by Theorem 2 and use of decoders for the stabilizer space-time code.

9. LDPC Space-Time Code

A complete scheme for correction of faults in a Clifford circuit includes a decoder. However, decoding a general code is quite difficult. Indeed, the maximum likelihood decoding problem is NP-hard for linear codes [Ref. 14] and it is #P-hard for stabilizer codes [Ref. 15]. However, some classes of codes such as LDPC codes, which are defined by low-weight checks, admit an efficient decoder with good performance [Ref. 4].

Considered here are restrictions induced by a limited connectivity in the quantum hardware implementing the circuit. This imposes some constraints on the space-time code which in some cases make it easier to decode. The basic idea is to produce a set of low-weight stabilizer generators for the space-time code and to use an LDPC code decoder. In this section is proposed an algorithm that produces low-weight stabilizers for a space-time code.

9.1. Qubit Connectivity and LDPC Space-Time Codes

Because the backpropagation can spread errors through the entire circuit, the check operators not expected to have low weight. However, if the circuit is implemented with qubits with limited connectivity, the backpropagation does not spread F(u) as fast and one can hope for low-weight check operators. Below are identified sufficient conditions that ensure that the space-time code admit low-weight generators.

A family of stabilizer codes is said to be LDPC if all the stabilizer groups of the codes admit generators acting on O(1) qubits. A family of stabilizer codes is said to be D-dimensional local if the n qubits of the codes can be mapped onto the vertices of a D-dimensional grid ^D in such a way that the stabilizer generators are all supported on a ball with radius O(1) in the grid. D-dimensional local codes are a subset of quantum LDPC codes.

The depth of an outcome vector u∈₂^m, denoted depth(u) is defined asdepth(u)=max{_j|u_j=1}−min{_j|u_j=1}+1.  (65)Recall that _j is the level of the j th measurement of the circuit. The measurements indexed by j satisfying u_j=1 are supported in a subset of depth(u) consecutive levels of the circuit .

A family of circuits is said to be bounded if all the outcomes are codes of the circuits admit a set of checks with weight O(1) and with depth O(1).

Proposition 8. [LDPC space-time codes] Let be a family of Clifford circuits. If the family of circuits is bounded and if all circuit operations act on O(1) qubits, then the space-time codes of the circuits are LDPC.

Proof. The stabilizer group of the space-time code is generated by the check operators corresponding to the generators u₁, . . . , u_r of (_t)^⊥ with bounded depth. By Lemma 8, the stabilizer generators have support on O(1) levels. Moreover, because the circuits are bounded, the weight of F(u) is bounded. Back-propagating F(u) through a circuit made with operations acting on O(1) qubits leads to a bounded weight operator .

Proposition 9. [(D+1)-dimensional space-time codes] Let be a family of Clifford circuits acting on qubits placed on a D-dimensional grid ^D. If the family of circuits is bounded and if all circuit operations act on qubits separated by a distance O(1), then the space-time codes of the circuits are (D+1)-dimensional local.

Proof. By the same argument as in the proof of Proposition 8, the stabilizer generators are obtained by backpropagation of bounded weight operators F(u). Because the backpropagation goes through local operations in D dimensions, this results in local generators in (D+1) dimensions.

9.2. Stabilizer Group Induced on a Subset of Qubits

A key technical to generate low-weight generators in a space-time code is the following algorithm that produces a set of generators for the operators of a stabilizer group with support included in a given subset of qubits. FIG. 8 shows aspects of an example algorithm for construction of generators for a stabilizer group induced on a subset of qubits.

Described first is a naive solution. Given a stabilizer group with length n and a subset A⊂{1, . . . , n} of the qubits, the objective is to compute a generating set for the subgroup of operators S∈ whose support is included in A. Assume that a set of stabilizer generators =S₁, . . . , S_r is given. It suffices to solve the linear system made with the n−|A| equations

$\begin{array}{cc}\prod _{i=1}^r{\left(S_{i,j}\right)}^{{\lambda }_i}=I& \left(66\right)\end{array}$ in the r variables λ₁, . . . λ_r∈₂ where S_i,j is the j th coefficient of S_i and j varies over {1, . . . , n}\A. Using Gaussian elimination, the complexity of this approach is cubic in n.

This may be too slow for large circuits. One can achieve a more favorable complexity in the case of a small subset A using the following proposition. Before describing the solution, some notation will be introduced.

The restriction of a Pauli operator P∈ to a subset of qubits A is the operator P_|A obtained by setting all the components of P outside of A to I. The restriction of a subgroup G of _n to the subset A, denoted G_|A, is the set that contains the restrictions of all the operators of G. For example, the set of n-qubit Pauli operators supported on a subset A of {1, . . . , n} is _n|A.

The following proposition leads a more efficient way to compute the restriction of a stabilizer group to a subset of qubits. Recall the notation G^⊥ for the set of Pauli operators that commutes with the operators included in the subset G of _n. For a stabilizer code , the set ^⊥ is the set of logical operators of the code.

Proposition 10. [Induced stabilizer subgroup] Let be a stabilizer code with length n with stabilizer generators ={S₁, . . . , S_r} and logical operators X₁, Z₁ . . . , X_k, Z_k. Let A⊂{1, . . . , n}. A pauli operator P with support included in A is a stabilizer iff it commute with the restricted operators S_1|A, . . . , S_r|A, X_1,A, Z_1,A, . . . , X_k,A, Z_k,A.

Proof. A Pauli operator P belongs to the stabilizer group iff it commutes with all the stabilizer generators and logical operators of the code, that is iff [P,L]=0 for all L∈^⊥. In the case of a Pauli operator P with support included in A, [P|L]=[P|L_|A]+[P|L_|AC] and it will be known that [P|L_|AC] is always trivial, thus proving the proposition.

Based on Proposition 10, one may design Algorithm 2 which returns a set of generators for the restriction of a stabilizer group to a subset of qubits. If each qubit is acted on by O(1) stabilizer generators S_i and O(1) logical operators, the matrix G obtained at the end of line 2 has size O(A)×O(|A|) and it can be constructed in O(|A|²) bit operations. Then, the most expansive subroutine of Algorithm 2 is the transformation of the matrix G in standard form which can be done in O(|A|³) bit operations using Gaussian elimination as in [Ref. 3].

9.3. Construction of Low-Weight Generators for the Space-Time Code

To make sure that one can efficiently decode the space-time code, a set of low-weight stabilizer generators is useful. FIG. 9 shows aspects of an example algorithm for construction of low weight stabilizers of a space-time code.

To find a set of low-weight generators for a given stabilizer group, one could apply Algorithm 2 to all the subsets of ω qubits with ω=1, 2, . . . until enough generators are obtained to span the full stabilizer group. One could speed-up this search using information sets for Pauli groups [Ref. 3] but the cost remains discouraging for general stabilizer codes. In this section, it is shown that one can use some information about the structure of space-time code to help probe the right subsets of qubits and generate low-weight stabilizer generators.

The space-time graph of a circuit is a graph with vertex set V={1, . . . , n}×{0.5, 1.5, . . . , Δ−0.5} corresponding to the qubits supporting the fault operators except the last level. The edges of the space-time graph are constructed by looping over all the operations of the circuit and for each operation with level acting on qubits q_i1, . . . , q_it, one may connect together all the qubits of the form (q,−0.5) or (q,′+0.5). An operation acting on ω qubits induces a clique with 2ω vertices supported on level −0.5 and +0.5. If the circuit is made with operations acting on at most ω qubits, the maximum degree of the space-time graph is upper bounded by 2(2ω−1).

A stabilizer of a stabilizer code is said to be connected if its support is a connected in the space-time graph. Hereinafter it is proved in Proposition 13 that the restriction of a stabilizer of the space-time code to any connected component of its support is a stabilizer. This proves that stabilizers of the space-time code can be decomposed as products of connected stabilizers. Instead of running over all subsets of qubits, Algorithm 3 returns all the connected stabilizers of a space-time code by running over the neighborhoods of vertices in the space time graph.

Proposition 11. Let be a Clifford circuit. Then Algorithm 3 returns all the connected stabilizers of the space time code with weight up to M.

In the case of a circuit acting on n qubits, with depth Δ, made with operations acting on at most ω qubits, Algorithm 3 explores nΔ subsets A of qubits with size at most |A|≤1+Σ_i=1^└M/2┘δ(δ−1)ⁱ⁻¹. where δ=2(2ω−1) is the degree of the space-time graph.

The proof of Proposition 11 provided below relies on Proposition 13

Proof. Any connected stabilizer is supported on a connected subgraph of the space-time graph. As a result, any connected stabilizer with weight≤M is included in a ball with radius └M/2┘ of the space-graph. This guarantees that it will be discovered by Algorithm 3.

In Algorithm 3 are computed all the operators with weight up to M that belong to a subgroup (A) of the Pauli group. If the subgroup is small, one can proceed by brute force and run over all the elements of (A). Otherwise, one can speed-up this subroutine using information sets for Pauli groups as in [Ref. 3].

10. Applications

In this section is combined all the ingredients developed in this disclosure to produce a flexible scheme for the correction of circuit faults in Clifford circuits. The full protocol is explained in FIG. 4.

10.1. Standard Design Procedure for a Quantum Error Correction Scheme

To emphasize the advantage of this approach, the general approach to designing and simulating a quantum error correction scheme will first be reviewed. For simplicity, the focus is on stabilizer codes, and the standard circuit noise model reviewed in Section 4 is assumed.

To describe a complete quantum error correction scheme for a given stabilizer code, one must design the following components:

• • 1. Syndrome extraction circuit: A quantum circuit that takes as an input a noisy encoded state and returns a bit string.
  • 2. Syndrome map: A classical procedure that takes as an input the outcome of the syndrome extraction circuit and returns bit string called a syndrome.
  • 3. Decoder: A classical procedure that takes as an input the syndrome and that returns a correction to apply to the encoded state.

For example, in the case of the surface code, one can consider the standard syndrome extraction circuit [Ref. 10] made with d rounds of plaquette measurements where each round extracts the outcome of all the plaquettes in depth 6 (one rounds of ancilla preparation, four rounds of CNOTs and 1 round of ancilla measurement). To obtain the syndrome from this circuit outcome, one computes the XOR of the outcome vectors obtained in consecutive rounds of plaquette measurements to produce a syndrome. Then, the syndrome is fed to a surface code decoder such as the Minimum Weight Perfect Matching decoder [Ref. 9] or the Union-Find decoder [Ref. 16].

10.2. Automated Circuit Fault Correction

Proposed here is a protocol described in FIG. 4 for the correction of faults in a Clifford circuit that uses only the Clifford circuit as an input instead of the three components required in the previous section.

Consider a circuit with m measurements. The first step of the protocol is the computation of a set of outcome checks u₁, . . . , u_r∈₂^m using Algorithm 1. In the absence of faults, running the circuit produces an outcome vector o∈₂^m that satisfy (o|u₁)= . . . (o|u_r)=0. Therefore, one can use these values to detect and correct circuit faults. Moreover, the set of outcome checks returned by Algorithm 1 is maximal. It fully describes the set of possible outcomes for the circuit, which means that one is using all the information available to detect and correct faults.

Given the outcome checks, it is a syndrome map and a decoder are to be constructed in order to transform the check values (o|u_i) into a correction to apply to the output state of the circuit. For small circuits, this can be done with the syndrome map oσ where σ_i=(o|u_i) and a lookup decoder. Naively, one can construct a lookup decoder for the circuit using the outcome checks u_i as follows. The method loops over all the fault configurations of the circuit with up to M faults for some integer M. For each fault configuration F, it computes the syndrome value induced by F and stores a configuration made with a minimum number of faults for each syndrome σ.

Thanks to Theorem 2, one can import tools from the stabilizer formalism to apply them to the correction of circuit faults. For instance, one can use the construction of a lookup decoder for stabilizer codes proposed in [Ref. 3] to produce a lookup decoder for the space-time code of the circuit and use it to correct circuit faults.

Lookup decoders are impractical for large system sizes. To make the decoding of large circuit possible, one must restrict the set of schemes considered because the decoding problem for linear code and stabilizer code is generally intractable [Ref. 14], [Ref. 15]. The focus now is on the case of circuit that admits local redundancy in the sense that the space-time code associated with the circuit has many weight stabilizers. This assumption is even more justified because the value of an outcome check corresponding to a large weight stabilizer in the space-time code will be very noisy and unreliable.

After computing the outcome checks u₁, . . . , u_r using Algorithm 1, one may compute the corresponding stabilizers , . . . , . Then Algorithm 3 is run to produce a set low-weight stabilizer generators for the space-time code. These generators define a new syndrome map whose components are related to the check values (o|u_i) by a linear map. A set of low-weight generators is now available, and one may use any LDPC code decoder for this code.

In these simulations, the Union-Find decoder is considered, which can be used for local topological codes [Ref. 16] or for LDPC codes [Ref. 7]. Alternatively, one could consider other decoding strategies such as the Renormalization Group decoder [Ref. 8] for topological codes or a Belief Propagation decoder for LDPC codes [Ref. 5], [Ref. 6].

To estimate the performance of a quantum error correction scheme, it is common to assume that the simulation ends with a perfect round of measurement of the stabilizers of the code. This can be done in the current setting by appending the circuit with noiseless measurements of a set of stabilizer generators of the output state of the circuit.

Similarly, if simulating the performance of an input circuit acting on a state living in a stabilizer code is desired, then one can prepend a round of noiseless measurement of a set of stabilizer generators of the input code to the circuit.

11. Recap, Outlook, and References

Proposed herein is a versatile strategy for the correction of circuit faults in Clifford circuits based on the reduction of this problem to the correction of a stabilizer code. The main advantage of this approach is its flexibility. It applies to any Clifford syndrome extraction circuit, including the syndrome extraction circuits of topological codes and Floquet codes and it also applies to general Clifford circuits which are not necessarily based on a quantum code.

This scheme can be used to automatically generate low-weight checks in Clifford circuits. Alternatively, one could use this as a compilation tool allowing to detect and remove redundancy in Clifford circuit. Adapting Algorithm 1 for this task is immediate.

For additional context, the interested reader is referred to the following references, which are hereby incorporated by reference herein, for all purposes.

• [Ref. 1] Dave Bacon, Steven T. Flammia, Aram W. Harrow, and Jonathan Shi. Sparse quantum codes from quantum circuits. In Proceedings of the forty-seventh annual ACM symposium on Theory of Computing, 327-334, 2015.
• [Ref. 2] Sergey Bravyi and Alexei Kitaev. Universal quantum computation with ideal Clifford gates and noisy ancillas. Physical Review A, 71(2):022316, 2005.
• [Ref. 3] Nicolas Delfosse, Adam Paetznick, and Alexander Vaschillo. Lookup decoders for stabilizer codes, 2022.
• [Ref. 4] Robert Gallager. Low-density parity-check codes. IRE Transactions on information theory, 8(1):21-28, 1962.
• [Ref. 5] Pavel Panteleev and Gleb Kalachev. Degenerate quantum LDPC codes with good finite length performance. Quantum, 5, 585, 2021.
• [Ref. 6] Joschka Roffe, David R. White, Simon Burton, and Earl Campbell. Decoding across the quantum low-density parity-check code landscape. Physical Review Research, 2(4), 2020.
• [Ref. 7] Nicolas Delfosse, Vivien Londe, and Michael E. Beverland. Toward a Union-Find decoder for quantum LDPC codes. In IEEE Transactions on Information Theory, IEEE, 2022.
• [Ref. 8] Sergey Bravyi, and Jeongwan Haah. Quantum self-correction in the 3d cubic code model. Physical review letters, 111(20):200501, 2013.
• [Ref. 9] Eric Dennis, Alexei Kitaev, Andrew Landahl, and John Preskill. Topological quantum memory. Journal of Mathematical Physics, 43(9):4452-4505, 2002.
• [Ref. 10] Austin G. Fowler, Matteo Mariantoni, John M. Martinis, and Andrew N. Cleland. Surface codes: Towards practical large-scale quantum computation. Physical Review A, 86(3):032324, 2012.
• [Ref. 11] Hector Bombin and Miguel Angel Martin-Delgado. Topological quantum distillation. Physical review letters, 97(18):180501, 2006.
• [Ref. 12] Rui Chao, Michael E. Beverland, Nicolas Delfosse and Jeongwan Haah. Optimization of the surface code design for majorana-based qubits. Quantum, 4:352, 2020.
• [Ref. 13] Matthew B. Hastings and Jeongwan Haah. Dynamically generated logical qubits. Quantum, 5:564, 2021.
• [Ref. 14] Elwyn Berlekamp, Robert McEliece, and Henk Van Tilborg. On the inherent intractability of certain coding problems (corresp.). IEEE Transactions on Information Theory, 24(3):384-386, 1978.
• [Ref. 15] Pavithran Iyer and David Poulin. Hardness of decoding quantum stabilizer codes. IEEE Transactions on Information Theory, 61(9):5209-5223, 2015.
• [Ref. 16] Nicolas Delfosse, and Naomi H. Nickerson. Almost-linear time decoding algorithm for topological codes. Quantum, 5:595, 2021.

12. Levels Supporting a Check Operator

It is proved in this section that the support of a check operator is related to the support of the measurements involved in the corresponding check of the outcome code.

Lemma 8. Let u∈()^⊥ be a non-zero vector. Denote by _u (respectively ′_u) the minimum (respectively maximum) level of a measured operator S_j with u_j=1. If <_u or ≥′_u then =I.

Proof. By definition of ′_u, for all ≥′_u the component F(u) is trivial. Applying Proposition 2, this shows that is also trivial for all ≥′_u.

Assume now that =0. It is known from Lemma 5 that commutes with all fault operators η_0.5(P) supported on level 0.5. Because P can be any operator of _n, this implies =I.

Consider now the case <_u; it will be proved that =_0.5 which is the identity. Applying Proposition 2,

$\begin{array}{cc}{\overleftarrow{F\left(u\right)}}_{0.5}=\prod _{j=}^{\Delta }\left(U_{0,j}^{-1}{F}_{j+0.5}{U}_{0,j}\right)& \left(67\right)\end{array}$ because for all j<, F(u)_j+0.5=I. Using Eq. (17), U_0,j=for all j≤ which yields

$\begin{array}{cccc}{\overleftarrow{F\left(u\right)}}_{0.5}& =& \prod _{j=\ell }^{\Delta }\left({\left(U_{\ell ,j}{U}_{0,\ell }\right)}^{-1}{F}_{j+0.5}{U}_{\ell ,j}{U}_{0,\ell }\right)& \left(68\right)\\ =& U_{0,\ell }^{-1}\prod _{j=\ell }^{\Delta }\left(U_{\ell ,j}^{-1}{F}_{j+0.5}{U}_{\ell ,j}\right)U_{0,\ell }& \left(68\right)\\ =& U_{0,\ell }^{-1}{\overleftarrow{F\left(u\right)}}_{\ell +0.5}{U}_{0,\ell }.& \left(70\right)\end{array}$ Because _0.5 is trivial, this relation implies ==I.

13. Alternative Definition of the Check Operators

One may prefer to use only the propagation instead of both propagation and back-propagation. Here, it is shown that one can obtain the check operators by propagating forward the fault operators F′(u) defined in Section 7.

Proposition 12. If u∈()^⊥, then,={right arrow over (F′(u))}.  (71)

First a lemma will be proved.

Lemma 9. Let u∈₂^m. If =I then={right arrow over (F′(u))}.  (72)

Proof. It will be proved by induction that ={right arrow over (F′(u))} for all level ,

For =0, =I by assumption and by definition of the propagation {right arrow over (F′(u))}_0.5=I.

Assume that the result is true for level −1<Δ. Using Proposition 2,{right arrow over (F′(u))}={right arrow over (F′(u))}F′(u)_{(73)and=F(u).  (74)Using the induction hypothesis, one can replace {right arrow over (F′(u))} by in Eq. (73) and one may use Eq. (74) for the value of . This leads to the equation}

$\begin{array}{cccc}{\overrightarrow{F^{\prime }\left(u\right)}}_{\ell +0.5}& =& U_{\ell }{\overleftarrow{F\left(u\right)}}_{\ell -0.5}{U}_{\ell }^{-1}{F^{\prime }\left(u\right)}_{\ell +0.5}& \left(75\right)\\ =& U_{\ell }{U}_{\ell }^{-1}{\overleftarrow{F\left(u\right)}}_{\ell +0.5}{U}_{\ell }{F\left(u\right)}_{\ell -0.5}{U}_{\ell }^{-1}{F^{\prime }\left(u\right)}_{\ell +0.5}& \left(76\right)\\ =& {\overleftarrow{F\left(u\right)}}_{\ell +0.5}{U}_{\ell }{F\left(u\right)}_{\ell -0.5}{U}_{\ell }^{-1}{F^{\prime }\left(u\right)}_{\ell +0.5}& \left(77\right)\end{array}$ By definition of acts trivially on F(u) implying F(u)_−0.5=F(u). Injecting this in the previous equation produces{right arrow over (F′(u))}=F(u)F′(u)_{(78)which leads to {right arrow over (F′(u))}= because F(u)=F′(u) by definition.}

Proof. [Proof of Proposition 12] By Lemma 5, it is Known that commutes with all Pauli operators P∈_n. The only Pauli operator that satisfies this property is =I. Therefore, the operator satisfies the assumption of Lemma 9 which proves the Proposition.

14. The Connected Components of a Stabilizer of the Space-Time Code

The proof of proposition 11 relies on the following proposition. The proof of this proposition relies on lemmas proven after the proposition.

Proposition 13. Let S be a stabilizer for a space-time code. The restriction S_|κ of S to a connected component κ of the support of S in the space-time graph is a stabilizer of the space-time code.

Proof. Based on lemma 10, the restriction S, can be written as for some vector v. To show that this is a stabilizer of the space-time code, it must be shown that v∈()^⊥. Denote by ′_v the maximum level of a measured operator S_j of the circuit such that v_j=1. The product of the measured operators indexed by v at level ′_v is F(v). By Lemma 11, this operator is equal to . This is a stabilizer for the output of the circuit [′_v−1] based on Lemma 12 (recall that [′_v] is the su circuit containing all the operations of with level≤′_v). This implies that, in the absence of circuit faults, the outcomes of the measurements of the operators S_j with v_j=1 have a fixed parity 0, which means that (o|v)=0 for all o∈(). This proves the proposition.

Lemma 10. Let be a Clifford circuit with m measurements. Let S be a stabilizer for a space-time code. One may decompose S as

$\begin{array}{cc}S=\prod _i\overleftarrow{F\left(u\left(i\right)\right)}& \left(79\right)\end{array}$ where u(i)∈₂^m. Moreover, the support of the operators have disjoint supports.

Proof. One may decompose S as

$\begin{array}{cc}S=\prod _i{S}_{❘{\kappa }_i}& \left(80\right)\end{array}$ where κ₁, κ₂, . . . are the connected components of the support of S in the space-time graph. By construction, the operators S_|κi have disjoint support.

Because it is a stabilizer, the operator S is of the form with u∈()^⊥. Given a measured operator S_j of the circuit with level _j, define V(S_j) to be the set of vertices of space-time graph of the form (_j±0.5, q) where q is a qubit of support of S_j. Define the vector u(i)∈₂^m to be the restriction of u to the set of coordinates j such that the circuit operation V(S_j) overlaps with κ_i. Because it is a clique of the space-time graph, a set V(S_j) can only overlap with a single connected component κ_i. Therefore, u can be decomposed as u=Σ_iu(i) and the vectors u(i) do not overlap. Applying Proposition 5, this yields

$\begin{array}{cc}\overleftarrow{F\left(u\right)}=\prod _i\overleftarrow{F\left(u\left(i\right)\right)}.& \left(81\right)\end{array}$

Now it will be shown that the support of is the component κ_i. By definition of the backpropagation, if a qubit Q=(=0.5, q) belongs to the support of , there must exists a path in this support that connects Q to a set V(S_j) for some j∈supp(u(i)) (otherwise one cannot reach Q by back-propagating F(u(i))). By definition of the set u(i), the proves that the qubit Q is part of the connected component κ_i. This shows that supp=κ_i which implies =S_κi and leads to the decomposition claimed in the lemma.

Lemma 11. Let be a Clifford circuit with depth Δ and with m measurements. Let v∈₂^m. If =I, then=  (82)where ′_v is the maximum level of a measured operator S_j with v_j=1.

Proof. By definition, level ′_v−0.5 is the largest non-trivial level of and for this level=.  (83)Combining this with Lemma 9 this proves result.

In the following lemma [] denotes the subcircuit of that contains all the operations of with level≤.

Lemma 12. Let be a Clifford circuit with depth Δ and with m measurements. Let u∈()^⊥ and let v∈₂^m such that is the restriction of to one of a connected component of its support in the space-time graph. Then for all =1, . . . Δ, the operator belongs to output stabilizer group of the subcircuit [].

Proof. This result will be proved by induction on .

For =1, the result holds because the stabilizer group of the output of the subcircuit [1] is generated by the measured operators at level 1 and {right arrow over (F′(v))}_1.5=F′(v)_1.5 is a product of measured operators at level 1.

Assume now that is a stabilizer of the output state of the circuit [−1] and it will be proved that the result is true at level .

The measurements performed at level do not affect the stabilizer of the circuit because it commutes with these measurements. Indeed, consider a measured operator M of the level . From Lemma 4, it is known that [η(M), ]=0 because is a stabilizer of the space-time code. This equation leads to [M,]=0 and [M,]=0 using Lemma 9. By definition of the space-time graph of the circuit, the operation M can only overlap with at most one of the connected component of the {right arrow over (F′(u))}. Therefore, [M,]=0. This proves that the stabilizer commutes with all the operators measured at level . As a result, it is still a stabilizer after applying these measurements. Moreover, the measured operators are also stabilizers.

Consider now the effect of the unitary operations. The unitary operations of level induce a conjugation of the stabilizers by which is the product of all unitary operations at level . This maps the stabilizer onto

$\begin{array}{cc}{U}_{}{\overrightarrow{F^{\prime }\left(v\right)}}_{-1+0.5}{U}_{}=\prod _{j=0}^{-1}{U}_{j,}{F^{\prime }\left(v\right)}_{j+0.5}{U}_{j,}^{-1}.& \left(84\right)\end{array}$ Moreover, it is known that is a stabilizer because it is a product of measured operators at level . Multiplying the stabilizer obtained Eq. (84) with the stabilizer for the output of the circuit [].

15. Classical Computer System and Additional Description

The methods herein may be tied to a computer system of one or more computing devices. Such methods and processes may be implemented as an application program or service, an application programming interface (API), a library, and/or other computer-program product.

FIG. 10 provides a schematic representation of a classical computer 122 configured to provide some or all of the classical computer system functionality disclosed herein. Classical computer 122 may take the form of a personal computer, application-server computer, or any other computing device.

Classical computer 122 includes a logic system 124 and a computer-memory system 126. Classical computer 122 may optionally include a display system 128, an input system 130, a network system 132, and/or other systems not shown in the drawings.

Logic system 124 includes one or more physical devices configured to execute instructions. For example, the logic system may be configured to execute instructions that are part of at least one operating system (OS), application, service, and/or other program construct. The logic system may include at least one hardware processor (e.g., microprocessor, central processor, central processing unit (CPU) and/or graphics processing unit (GPU)) configured to execute software instructions. Additionally or alternatively, the logic system may include at least one hardware or firmware device configured to execute hardware or firmware instructions. A processor of the logic system may be single-core or multi-core, and the instructions executed thereon may be configured for sequential, parallel, and/or distributed processing. Individual components of the logic system optionally may be distributed among two or more separate devices, which may be remotely located and/or configured for coordinated processing. Aspects of the logic system may be virtualized and executed by remotely-accessible, networked computing devices configured in a cloud-computing configuration.

Computer-memory system 126 includes at least one physical device configured to temporarily and/or permanently hold computer system information, such as data and instructions executable by logic system 124. When the computer-memory system includes two or more devices, the devices may be collocated or remotely located. Computer-memory system 126 may include at least one volatile, nonvolatile, dynamic, static, read/write, read-only, random-access, sequential-access, location-addressable, file-addressable, and/or content-addressable computer-memory device. Computer-memory system 126 may include at least one removable and/or built-in computer-memory device. When the logic system executes instructions, the state of computer-memory system 126 may be transformed—e.g., to hold different data.

Aspects of logic system 124 and computer-memory system 126 may be integrated together into one or more hardware-logic components. Any such hardware-logic component may include at least one program- or application-specific integrated circuit (PASIC/ASIC), program- or application-specific standard product (PSSP/ASSP), system-on-a-chip (SOC), or complex programmable logic device (CPLD), for example.

Logic system 124 and computer-memory system 126 may cooperate to instantiate one or more logic machines or engines. As used herein, the terms ‘machine’ and ‘engine’ each refer collectively to a combination of cooperating hardware, firmware, software, instructions, and/or any other components that provide computer system functionality. In other words, machines and engines are never abstract ideas and always have a tangible form. A machine or engine may be instantiated by a single computing device, or a machine or engine may include two or more subcomponents instantiated by two or more different computing devices. In some implementations, a machine or engine includes a local component (e.g., a software application executed by a computer system processor) cooperating with a remote component (e.g., a cloud computing service provided by a network of one or more server computer systems). The software and/or other instructions that give a particular machine or engine its functionality may optionally be saved as one or more unexecuted modules on one or more computer-memory devices.

Machines and engines may be implemented using any suitable combination of machine learning (ML) and artificial intelligence (AI) techniques. Non-limiting examples of techniques that may be incorporated in an implementation of one or more machines include support vector machines, multi-layer neural networks, convolutional neural networks (e.g., spatial convolutional networks for processing images and/or video, and/or any other suitable convolutional neural network configured to convolve and pool features across one or more temporal and/or spatial dimensions), recurrent neural networks (e.g., long short-term memory networks), associative memories (e.g., lookup tables, hash tables, bloom filters, neural Turing machines and/or neural random-access memory) unsupervised spatial and/or clustering methods (e.g., nearest neighbor algorithms, topological data analysis, and/or k-means clustering), and/or graphical models (e.g., (hidden) Markov models, Markov random fields, (hidden) conditional random fields, and/or AI knowledge bases)).

When included, display system 128 may be used to present a visual representation of data held by computer-memory system 126. The visual representation may take the form of a graphical user interface (GUI) in some examples. The display system may include one or more display devices utilizing virtually any type of technology. In some implementations, display system may include one or more virtual-, augmented-, or mixed reality displays.

When included, input system 130 may comprise or interface with one or more input devices. An input device may include a sensor device or a user input device. Examples of user input devices include a keyboard, mouse, or touch screen.

When included, network system 132 may be configured to communicatively couple classical computer 122 with one or more other computer systems. The network system may include wired and/or wireless communication devices compatible with one or more different communication protocols. The network system may be configured for communication via personal-, local- and/or wide-area networks.

In conclusion, one aspect of this disclosure is directed to a method to correct a fault in application of a Clifford circuit to a qubit register of a quantum computer, the method comprising: receiving circuit data defining the Clifford circuit; emitting outcome code based on the circuit data, the outcome code including a series of outcome checks each corresponding to an anticipated error syndrome of the application of the Clifford circuit to the qubit register; and emitting space-time quantum code corresponding to the Clifford circuit based on the circuit data and on the outcome code, the space-time quantum code including a series of check operators that support quantum-error correction, thereby enabling fault correction in the application of the Clifford circuit to the qubit register. One technical benefit this provides is that the problem of circuit-fault correction is reduced to the more tractable problem of error correction in quantum code.

In some implementations the Clifford circuit includes one or more Clifford gates. In some implementations the Clifford circuit includes one or more Pauli measurements. In some implementations the Clifford circuit includes redundant measurements. In some implementations the Clifford circuit is an error-syndrome extraction circuit. In some implementations the space-time quantum code is a quantum-stabilizer code. This provides an additional technical benefit of ensuring that the various output syndromes of the space-time quantum code can be handled according to stabilizer-decoder procedures. In some implementations each of the check operators is a stabilizer generator of the space-time quantum code, and measurement of each stabilizer generator returns a result of a corresponding outcome check of the outcome code. In some implementations the method further comprises: building a lookup decoder for the space-time quantum code; and decoding the space-time quantum code via the lookup decoder to correct the fault in the application of the Clifford circuit to the qubit register. This provides an additional technical benefit of enabling correction of the circuit fault, to thereby reduce or eliminate the error in the quantum circuit and achieve a more accurate computation. In some implementations the method further comprises: emitting low-density parity-check (LDPC) space-time quantum code based on the circuit data, the outcome code, and the space-time quantum code, the LDPC space-time quantum code including connected stabilizers of the space-time quantum code up to a predetermined weight; and decoding the LDPC space-time quantum code in an LDPC decoder to correct the fault in the application of the Clifford circuit to the qubit register. This provides an additional technical benefit of enabling correction of the circuit fault, to thereby reduce or eliminate the error in the quantum circuit and achieve a more accurate computation. In some implementations emitting the LDPC space-time quantum code comprises receiving the space-time quantum code in D dimensions and producing local stabilizer generators in D+1 dimensions. In some implementations emitting the LDPC space-time quantum code comprises: constructing a space-time graph of the Clifford circuit; and constructing a set of stabilizer generators of the space-time code that are supported on local regions of the space-time graph.

Another aspect of this disclosure is directed to a computer system coupled operatively to a quantum computer, the computer system comprises a processor and, operatively coupled to the processor, computer memory holding instructions that cause the processor to correct a fault in application of a Clifford circuit to a qubit register of the quantum computer. The instructions comprise: instructions (A) for receiving circuit data defining the Clifford circuit; instructions (B) for emitting outcome code based on the circuit data, the outcome code including a series of outcome checks each corresponding to an anticipated error syndrome of the application of the Clifford circuit to the qubit register; and instructions (C) for emitting space-time quantum code corresponding to the Clifford circuit based on the circuit data and the outcome code, the space-time quantum code including a series of check operators that support quantum-error correction, thereby enabling fault correction in the application of the Clifford circuit to the qubit register. One technical benefit this provides is that the problem of circuit-fault correction is reduced to the more tractable problem of error correction in quantum code.

In some implementations the Clifford circuit includes redundant measurements. In some implementations the Clifford circuit is an error-syndrome extraction circuit. In some implementations the space-time quantum code is a quantum-stabilizer code. In some implementations each of the check operators is a stabilizer generator of the space-time quantum code, and wherein measurement of each stabilizer generator returns a result of a corresponding outcome check of the outcome code. This provides an additional technical benefit of ensuring that the various output syndromes of the space-time quantum code can be handled according to stabilizer-decoder procedures. In some implementations the computer system further comprises: instructions for emitting low-density parity-check (LDPC) space-time quantum code based on the circuit data, the outcome code, and the space-time quantum code, the LDPC space-time quantum code including connected stabilizers of the space-time quantum code up to a predetermined weight; and instructions for decoding the LDPC space-time quantum code in an LDPC decoder to correct the fault in the application of the Clifford circuit to the qubit register. This provides an additional technical benefit of enabling correction of the circuit fault, to thereby reduce or eliminate the error in the quantum circuit and achieve a more accurate computation. In some implementations emitting the LDPC space-time quantum code comprises receiving the space-time quantum code in D dimensions and producing local stabilizer generators in D+1 dimensions. In some implementations emitting the LDPC space-time quantum code comprises: constructing a space-time graph of the Clifford circuit; and constructing a set of stabilizer generators of the space-time code that are supported on local regions of the space-time graph.

Another aspect of this disclosure is directed to a method to correct a fault in application of a Clifford circuit to a qubit register of a quantum computer, the method comprising: receiving circuit data defining the Clifford circuit; emitting outcome code based on the circuit data, the outcome code including a series of outcome checks each corresponding to an anticipated error syndrome of the application of the Clifford circuit to the qubit register; emitting space-time quantum code corresponding to the Clifford circuit based on the circuit data and on the outcome code, the space-time quantum code including a series of check operators that support quantum-error correction, thereby enabling fault correction in the application of the Clifford circuit to the qubit register; emitting low-density parity-check (LDPC) space-time quantum code based on the circuit data, the outcome code, and the space-time quantum code, the LDPC space-time quantum code including connected stabilizers of the space-time quantum code up to a predetermined weight; and decoding the LDPC space-time quantum code in an LDPC decoder to correct the fault in the application of the Clifford circuit to the qubit register. One technical benefit this provides is that the problem of circuit-fault correction is reduced to the more tractable problem of error correction in quantum code. Another technical benefit is that the output of the space-time code corresponding to the Clifford circuit can be decoded using any suitable LDPC. Thus, a dedicated decoder need not be constructed to handle the output.

This disclosure is presented by way of example and with reference to the attached drawing figures. Components, process steps, and other elements that may be substantially the same in one or more of the figures are identified coordinately and described with minimal repetition. It will be noted, however, that elements identified coordinately may also differ to some degree. It will be further noted that the figures are schematic and generally not drawn to scale. Rather, the various drawing scales, aspect ratios, and numbers of components shown in the figures may be purposely distorted to make certain features or relationships easier to see.

It will be understood that the configurations and/or approaches described herein are exemplary in nature, and that these specific embodiments or examples are not to be considered in a limiting sense, because numerous variations are possible. The specific routines or methods described herein may represent one or more of any number of processing strategies. As such, various acts illustrated and/or described may be performed in the sequence illustrated and/or described, in other sequences, in parallel, or omitted. Likewise, the order of the above-described processes may be changed.

The subject matter of the present disclosure includes all novel and non-obvious combinations and sub-combinations of the various processes, systems and configurations, and other features, functions, acts, and/or properties disclosed herein, as well as any and all equivalents thereof.

Claims

1. A method to correct a fault in application of a Clifford circuit to a qubit register of a quantum computer, the method comprising: receiving circuit data defining the Clifford circuit;emitting outcome code based on the circuit data, the outcome code including a series of outcome checks each corresponding to an anticipated error syndrome of the application of the Clifford circuit to the qubit register; andemitting space-time quantum code corresponding to the Clifford circuit based on the circuit data and on the outcome code, the space-time quantum code including a series of check operators that support quantum-error correction, thereby enabling fault correction in the application of the Clifford circuit to the qubit register.

2. The method of claim 1 wherein the Clifford circuit includes one or more Clifford gates.

3. The method of claim 1 wherein the Clifford circuit includes one or more Pauli measurements.

4. The method of claim 1 wherein the Clifford circuit includes redundant measurements.

5. The method of claim 1 wherein the Clifford circuit is an error-syndrome extraction circuit.

6. The method of claim 1 wherein the space-time quantum code is a quantum-stabilizer code.

7. The method of claim 1 wherein each of the check operators is a stabilizer generator of the space-time quantum code, and wherein measurement of each stabilizer generator returns a result of a corresponding outcome check of the outcome code.

8. The method of claim 1 further comprising: building a lookup decoder for the space-time quantum code; and decoding the space-time quantum code via the lookup decoder to correct the fault in the application of the Clifford circuit to the qubit register.

9. The method of claim 1 further comprising: emitting low-density parity-check (LDPC) space-time quantum code based on the circuit data, the outcome code, and the space-time quantum code, the LDPC space-time quantum code including connected stabilizers of the space-time quantum code up to a predetermined weight; anddecoding the LDPC space-time quantum code in an LDPC decoder to correct the fault in the application of the Clifford circuit to the qubit register.

10. The method of claim 9 wherein emitting the LDPC space-time quantum code comprises receiving the space-time quantum code in D dimensions and producing local stabilizer generators in D+1 dimensions.

11. The method of claim 9 wherein emitting the LDPC space-time quantum code comprises: constructing a space-time graph of the Clifford circuit; andconstructing a set of stabilizer generators of the space-time code that are supported on local regions of the space-time graph.

12. A computer system coupled operatively to a quantum computer, the computer system comprising: a processor; andoperatively coupled to the processor, computer memory holding instructions that cause the processor to correct a fault in application of a Clifford circuit to a qubit register of the quantum computer, the instructions comprising: instructions (A) for receiving circuit data defining the Clifford circuit;instructions (B) for emitting outcome code based on the circuit data, the outcome code including a series of outcome checks each corresponding to an anticipated error syndrome of the application of the Clifford circuit to the qubit register; andinstructions (C) for emitting space-time quantum code corresponding to the Clifford circuit based on the circuit data and the outcome code, the space-time quantum code including a series of check operators that support quantum-error correction, thereby enabling fault correction in the application of the Clifford circuit to the qubit register.

13. The computer system of claim 12 wherein the Clifford circuit includes redundant measurements.

14. The computer system of claim 12 wherein the Clifford circuit is an error-syndrome extraction circuit.

15. The computer system of claim 12 wherein the space-time quantum code is a quantum-stabilizer code.

16. The computer system of claim 12 wherein each of the check operators is a stabilizer generator of the space-time quantum code, and wherein measurement of each stabilizer generator returns a result of a corresponding outcome check of the outcome code.

17. The computer system of claim 12 further comprising: instructions for emitting low-density parity-check (LDPC) space-time quantum code based on the circuit data, the outcome code, and the space-time quantum code, the LDPC space-time quantum code including connected stabilizers of the space-time quantum code up to a predetermined weight; andinstructions for decoding the LDPC space-time quantum code in an LDPC decoder to correct the fault in the application of the Clifford circuit to the qubit register.

18. The computer system of claim 17 wherein emitting the LDPC space-time quantum code comprises receiving the space-time quantum code in D dimensions and producing local stabilizer generators in D+1 dimensions.

19. The computer system of claim 17 wherein emitting the LDPC space-time quantum code comprises: constructing a space-time graph of the Clifford circuit; andconstructing a set of stabilizer generators of the space-time code that are supported on local regions of the space-time graph.

20. A method to correct a fault in application of a Clifford circuit to a qubit register of a quantum computer, the method comprising: receiving circuit data defining the Clifford circuit;emitting outcome code based on the circuit data, the outcome code including a series of outcome checks each corresponding to an anticipated error syndrome of the application of the Clifford circuit to the qubit register;emitting space-time quantum code corresponding to the Clifford circuit based on the circuit data and on the outcome code, the space-time quantum code including a series of check operators that support quantum-error correction, thereby enabling fault correction in the application of the Clifford circuit to the qubit register;emitting low-density parity-check (LDPC) space-time quantum code based on the circuit data, the outcome code, and the space-time quantum code, the LDPC space-time quantum code including connected stabilizers of the space-time quantum code up to a predetermined weight; anddecoding the LDPC space-time quantum code in an LDPC decoder to correct the fault in the application of the Clifford circuit to the qubit register.