The present invention relates to a semiconductor sensor for nucleic acid analysis and the like, and especially to an analytical technique using an FET array substrate.
As a method for determining deoxyribonucleic acid (DNA) sequence without using a reagent, a measurement method using a hole (nanopore) with nanometer sizes which are as large as DNA and a nanopore device with electrodes provided therearound has been drawing attention. Non-patent document 1 and patent document 1 disclose configurations and methods for measuring a change in a current between channels when DNA passes through the nanopore using a field effect transistor (FET) structure produced on a semiconductor substrate and the nanopore. The FET structure has a source electrode, a drain electrode, and a channel (silicon nanowire with a diameter of 20 nm or larger) which connects the two electrodes (refer to FIGS. 1 and 3 of non-patent document 1). In addition, the structure has a nanopore which penetrates the substrate over the channel. The spaces above and below the substrate are filled with an electrolyte, the solution molecules in upper reservoir and lower reservoir can move between the two reservoirs only through the nanopore. When the electrodes are immersed in the two reservoirs and a voltage is applied to the electrodes, an ion current caused by ionic substances which have passed through the nanopore flows.
In addition, when a voltage is applied between the source and drain, a current also flows to the channel (hereinafter referred to as “channel current”). The electrodes immersed in the solution also function as gate electrodes for causing the channel current to flow. When DNA passes through the nanopore, the ion current is blocked and the value decreases (block current), so that the passage of DNA can be known. Simultaneously, the potential around the nanopore varies in correlation with the effective electric charge of nucleotide, and therefore a change in the channel current is also measured. Patent document 1 refers to the possibility of DNA sequence decision by the change in the above channel current. FIG. 5 of patent document 1 illustrates the array configuration of a nanopore FET.
In contrast, FIGS. 5a to 5e of patent document 2 illustrate the configuration in which a gate electrode and further a nanopore are provided in the channel which connects the source and drain. The patent document describes a method for distinguishing four types of bases of DNA which pass through the nanopore by detecting a change in the channel potential around the nanopore caused by a difference in the effective charge of nucleotide when DNA passes through the nanopore as a change in the channel current. The voltage applied to the electrolyte in the upper reservoir divided by the device or the voltage applied to the electrode designated by 70 in FIG. 5c becomes the gate voltage. By applying the gate voltage and forming an inversion layer below the gate, the channel is formed. A current then flows between the source and drain through the channel. The thickness of the inversion layer is very small, and the thickness of a current path has a value almost the same as the size of one base. In FIG. 5d, there is the description that the control gate is provided to the side of the channel and gate, and an appropriate voltage is applied to the control gate, so that the current path gathers closer to the pores in the channel.
As stated above, patent document 1 illustrates, in FIG. 5, the array configuration of a nanopore FET, but in the configuration illustrated, electrodes immersed in a solution are shared as gate electrodes, and therefore different gate voltages cannot be applied to the nanopore FETs. Accordingly, the nanopore FETs configuring the nanopore FET array cannot be controlled respectively, and the DNA detection sensitivity of the nanopore FET array cannot be obtained sufficiently.
An object of the present invention is to solve the above-mentioned problems, and to provide an FET array substrate, an analysis system, and a method which are capable of providing sufficient detection sensitivity.
In order to achieve the above-mentioned object, the present invention provides a field effect transistor (FET) array substrate including a source, a drain, a channel and a gate formed on an insulation film, and a through hole or a non-through hole formed on the insulation film and allowing an object to be detected to enter, at least two FETs to which different gate voltages can be applied to exert a field effect on the channel by the gate disposed, the through hole or non-through hole being disposed near the side of the channel, and detecting the presence or absence, or the change of an object to be detected in the through hole or non-through hole from a change in a current flowing from the source to the drain.
Moreover, in order to achieve the above-mentioned object, the present invention provides an analysis system including an FET array substrate having a source, a drain, a channel and a gate formed on an insulation film, a through hole or a non-through hole formed on the insulation film and allowing an object to be detected to enter, at least two FETs to which different gate voltages can be applied to exert a field effect on the channel by the gate disposed, the through hole or non-through hole being disposed near the side of the channel, the FET array substrate detecting the presence or absence, or the change of object to be detected in the through hole or non-through hole from a change in a current flowing from the source to the drain, two solution reservoirs separated by the FET array substrate, two electrodes immersed in the solution reservoirs, a first power source which applies a voltage to the electrodes, a second power source which applies a voltage between the source and drain, and an ampere meter which measures a current flowing through the channel.
Furthermore, in order to achieve the above-mentioned object, the present invention provides an analysis method including immersing an FET array substrate into a solution reservoir, the FET array substrate comprising a source, a drain, a channel, a gate, and a through hole or non-through hole which allows an object to be detected to enter formed on the insulation film, and at least two FETs to which different gate voltages can be applied to exert a field effect on the channel by the gate disposed, the through hole or non-through hole being disposed near the side of the channel, and detecting the presence or absence, or the change of object to be detected in the through hole or non-through hole from a change in a current flowing from the source to the drain, applying a voltage between the source and drain, and measuring a current flowing between the channels.
According to the invention of the present application, the proportion of nanopore FETs which are capable of detecting an object with good sensitivity can be increased. Accordingly, the parallel processing of the measurement of objects to be detected improves.
The mode for carrying out the present Invention will be described below. First, the basic configuration of the present invention will be described. That is, a perspective view of the basic configuration of a nanopore FET configuring an FET array substrate for use in detection analysis of an object to be detected for the purpose of determining DNA base sequences and other purposes is shown in
In
In this basic configuration, by controlling the control gate voltage in a state that a voltage is applied between the source 103 and the drain 104 so that a source voltage < a drain voltage, this device operates as a transistor. It is a so-called side gate type transistor. When the transistor is in an ON-state, an inversion layer is induced in a channel side portion on the control gate side, that is, the nanopore side, and a current therefore flows in the channel side portion on the control gate side. The thickness of the inversion layer, although varying depending on the control gate voltage, is very thin and is about 2 to 3 nm or less. The thickness of the channel in the Y direction is about 4 nm or less.
The channel current changes depending on the change in the electric field caused by differences in the effective charge and effective field of nucleotide, that is, deoxyribonucleotide triphosphate (dNTP) of four bases of DNA which passes through the nanopore 106, and the identification and decoding of the sequence of the four bases are performed by detecting the change.
However, the inventors of the present invention have found that in an FET configuration having a thin channel with a thickness of about 4 nm or less as mentioned above, the transistor characteristics greatly vary for different FETs in the same array. There are some nanopore FETs in which the sensitivity becomes insufficient when the same gate voltage is applied for the above-mentioned difference.
To this end, the present invention is so configured that the source, drain, channel, and gate are provided in the insulation film of the substrate having the above-mentioned basic configuration; a through hole or a non-through hole is provided from one side to the other side of the same for the insulation film in which the source, drain, channel, and gate are formed two or more field effect transistors which exert an electric field effect on the channel by the gate are disposed and the object to be detected is allowed to enter into the through hole or non-through hole. Moreover, the through hole or non-through hole is preferably so configured that it is disposed between the side face on the channel side in the control gate and the vicinity of the side face on the control gate side in the channel the presence of absence of the object to be detected in the through hole or non-through hole and the change in the object to be detected is detected by the change in the current flowing from the source to drain and different the control gate voltages can be applied to further a plurality of transistors.
This configuration allows increasing the proportion of nanopore FETs which are capable of detecting DNA with a good sensitivity. This improves the parallel processing in DNA sequence measurement.
Various examples of the present invention will be sequentially described below with reference to the drawings. It should be noted that the components having the same functions will be denoted by the same numerals in all drawings for explaining examples, and repeated explanation of the same will be omitted as much as possible. The device structures and materials described in Examples are specific examples for realizing the idea of the present invention, and are not for strictly specifying materials and sizes.
<Configuration of Flow Cell>
In a flow cell 230, two reservoirs, that is, a solution reservoir c203 and a solution reservoir t204 separated by a partition 202 having an FET array substrate 201 incorporated therein, are provided. On the FET array substrate 201, two or more nanopore FETs 110 are arrayed. Preferably, about 1000×1000=one million of these nanopore FETs are arrayed. The configuration of each of the nanopore FETs 110 is as described with reference to
The solution in the solution reservoir c203 is accumulated in a waste liquid container 212 through a discharge path 211. A valve 213 is also attached to the waste liquid container 212 to prevent backward flow. Similarly, a buffer solution is injected by a pump 215 from a buffer container 214 into the solution reservoir t204 through an injection path 216. An excessive waste liquid is discharged into a waste liquid container 218 through a discharge path 217. Although omitted in the figure, the pumps 206, 215 and valves 209, 210, 213 are all connected to a control unit 240, and their operation is automatically controlled. The flow cell 230 is produced by affixing polydimethyl siloxane (PDMS) having flow paths provided thereon on the top and bottom of the partition 202 made of an acrylic resin. The flow paths serve as the solution reservoir c203 and the solution reservoir t204.
<Configuration of Electrodes and Nanopore FETs>
An electrode 220 and an electrode 219 are immersed in the solution reservoir c203 and the solution reservoir t204, respectively. The solution reservoir t204 is filled with the buffer solution. DNA which is the target of decoding of this system floats in the buffer solution in the solution reservoir c203. Since ionic substances are contained in the buffer solution, an ion current generates between the electrode 220 and the electrode 219 by applying a voltage between the two reservoirs. Between the electrode 220 and the electrode 219, a first power source 221 for applying a voltage between the two electrodes and an ampere meter 222 for measuring the ion current value are installed. Moreover, this ampere meter 222 includes an analog-digital (AD) converter.
As shown in
<Method for Correcting Characteristics of Nanopore FETs>
In
As shown in
The solution of the DNA to be decoded is now injected into a solution reservoir t203 (404), and the control gate voltage Vc(i) (i is the address specific to each nanopore FET) is applied, and the channel current is measured (405). Herein, Ith is set to 1 nA, but it is preferably any numerical value from 1 to 10 nA, and may be 11 to 100 nA, and 0.1 to 1 nA. In the example of
In the above-mentioned example, a specific value is set to the control gate voltage by using the same value for all nanopore FETs to the back gate voltage. Contrary to this example, a value specific to each nanopore FET may be set to the back gate voltage, and the same value may be set to the control gate voltage.
It should be noted that Ith may not be a specific value, but may be a numerical value with a certain range. For example, with Ith ranging from 1 to 10 nA, a current value at which the derivative dV/dI of the IV characteristics curve becomes the greatest in the above range is set to Ic. In this case, there is an effect that the greater the derivative, the more noticeable the difference in the change in the channel current between bases.
In the above example, the correction of the nanopore FET characteristics is performed before the DNA measurement, but it may be performed during the measurement. In this case, the IV characteristics which have changed during the measurement can be also corrected.
Subsequently, Example 2 of the FET array substrate according to the second Example will be described.
It should be noted that the absence of the control gate may lower the channel current value which flows at the same back gate voltage than that in Example 1. In this case, a voltage higher than that in Example 1 may be applied to the electrode 220 to increase the channel current value. In the chart of
Next, Example of the FET array substrate according to the third Example will be described.
Furthermore, Example of the FET array substrate according to Example 4 will be described.
The DNA base sequence measurement system of this Example is almost identical to
A particle 802 on which a plurarity of the DNA 200 are fixed to be decoded is fixed on the bottom face of the non-through nanopore 801. The DNAs all have the identical sequence. Such a particle 802 is produced in an amplification step by emulsion PCR (Polymerase Chain Reaction). A different amplification step may be used. In order to determine the DNA sequence, base elongation is performed on the particle, and the presence or absence of elongation is detected from a change in the channel current caused by ions released at that time. That is, the DNA sequence can be determined also in the DNA base sequence measurement system of this Example. It should be noted that the above elongation method and similar sequence decision method are described in Jonathan M Rothberg et al. (Nature 2011, doi:10.1038/nature10242).
In the flowchart of
Subsequently, the DNA fixed particle 802 is injected into the flow cell 230 (903), and for all nanopore FETs, Vtrans is applied to the electrode 220, Vcis to the electrode 219, Vb to the back gate, Vs to the source, and Vd to the drain. The channel current Ic is measured while changing the control gate voltage from Vc1 to Vc2 evenly (904).
Moreover, a nanopore FET with a curve which has been greatly changed is determined as available for DNA sequence measurement by comparing the IV characteristics acquired in steps 902 and 904 (905). Only with a nanopore FET determined as available for DNA sequence measurement in this step 905, the control gate voltage Vc(i) which attains Ith=Ic is acquired from the Iv characteristics curve for each nanopore FET, and the nanopore FET address and Vc are stored in the memory of the control unit 240 (herein, i represents the address of the nanopore FET) (906).
Furthermore, with the nanopore FET determined as available for DNA sequence measurement in step 905, Vs is applied to the source, Vd to the drain, and Vb to the back gate, the control gate voltage Vc(i) specific to each nanopore FET is applied, and elongation is performed while the channel current Ic(t) is stored in the memory of the control unit 240 (t is time) (907).
In this Example, by performing the operation described above, not only the correction of the FET characteristics is performed, but also the non-through nanopore 801 containing no beads or no DNA fixed thereonto can be known in advance. It is not necessary to acquire the sequence information of DNA from such a non-through nanopore, and therefore an extra amount of data can be decreased.
Moreover, in the above example, released ions were detected from a plurality of the same DNA fragments using the particle 802. Signals are obtained from a number of molecules, which leads to an increased signal-noise ratio. A single DNA may be fixed on the bottom face of the non-through nanopore 801 without using the particle, and the DNA sequence may be determined by elongation. The diameter of the above non-through nanopore 801 is adjusted depending on the size of the object to be fixed to. It should be noted that the process flow of this Example can be carried out in the FET array substrate 201 in any of Examples 1 to 3 with the through nanopore replaced with a non-through nanopore. Since the solution reservoir c204 is unnecessary, the configuration of the device can be made simpler.
It should be noted that the present invention is not limited to Examples mentioned above, and include various variants. For example, the above-described Examples are detailed explanation provided for better understanding of the present invention, and are not for limiting the present invention to those provided with all the configurations explained. Moreover, part of the configuration of certain Example can be replaced with the configuration of another Example, while the configuration of another Example can be added to part of the configuration of certain Example. Moreover, another configuration may be added to, removed from, or replaced with part of the configuration of each of Examples.
Furthermore, the case where the configurations, functions, processes and the like described above are realized by means of software by creating a program which realizes part or all of them has been mainly explained, but it goes without saying that they can be realized by means of hardware, for example, an integrated circuit designed accordingly.
Filing Document | Filing Date | Country | Kind | 371c Date |
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PCT/JP13/55004 | 2/26/2013 | WO | 00 | 2/25/2014 |