Kimble, “In-depth fibre channel arbitrated loop”, Ch. 2, Port bypass circuit (pp. 42-43); Ch. 15, High-availability loops (pp. 269-282) (Solution Technology, copyright 1996, 1997).* |
Co-Pending patent application S/N 09/474,886 Entitled “Method and Apparatus for Transmitting Fibre-Channel and Non-Fibre Channel Signals”, filed Dec. 29, 1999 and Assigned to Art Unit 2874. |
Co-Pending patent application S/N 09/474,633 Entitled “Method for Testing Signal Integrity in a Data Storage System”, filed Dec. 29, 1999 and Assigned to Art Unit 2782. |
Co-Pending patent application S/N 09/474,112 Entitled “Fibre Channel Data Storage System Fail-Over Mechanism”, filed Dec. 29, 1999 and Assigned to Art Unit 2782. |
Co-Pending patent application S/N 09/474,500 Entitled Fibre Channel Data Storage System Having Improved Rear-End I/O Adapted Hub, filed Dec. 29, 1999 and Assigned to Art Unit 2753. |
Co-Pending patent application S/N 09/473,668 Entitled “Fibre Channel Data Storage System”, filed Dec. 29, 1999 and Assigned to Art Unit 2753. |
Robert W. Kembel, “In-Depth Fiber Channel Arbitrated Loop”, Solution Technology, WWW.soltechnology.com, pp. 269-284, 1997.* |
“Bypass Bus Mechanism for Direct Memory Access Controllers”, IBM Technical Disclosure Bulletin, vol. 33, No. 11, Apr. 1991. |
Kumar Malavalli, “High Speed Fibre Channel Switching Fabric Services” Proceedings of the SPIE, vol. 1577, pp. 216-225, Sep. 4, 1991. |