BRIEF DESCRIPTIONS OF THE DRAWINGS
FIG. 1 is a cross-sectional view showing an example of a structure of a CTFT formed in an embodiment of the present invention;
FIG. 2A is a cross-sectional view showing a manufacturing method of a CTFT formed in an embodiment of the present invention;
FIG. 2B is a cross-sectional view showing a manufacturing method of a CTFT formed in an embodiment of the present invention;
FIG. 2C is a cross-sectional view showing a manufacturing method of a CTFT formed in an embodiment of the present invention;
FIG. 2D is a cross-sectional view showing a manufacturing method of a CTFT formed in an embodiment of the present invention;
FIG. 2E is a cross-sectional view showing a manufacturing method of a CTFT formed in an embodiment of the present invention;
FIG. 2F is-a cross-sectional view showing a manufacturing method of a CTFT formed in an embodiment of the present invention; and
FIG. 3 is a schematic diagram showing an example of manufacturing apparatus for successively performing surface treatment for electrodes of the CTFT in an embodiment of the present invention.
DESCRIPTIONS OF THE PREFERRED EMBODIMENTS
First Embodiment
In this embodiment, the discussion of the Non-Patent Document 8 is extended, and a method for obtaining the Schottky barrier Φ at the electrode/organic semiconductor interface from physical constants of the constituent elements of the electrode and semiconductor is provided. As the combinations of an electrode and organic semiconductor, there are hydrogen-terminated silicon surface/polythiophene polymer, gold/pentacene crystal, gold/various thiol monomolecular film, silver/various thiol monomolecular film, and others, and electron states thereof are examined by the logical computation by first principle calculation and the electron state measurement using a scanning tunnel microscope. As a result, it can be found that the Schottky barrier Φ can be estimated using the following formulas 7 to 11.
More specifically, when the carriers are electrons, the Schottky barrier Φ can be obtained by the formula 7.
Φ=γB(φM−χS)+(1+γB)Eg/2 (formula 7)
Here, the following formulas 8 to 10 are provided.
γB=1−αMSe2dMSNB/εit(Eg+κ) (formula 8)
κ=aαBe2/(εSdB)−2αMSe2/(εitdMS) (formula 9)
εit=1/(1/(2εS)+1/(2εM) (formula 10)
In particular, when the electrode is made of metal, the following formula 11 is provided.
εit˜2εS (formula 11)
Here, φM: work function of the electrode, χS: electron affinity of the organic semiconductor, Eg: bandgap energy of the organic semiconductor, αMS: interaction correction coefficient between electrode and organic semiconductor, e: elementary charge amount of electrons, dMS: interatomic distance between the electrode and organic semiconductor at the electrode/organic semiconductor interface, NB: number of bonds per unit area at the electrode/organic semiconductor interface (chemical bond or other interaction), a: number of nearest neighbor atoms of electrode constituent atoms in an interface direction at the electrode/organic semiconductor interface, αB: interaction correction coefficient between electrode constituent elements in an interface direction at the electrode/organic semiconductor interface, εS: dielectric constant of organic semiconductor, dB: interatomic distance of electrode constituent atoms in an interface direction at the electrode/organic semiconductor interface, and εM: dielectric constant of the electrode (when the electrode is made of metal, εM is infinite). αMS and αB are correction coefficients depending on the types of the interactions and relating to the interaction between the electrode and the organic semiconductor and between electrode constituent elements. It can be understood that the good estimation of the Schottky barrier Φ can be acquired when a value of about α=1 is used for metal bonding and ion bonding and covalent bonding of inorganic semiconductor, an value of about α=0.7 to 1 is used for Van der Waals' forces (intermolecular force) with small interaction in general, and a value of about α=0.4 to 1 is used for the interaction where a certain movement of charges is expected such as the case of silver and pentacene.
It can be understood by the above-described estimation method that examples of the combination where two types of FETs of an n channel FET and a p channel FET can be realized by using one type of electrode and one type of organic semiconductor are as follows, that is, (1) electrode: silver and silver oxide and organic semiconductor: pentacene crystal (single crystal or polycrystal), (2) electrode: silver and silver sulfide (or thiol molecules in which carbon hydride molecules are bonded with sulfur atoms) and organic semiconductor: pentacene crystal (single crystal or polycrystal), (3) electrode: titanium, titanium oxide and organic semiconductor: pentacene crystal (single crystal or polycrystal), and (4) electrode: titanium carbide, titanium oxide and organic semiconductor: pentacene crystal (single crystal or polycrystal).
Second Embodiment
In this embodiment, an example of CTFT according to the present invention will be disclosed.
FIG. 1 is a cross-sectional view schematically showing a structure of a CTFT according to the present invention. In FIG. 1, an organic semiconductor thin film 17 is a polycrystalline pentacene thin film made of pentacene crystal grains in this embodiment. The CTFT is composed of a source electrode 14 and a source electrode 15, an organic semiconductor thin film 17, a common drain electrode 16, and two gate electrodes 12. The CTFT has a structure where an n channel FET 20 and a p channel FET 21 are connected in series. In this embodiment, the source electrode 15 functions as a ground electrode and the source electrode 14 functions as an operation voltage applying electrode, and common voltage signals are inputted to the two gate electrodes 12 and the drain electrode 16 functions as an output electrode. A liquid repellent region 18 is a region with high liquid repellency, and by making the interface between the organic semiconductor thin film 17 and an insulating film 13 in a lyophilic state (low liquid repellency) in a previous step of forming the organic semiconductor thin film 17, the organic semiconductor thin film 17 can be formed spontaneously.
In FIG. 1, the insulating film 13 is formed after forming the gate electrode 12 on a substrate 11. The liquid repellent region 18 and the lyophilic region (interface between the organic semiconductor thin film 17 and the insulating film 13) described with reference to FIG. 1 are formed on the insulating film 13. This lyophilic region is formed in a self-aligned manner so as to be placed at a position corresponding to the gate electrode 12. After forming the organic semiconductor thin film 17 by using the difference in lyophilicity between the liquid repellent region 18 and the lyophilic region, the source electrode 14, the source electrode 15, and the drain electrode 16 are formed.
In the present invention, the source electrode 14 and the source electrode 15 are first made of the same material (silver in this embodiment), and then, the source electrode 14 is selectively oxidized, thereby forming the source electrode 14 (silver oxide electrode) and the source electrode 15 (silver electrode).
Third Embodiment
In this embodiment, an example of a manufacturing method of a CTFT formed by the present invention will be disclosed. FIG. 2A to FIG. 2F are sectional views showing an example of a manufacturing method of a CTFT formed by the present invention. In this embodiment, a manufacturing method of an organic thin-film CTFT according to the present invention will be described, in which a material with plasticity is used and printing process and coating process are employed instead of lithography. FIG. 2A to 2F are cross-sectional views for describing the manufacturing method specifically.
As shown in FIG. 2A, gate electrodes 62 are printed using conductive ink on a plastic substrate 61. Since the gate electrodes 62 are formed by baking the printed ink, it is necessary to pay attention to the softening temperature of the substrate 61 because a plastic substrate is used for the substrate 61. In this embodiment, since a high heat-resistant transparent polyimide sheet with a thickness of 100 μm is used for the substrate 61, the baking temperature can be increased up to about 250° C. Accordingly, the substrate can bear the baking temperature of 120° C. which is required in the case of using ultrafine silver particles diffused solution for the conductive ink.
Polymethyl methacrylate (PMMA) is spin-coated on the substrate 61 and the gate electrodes 62 and then dried sufficiently, thereby forming a gate insulating film 63. In this case, the drying is performed at 100° C. for 10 minutes by using a hot plate. Further, a photosensitive thin film 64 is formed thereon. In this embodiment, a positive resist is spin-coated to form a film with a thickness of 100 nm.
Subsequently, a liquid repellent pattern is formed so as to form a source electrode 68, a source electrode 69, and a drain electrode 70. As a liquid repellent film 65, alkyl-fluoride-based silane coupling agent (DAIKIN INDUSTRIES, Ltd., product name: Optool) diluted by perfluorooctane to 0.1 wt % is spin-coated, and ultraviolet rays are irradiated from the plastic substrate 61 side by using a mercury lamp as illustrated by arrows in FIG. 2B. The ultraviolet ray necessary for the exposure of the photosensitive thin film 64 used in this embodiment is required to have a wavelength of 365 nm, that is, it is an i-ray. Therefore, in order to prevent the laminated gate insulating film 63 (polymer film-polymethyl methacrylate (PMMA) film) from being damaged, the ultraviolet ray with a wavelength of 300 nm or less is desirably cut by a filter in this irradiation. Since the metal electrode has been already formed in the gate electrode 62, the irradiated ultraviolet ray cannot penetrate through the region where an organic semiconductor thin film 71 is to be formed, and only the photosensitive thin film corresponding to the regions of the source electrode 68, the source electrode 69, and the drain electrode 70 is exposed. After the irradiation of about 30 seconds, the photosensitive thin film is developed. By this means, the photosensitive thin film 64 corresponding to the regions of the source electrode 68, the source electrode 69, and the drain electrode 70 is removed, and the liquid repellent film 65 in each of the regions is lifted off. In this manner, the liquid repellent films 65 are formed in the regions where the organic semiconductor thin films 71 are to be formed (FIG. 2C). In the same manner as that of the gate electrode 62, the source electrode 68, the source electrode 68, and the drain electrode 70 are formed using the conductive ink (FIG. 2D). At this stage, by selectively oxidizing the source electrode 68, the source electrode 68 (silver oxide electrode) and the source electrode 69 (silver electrode) are formed. In the same manner as described above, alkyl-fluoride-based silane coupling agent is spin-coated to form a liquid repellent film 67 (FIG. 2D). By removing the photosensitive film 64 by the use of the agent for the photosensitive film 64, the liquid repellent film 65 is lifted off, and the regions other than that where the organic semiconductor thin film 71 is to be formed, that is, only the regions 67 corresponding to the source electrode 68, the source electrode 69, and the drain electrode 70 develop the liquid repellency as shown in FIG. 2E. In this embodiment, acetone is used as the agent for the photosensitive thin film.
Next, in order to form a channel, the organic semiconductor thin film 71 is coated. The solution for the organic semiconductor thin film 71 is supplied to the channel under the nitrogen atmosphere by using a supply system provided with a nozzle position control mechanism, a solution ejection amount control mechanism, and a solution heating mechanism. In this embodiment, as described in the Non-Patent Document 5, the solution in which trichlorobenzene is used as solvent and pentacene of 0.1 wt % is diffused and then dissolved by heating it to 200° C. is used. This solution of about 3 microliters is supplied through a nozzle. In order to prevent the crystal growth in the solution due to the rapid temperature decrease of the solution, it is preferable to heat the substrate to about 170° C. The supplied solution is dried, and the organic semiconductor thin film 71 is formed on the upper surface as shown in FIG. 2F. In this manner, the organic semiconductor thin film 71 is formed in the lyophilic regions, and the CTFT having plasticity can be fabricated through the inexpensive method using the printing process and the coating process but not using lithography.
In this embodiment, polyimide is used for the substrate and PMMA is used for the insulating film. However, there is no problem if various types of plastic substrate such as polyvinyl are used for the substrate and polyimide, polyvinyl phenol, and others are used for the insulating film. Also, in the case where the plasticity is not required, by using an inorganic insulating film for the substrate, the advantage that the options of fabrication processes such as printing and coating are increased can be obtained. After forming a gate electrode, an insulating film is formed by Spin-On-Glass (SOG), and after a positive resist is spin-coated, the ultraviolet ray is irradiated from the rear surface by using a mercury lamp. Since the resist in the region other than that covered with the gate electrode is dissolved and removed by the development, the resist pattern has the same pattern as that of the gate electrode. In this state, alkyl-fluoride-based silane coupling agent is spin-coated. Subsequently, the alkyl-fluoride-based silane coupling agent is lifted off by removing the resist by using acetone and others, thereby forming a desired liquid repellent pattern. In this method, the heat treatment of about 450° C. is required for the baking of the SOG and the organic solvent is used for the removal of the resist. Therefore, this method cannot be used when an organic material is used for the substrate and others. This method has such advantages that the number of steps of the manufacturing process is reduced and the metal is not required for forming the liquid repellent film.
Fourth Embodiment
In this embodiment, a schematic example of a part of a manufacturing apparatus for successively performing the surface treatment of the electrodes for the CTFT in the present invention will be disclosed. FIG. 3 is a diagram showing a part of a manufacturing apparatus for successively performing the surface treatment of the electrodes for the CTFT according to the present invention. A chamber 40 is filled with, for example, dried nitrogen in order to maintain the atmosphere of the overall apparatus. However, it is not always necessary depending on the characteristics of organic semiconductor and electrode materials to be used. Source electrodes and drain electrodes for an n channel FET and a p channel FET are formed on the substrate 31, and a flexible substrate with plasticity is used for the substrate 31. The substrate 31 is conveyed by the rotation of substrate lead rollers 32 and 33 (roll-out side) and rolled up by the rotation of substrate lead rollers 32 and 33 (roll-up side). Manufacturing apparatus other than that for the electrode surface treatment can be provided in series in front of and at the back of the chamber 40. In the solution container 34, the substrate 31 is led by the substrate lead roller 33 and soaked into an oxidation-reduction solution 41. At this time, the surface treatment of the source electrodes of the n channel FET and the p channel FET is performed by a potentiostat 35 in the following manner. The potentiostat 35 has a reference electrode 36, a work electrode 37, an oxidation-reduction electrode 38, and an oxidation-reduction electrode 39. The reference electrode 36 inputs potential (reference potential) of the oxidation-reduction solution 41 to the potentiostat 35. The potentiostat 35 controls the potentials of the work electrode 37, the oxidation-reduction electrode 38, and the oxidation-reduction electrode 39 based on the reference potential. At this time, the current flowing in the oxidation-reduction electrode 38 and the oxidation-reduction electrode 39 is also controlled, but the circuit is configured so that the current flows in the work electrode 37 as a counter electrode and the current does not flow in the reference electrode 36. In this embodiment, the oxidation-reduction electrode 38 is kept at oxidation potential and is used to oxidize the source electrode surface of the n channel FET. Meanwhile, the oxidation-reduction electrode 39 is kept at reduction potential so as not to oxidize the surface of the silver electrode to be a source electrode of the p channel FET. By this means, the surface treatment of the source electrodes of the n channel FET and the p channel FET can be performed under the controlled conditions. Therefore, the substrate 31 can be continuously conveyed and the products with stable performance can be realized at low cost.
Patent Application
20080012009
