Claims
- 1. A filter device with a multiplication circuit for multiplying analog input voltage by predetermined multipliers, said multiplication circuit comprising:
- i) a plurality of capacitances, capacitance values of said capacitances correspond to multipliers to be multiplied by said multiplication circuit;
- ii) a data register for holding a multiplier corresponding to one of said multipliers to be multiplied; and
- iii) a plurality of switching means corresponding to said capacitances for connecting said analog input voltage to said capacitances, said switching means being controlled by said multiplier held in said data register.
- 2. A filter device claimed in claim 1, wherein said input of each of said capacitances are connected to said switching means and an output of each of said capacitances are connected to a common output.
- 3. A filter device as claimed in claim 1, wherein said data register has a SRAM which operates as holding means for digital data.
- 4. A filter device as claimed in claim 3, wherein said data register has a non-volatile EEPROM which operates as holding means of digital data.
- 5. A filter device as in claim 1, wherein said data register is provided with a shifting register for generating a parallel input from a serial input of a bit when said digital data is input.
- 6. A filter circuit being incorporated within a LSI and comprising:
- a plurality of multi-valued multiplication circuits, each multiplication circuit including:
- a plurality of capacitances being connected in parallel, and
- a plurality of switches, each corresponding to one of said capacitances,
- one of said switches being alternatively closed to couple said corresponding capacitance with an analog input voltage, said analog input voltage being weighted by said capacitance to which said analog input voltage is coupled;
- a digital data register for storing multipliers corresponding to said multiplication circuits, said multipliers being stored as digital data; and
- a controller for controlling which of said switches are opened and closed based on said multipliers stored in said digital data register.
- 7. A filter circuit as claimed in claim 6, said digital data register comprises a SRAM.
- 8. A filter circuit as claimed in claim 7, said digital data register further comprises an EEPROM.
- 9. A filter circuit as claimed in claim 7, said digital data register further comprises a shifting register for converting one set of serial data into datum of a plurality of bits.
- 10. A filter circuit as claimed in claim 8, further comprising a high voltage source outside said LSI for writing said multipliers into said EEPROM.
- 11. A filter circuit as claimed in claim 6, said digital data register comprising a plurality of elements respectively corresponding to said multiplication circuits, each of which holding one of said multipliers of said multiplication circuit corresponding to said element.
- 12. A filter circuit being incorporated within a LSI and comprising:
- a plurality of multi-valued multiplication circuits, each multiplication circuit including:
- a plurality of capacitances being connected in parallel, and
- a plurality of switches, each corresponding to one of said capacitances,
- one of said switches being alternatively closed to couple said corresponding capacitance with an analog input voltage, said analog input voltage being weighted by said capacitance to which said analog input voltage is coupled;
- a plurality of digital data registers for storing multipliers corresponding to said multiplication circuits, respectively, said multipliers being stored as digital data; and
- a controller for controlling which of said switches are opened and closed based on said multipliers stored in said digital data register.
- 13. A filter circuit as claimed in claim 12, wherein at least one of said digital data registers comprises a SRAM.
- 14. A filter circuit as claimed in claim 13, wherein at least one of said digital data registers further comprises an EEPROM.
- 15. A filter circuit as claimed in claim 14, further comprising a high voltage source outside said LSI for writing said multipliers into said EEPROM.
- 16. A filter circuit as claimed in claim 13, wherein at least one of said digital data registers further comprises a shifting register for converting one set of serial data into datum of a plurality of bits.
- 17. A filter circuit as claimed in claim 12, wherein said digital data registers each comprise a plurality of elements respectively corresponding to said multiplication circuits, each of which holding one of said multipliers of said multiplication circuit corresponding to said element.
Priority Claims (2)
Number |
Date |
Country |
Kind |
5-092450 |
Mar 1993 |
JPX |
|
5-107738 |
Apr 1993 |
JPX |
|
Parent Case Info
This is a division of application Ser. No. 08/216,826, filed Mar. 23, 1994, U.S. Pat. No. 5,502,664.
US Referenced Citations (10)
Non-Patent Literature Citations (1)
Entry |
Richard C. Dorf, "The Electrical Engineering Handbook", CRC Press Inc., 1993, pp. 674-691. |
Divisions (1)
|
Number |
Date |
Country |
Parent |
216826 |
Mar 1994 |
|