This application is based upon and claims the benefit of priority from prior Japanese Patent Application No. 2007-233228, filed Sep. 7, 2007, the entire contents of which are incorporated herein by reference.
1. Field of the Invention
The present invention relates to a filter frequency characteristic detection device and filter frequency characteristic testing device which inputs signals having offsets to a comparator.
2. Description of the Related Art
In an IC filter circuit, the filter frequency characteristic varies due to, e.g., manufacturing variations of elements. This requires adjustment to raise the accuracy of the filter frequency characteristic.
For example, an automatic filter adjusting device of patent reference 1 coarsely adjusts a filter by using an amplitude detector so that the amplitude level of a filter output signal attains a predetermined value. When a filter characteristic frequency f0 almost matches the target frequency, fine adjustment is done in this state by comparing phases. Patent reference 1 requires a circuit for detecting the amplitudes of filter input and output signals and a phase comparator for comparing phases. This makes the circuit of the automatic filter adjusting device large and complex.
In an automatic adjusting IC filter circuit of patent reference 2, during a period when a reference carrier to be used in a channel different from the channel signal of its own is being input to a filter, the frequency characteristic is moved in the direction of the frequency axis by gradually changing a control signal for adjusting the filter frequency characteristic. The attenuation amount of the reference carrier output from the filter is monitored during the control signal supply period. When the attenuation amount has reached a predetermined value, the value of the control signal at that time is held. In patent reference 2, automatic adjustment of the IC filter circuit is complex, and the circuit size is large.
[Patent Reference 1] Jpn. Pat. Appln. KOKAI Publication No. 2005-197975
[Patent Reference 2] Jpn. Pat. Appln. KOKAI Publication No. 4-180406
A filter frequency characteristic detection device according to a first aspect of the present invention comprising: a filter which receives a first signal and a second signal; a comparator which compares the first signal and the second signal which have passed through the filter; an offset adjusting circuit which gives an offset to each of the first signal and the second signal to be input to the comparator; a duty ratio detection circuit which detects, as a duty ratio, a change in an amplitude of the first signal and the second signal based on an output result from the comparator; and a frequency characteristic adjusting circuit which adjusts the frequency characteristic of the filter based on a detection result from the duty ratio detection circuit.
A filter frequency characteristic detection device according to a second aspect of the present invention comprising: a filter which receives a first signal and a second signal; a D/A converter which gives an offset to each of the first signal and the second signal to be input to the filter; a comparator which compares the first signal and the second signal which have passed through the filter; a duty ratio detection circuit which detects, as a duty ratio, a change in an amplitude of the first signal and the second signal based on an output result from the comparator; and a frequency characteristic adjusting circuit which adjusts the frequency characteristic of the filter based on a detection result from the duty ratio detection circuit.
A filter frequency characteristic testing device according to a third aspect of the present invention comprising: a comparator which compares the first signal and the second signal which have passed through an external filter; an offset adjusting circuit which gives an offset to each of the first signal and the second signal to be input to the comparator; and a duty ratio detection circuit which detects, as a duty ratio, a change in an amplitude of the first signal and the second signal based on an output result from the comparator.
The embodiments of the present invention will now be described with reference to the accompanying drawing. In the following description, the same reference numerals denote the same parts throughout the drawing.
In the first embodiment, to detect the frequency characteristic of, e.g., an analog IC filter, offsets are given to the difference signals at the input portion of a filter. A comparator compares the difference signals having the offsets so that a change in the signal amplitude is detected as a duty ratio.
As shown in
The filter 11 functions as, e.g., a band-pass filter (BPF), high-pass filter (HPF), or low-pass filter (LPF). The filter 11 receives difference signals VinP and VinN. The difference signals VinP and VinN are inverted signals which have the same frequency and amplitude and a phase difference of 180° (½ period).
The offset adjusting circuit 12 gives, by a variable voltage or the like, offsets to the difference signals VinP and VinN to be input to the filter 11. More specifically, the offset adjusting circuit 12 gives an offset −H to the difference signal VinP and an offset +H to the difference signal VinN. That is, the difference signals VinP and VinN are given offsets so that their waveform charts shift in the opposite directions.
The comparator 13 receives signals CinP and CinN which are given the offsets and passed through the filter 11. The comparator 13 compares the signals CinP and CinN and outputs a signal CMP of the comparison result.
The duty ratio detection circuit 14 detects the duty ratio of the signal CMP output from the comparator 13. The duty ratio indicates the digitized amplitude change of the signals CinP and CinN and is represented by a ratio (W/T) of a signal ON time W to one period T.
The frequency characteristic adjusting circuit 15 supplies a predetermined control signal to the filter 11 based on the result from the duty ratio detection circuit 14, thereby adjusting the frequency characteristic of the filter 11.
In this embodiment, the offset adjusting circuit 12 need not always be arranged separately from the filter 11. Instead, the filter 11 itself may have the function of giving an offset.
The outline of detection and adjustment of the filter frequency characteristic using the filter frequency characteristic detection device 10 according to this embodiment will be described with reference to
First, the difference signals VinP and VinN that are inverted signals are input to the filter 11. The offset adjusting circuit 12 gives offsets to the difference signals VinP and VinN to be input to the filter 11. The difference signals VinP and VinN having the offsets are input to the comparator 13 via the filter 11. The comparator 13 compares the input signals CinP and CinN having the offsets and outputs the comparison result. The signal CMP output from the comparator 13 is input to the duty ratio detection circuit 14. The duty ratio detection circuit 14 detects a digital signal which represents a change in the amplitude of the signals CinP and CinN as a change in the duty ratio. The change in the signal amplitude is calculated from the duty ratio. Based on the detection result from the duty ratio detection circuit 14, the frequency characteristic adjusting circuit 15 performs adjustment to raise the accuracy of the frequency characteristic of the filter 11 so that the amplitude level reaches a predetermined value.
As shown in
As shown in
As shown in
As shown in
VP and VN are given by
VP=A
0 sin(ωt) (1)
VN=−A
0 sin(ωt) (2)
When the offset H is given to VP and VN, we obtain
VP=A
0 sin(ωt)−H (3)
VN=−(A0 sin(ωt)−H) (4)
The intersection of VP and VN is obtained. The transpositions of the values of VP and VN are represented by binary values “0” and “1”, and the duty ratio of “0” and “1” is obtained.
The intersection of VP and VN is always the median (A=0). For a point ωt1,
0=A0 sin(ωt1)−H
∴ sin(ωt1)=H/A
For points ωt2 and ωt2,
0=A0 sin(ωt2)−H=A0 sin(π−ωt1)−H
0=A0 sin(ωt3)−H=A0 sin(2π+ωt1)−H
Then, we obtain
ωt1=arcsin(H/A0) (5)
ωt2=π−arcsin(H/A0) (6)
ωt3=2π+arcsin(H/A0) (7)
When duty ratios are obtained using equations (5) and (6), we obtain
duty ratio=(ωt2−ωt1)/2π
duty ratio={π−2 arcsin(H/A0)}/2π (8)
As is apparent from equation (8), when the duty ratio and offset H are known, the amplitude A0 can be derived. It also indicates that the duty ratio does not depend on the frequency ω.
As described above, to detect the filter frequency characteristic, first, the comparator 13 detects the superimposition of difference signals. The duty ratio is detected based on the signal CMP output from the comparator 13. The signal amplitude can be obtained from the relationship shown in
For example, when the duty ratio is 46%, and the offset given to the difference signals is 0.2, as shown in
As described above, in this embodiment, the relationship between the amplitude and the duty ratio is known, as shown in
According to the first embodiment, the offset adjusting circuit 12 gives offsets to the difference signals VinP and VinN to be input to the filter 11. The signals are input to the comparator 13. The change in the signal amplitude is measured as the change in the duty ratio of the output result (1/0 digital value) of the comparator 13. Based on the duty ratio, the frequency characteristic (attenuation amount) of the filter 11 is calculated, and the filter is adjusted to obtain a desired value. In this embodiment, the signal amplitude change amount can be measured not as an analog signal but as a 1/0 digital value. It is therefore possible to easily detect the filter frequency characteristic. Additionally, since the device includes only an offset adjusting means and a simple comparator, no complex circuit arrangement is necessary.
The offset adjusting circuit 12 can be arranged before or after the filter 11 in accordance with, e.g., the filter performance or system arrangement. In the first embodiment, the offset adjusting circuit 12 is arranged at the input portion of the filter 11. In the second embodiment, however, an offset adjusting circuit 12 is arranged at the output portion of a filter 11. A description of the same points as in the first embodiments will not be repeated.
As shown in
In this embodiment, the offset adjusting circuit 12 need not always be arranged separately from the filter 11. Instead, the filter 11 itself or a comparator 13 itself may have the function of giving an offset.
According to the second embodiment, it is possible to obtain the same effects as in the first embodiment. Additionally, in the second embodiment, the offsets are given to the difference signals VinP and VinN that have passed through the filter 11. For this reason, the device is also applicable to a filter such as a band-pass filter or high-pass filter that passes no DC voltage, unlike the arrangement which gives offsets to the difference signals VinP and VinN to be input to the filter 11.
In the third embodiment, a D/A converter (DAC: digital-to-analog converter) at the preceding stage of a filter gives offsets to difference signals. A description of the same points as in the first embodiments will not be repeated.
As shown in
The D/A converter 16 converts a digital input signal into an analog signal almost proportional to the digital signal. The D/A converter 16 receives a digital code and outputs signals DACP and DACN which are difference signals having offsets.
In this embodiment, since the D/A converter 16 itself has an offset adjusting function, an offset adjusting circuit 12 may be omitted.
According to the third embodiment, it is possible to obtain the same effects as in the first embodiment. Additionally, in the third embodiment, since the offsets are given to the signals output from the D/A converter 16, all input and output signals can be measured as 1/0 digital values. This obviates analog signal processing and further facilitates detection and adjustment of the filter frequency characteristic.
In the fourth embodiment, the offset adjusting circuit 12, duty ratio detection circuit 14, and frequency characteristic adjusting circuit 15 of the third embodiment are integrated into one controller. A description of the same points as in the third embodiments will not be repeated.
As shown in
The controller 17 detects the duty ratio of a signal CMP output from a comparator 13. The controller 17 supplies a predetermined control signal to a filter 11 based on the result from the duty ratio detection circuit 14, thereby adjusting the frequency characteristic of the filter 11. The controller 17 generates a code which causes a D/A converter 16 to output difference signals DACP and DACN as difference signals having offsets.
The controller 17 may have only the functions of the offset adjusting circuit 12 and frequency characteristic adjusting circuit 15. Independently of the controller 17, the duty ratio detection circuit 14 may be provided at the output portion of the comparator 13.
According to the fourth embodiment, it is possible to obtain the same effects as in the third embodiment. Additionally, in the fourth embodiment, the offset adjusting circuit 12, duty ratio detection circuit 14, and frequency characteristic adjusting circuit 15 of the third embodiment are integrated into one controller 17. This reduces the size of a filter frequency characteristic detection device 10, facilitates design, and simplify the circuit arrangement.
The fifth embodiment is an example of a device for testing a filter frequency characteristic. The device gives offsets to difference signals and detects a duty ratio, as in the above-described first to fourth embodiments.
As shown in
The filter frequency characteristic testing device 20 shown in
As shown in
A filter frequency characteristic testing method using the filter frequency characteristic testing device 20 of this embodiment will be described with reference to
The filter 11 in the chip 30 receives difference signals VinP and VinN and outputs the difference signals VoutP and VoutN. To test the frequency characteristic of the filter 11, the filter frequency characteristic testing device 20 is used. More specifically, the terminals 21 and 22 of the filter frequency characteristic testing device 20 are connected to the terminals 31 and 32 of the chip 30 to input the signals VoutP and VoutN output from the filter 11 to the comparator 13 via the capacitors C1 and C2. The offset adjusting circuit 12 gives offsets to input signals CinP and CinN to the comparator 13. The comparator 13 compares the input signals CinP and CinN having the offsets and outputs the comparison result. The signal CMP output from the comparator 13 is input to the duty ratio detection circuit 14. The duty ratio detection circuit 14 detects a digital signal which represents a change in the amplitude of the signals CinP and CinN as a change in the duty ratio. A change in the signal amplitude is calculated from the duty ratio. The frequency characteristic of the filter 11 is tested in this way.
To adjust the frequency characteristic based on the test result of the filter 11, the terminal 23 of the filter frequency characteristic testing device 20 is connected to the terminal 33 of the chip 30. Based on the detection result from the duty ratio detection circuit 14, the frequency characteristic adjusting circuit 15 performs adjustment to raise the accuracy of the frequency characteristic of the filter 11 so that the amplitude level attains a predetermined value.
According to the fifth embodiment, the offset adjusting circuit 12 gives offsets to the difference signals VinP and VinN to be input to the filter 11, and the signals are input to the comparator 13, as in the first embodiment. The change in the signal amplitude is measured as the change in the duty ratio of the output result (1/0 digital value) of the comparator 13. Hence, in this embodiment, the signal amplitude change amount can be measured not as an analog signal but as a 1/0 digital value. It is therefore possible to easily test the filter frequency characteristic. Additionally, since the device includes only an offset adjusting means and a simple comparator, no complex circuit arrangement is necessary.
Use of the filter frequency characteristic testing device 20 facilitates test of the frequency characteristic of the existing filter 11. In addition, when the power supply voltage of the filter frequency characteristic testing device 20 is set to be higher than that of the chip 30 having the filter 11, the adjustment range widens, and measurement can become easier.
Additional advantages and modifications will readily occur to those skilled in the art. Therefore, the invention in its broader aspects is not limited to the specific details and representative embodiments shown and described herein. Accordingly, various modifications may be made without departing from the spirit or scope of the general inventive concept as defined by the appended claims and their equivalents.
Number | Date | Country | Kind |
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2007-233228 | Sep 2007 | JP | national |