The invention relates to filter tuning.
The IEEE 802.15.4 standard and the ZigBee™ standard provide communication protocols for relaxed throughput, low power consumption wireless communication applications, for example, ad-hoc wireless networking applications. Different kinds of physical layer components can be used provide the functionality specified by these higher layer protocols. Various integrated circuit designs have been proposed to implement these physical layer components that include radio frequency (RF) components and other analog and digital circuitry. For example, one component that facilitates reliable RF communication in a compact device is an on-chip polyphase bandpass filter.
In one aspect, in general, the invention features an apparatus including a first processing component having an input port and an output port, a second processing component having an input port and an output port, and a reconfigurable connection network coupled to the ports. The reconfigurable connection network has at least two connection states including a first state in which the first and second processing components are connected to form at least part of a polyphase filter, and a second state in which the first and second processing components are connected to form at least part of an oscillator.
In another aspect, in general, the invention features a method, and corresponding system, for calibrating a filter. The method includes configuring a connection network coupled to input and output ports of first and second processing components into a first state in which the first and second processing components are connected to form at least part of an oscillator; and reconfiguring the connection network into a second state in which the first and second processing components are connected to form at least part of a polyphase filter.
Aspects of the invention may include one or more of the following features.
Tuning circuitry is configured to switch between the connection states, measure an operating characteristic of the oscillator, and tune an operating characteristic of the polyphase filter based at least in part on the measured operating characteristic of the oscillator.
The operating characteristic of the oscillator includes an oscillation frequency of the oscillator.
The operating characteristic of the polyphase filter includes phase shifts imparted by the first and second processing components to a signal at an operating frequency.
Tuning the operating characteristic of the polyphase filter includes tuning the phase shifts based on a relationship between the oscillation frequency and the operating frequency.
Tuning the operating characteristic of the polyphase filter includes tuning tunable elements in the first and second processing components. The tunable elements can include tunable capacitors, such as unit capacitors each having a capacitance that is a multiple of a unit capacitance value.
In the first state, the input port of the first processing component receives a first input signal and the input port of the second processing component receives a second input signal, and a first connection couples the output port of the first processing component to the input port of the second processing component and a second connection couples the output port of the second processing component to the input port of the first processing component.
The first input signal includes an in-phase signal derived from a received signal modulated by a first sinusoidal signal, and the second input signal includes a quadrature-phase signal derived from the received signal modulated by a second sinusoidal signal that has a 90 degree phase shift relative to the first sinusoidal signal.
In the first state, the first connection includes a 180 degree phase shift relative to the second connection.
The apparatus further includes a third processing component having an input port and an output port, and a fourth processing component having an input port and an output port. In the first state, ports of the third and fourth processing component are connected to form at least part of the polyphase filter. In the second state, the first, second, third, and fourth processing component are connected to form at least part of the oscillator.
In the first state, the input port of the third processing component receives a signal from the output port of the first processing component and the input port of the fourth processing component receives a signal from the output port of the second processing component, and a third connection couples the output port of the third processing component to the input port of the fourth processing component and a fourth connection couples the output port of the fourth processing component to the input port of the third processing component.
The first and second processing components each include a filter.
The first and second processing components each include a low-pass filter.
The input ports and output ports of the first and second processing components couple differential signals.
The apparatus further includes at least a first gain element in the oscillator. The gain element can include a limiter.
The apparatus further includes a second gain element in the oscillator, where the position of the second gain element with respect to the second processing component is symmetric with the position of the first gain element with respect to the first processing component.
The apparatus further includes a phase element in the oscillator that provides negative feedback for low frequencies.
Aspects of the invention may include one or more of the following advantages.
A reconfigurable connection network enables and oscillation approach for tuning characteristics of a polyphase filter. Measuring an operating characteristic of an oscillator formed from components of the polyphase filter provides information that can be used to accurately tune an operating characteristic of the polyphase filter. Various features of the filter components and the connection network contribute to the efficiency and accuracy of the calibration process. For example, using unit capacitors which can be tuned together as tunable elements throughout various components enables both the filter bandwidth and the center frequency of the polyphase filter to be tuned together. Maintaining symmetry in the placement of components in the in-phase and quadrature-phase portions of the reconfigurable connection network contributes to the accuracy of the tuning procedure.
Other features and advantages of the invention will become apparent from the following description, and from the claims.
1 Overview
Referring to
The IC 100 implements a radio transceiver containing analog circuitry 101 including a super heterodyne receiver 103, other frequency synthesis and timing circuitry, and digital circuitry 105 including baseband (BB) signal processing circuitry 107 and other data processing control circuitry.
Referring to
Referring again to
The digital circuitry 105 includes a microprocessor 120 that includes a memory controller to access a flash memory module 121 (e.g., for storing executable software) and a RAM memory module 123 (e.g., for storing data). The microprocessor 120 includes a serial interface 113 that can be used to test and characterize various functions of the IC 100. Also, the serial interface 113 can be used to load executable software into the flash memory module 121 either directly, or optionally, by downloading a boot program into the RAM memory module 123 which the microprocessor 120 uses to first download software blocks into the RAM memory module 123 and then copy the blocks into the flash memory module 121.
The digital circuitry 105 also includes a lower MAC module 118 that interfaces with the microprocessor 120 sending and receiving packet data, and with the BB signal processing circuitry 107 sending and receiving packets with MAC layer information (called “frames”). The lower MAC module 118 handles various MAC layer functions including, for example, cyclic redundancy check (CRC) codes, packet acknowledgements, and backoff timing.
Referring again to
The BB signal processing circuitry 107 includes a BB receiver 116 and a BB transmitter 122. The digital signal processing performed by the BB receiver 116 and the BB transmitter 122 can be implemented in software, hardware, or a combination of software and hardware.
The BB receiver 116 performs coherent demodulation using an LO signal at the IF frequency from a phase-locked loop (PLL). The preamble of the demodulated signal is used to achieve frequency, phase and symbol timing lock with the received signal. The BB receiver 116 uses dithering and severe quantization to determine a phase error from a correlation signal for adjusting the PLL. The BB receiver 116 recovers the DSSS modulated data in the BB signal by sampling the bits or “chips” of a symbol's spreading sequence and despreading to recover the data bits.
The BB transmitter 122 directly modulates the output of the frequency synthesizer 108 with the information in a frame. The resulting frequency synthesizer signal is amplified by a power amplifier 124 and coupled over the interface 109 to the RF antenna 111. The BB transmitter 122 includes a spreader for processing the frame bits provided by the lower MAC module 118. The spreader converts a sequence of frame bits at a bit rate of Rb (e.g., 250 kbps for ZigBee™) into a DSSS modulated sequence of chips at a chip rate of Rc (e.g., 2 Mchips/sec for ZigBee™). This chip sequence is used to modulate the frequency synthesizer 2.4 GHz carrier wave.
An encryption module 125 is coupled to the microprocessor 120 via a register block interface. The encryption module 125 can implement, for example, the Advanced Encryption Standard (AES). The encryption module 125 provides hardware acceleration for encryption.
The IC 100 includes other analog and digital timing and control circuitry 126 that includes, for example, an interrupt controller, IC power management and internal oscillators.
2 Polyphase Filter
The IC 100 performs an initialization procedure (e.g., when the IC 100 is powered up, or initially after fabrication) to set various characteristics of the IC 100, including a tuning procedure for the polyphase band-pass filter 110. The IC 100 uses an oscillation approach to tune characteristics of the polyphase filter 110 including, for example, its bandwidth and center frequency. The oscillation approach includes reconfiguring processing components of the polyphase filter 110 to form an oscillator whose oscillation frequency can be used to tune the filter 110.
Referring to
Tuning circuitry 411 is able to reconfigure the connection network 410 to switch between the connection state. The tuning circuitry 411 is also able to measure an operating characteristic of the oscillator, such as its oscillation frequency. The tuning circuitry 411 uses this measurement to determine how to tune one or more operating characteristics of the polyphase filter 110. For example, the bandwidth and center frequency of the polyphase filter 110 are determined by values of tunable elements of the processing components 402 and 404. The center frequency may need to be adjusted to precisely tune the phase shifts imparted by the processing components to a signal at an operating frequency. These phase shifts can be tuned by adjusting the tunable elements in the processing components 402 and 404. The tuning circuitry 411 can be implemented, for example, by the microprocessor 120 using software control of the tunable elements, and software control of switches (e.g., transistors) to form and/or break connections in the connection network 410.
In some implementations, the polyphase filter 110 uses “unit capacitors” as tunable elements throughout various components which can be tuned together such that each capacitance in the polyphase filter 110 is a multiple of a unit capacitance value C(x), where x represents a control input value that tunes the capacitance value C(x). These unit capacitors enables the circuitry of the polyphase filter 110 to be designed such that the ratio of filter's bandwidth to the filter's center frequency remains constant as the value of C(x) is tuned (e.g., when both the bandwidth and center frequency are proportional to the unit capacitance). Thus, with appropriate choice of this ratio, both the filter bandwidth and the center frequency can be tuned to desired values by tuning the unit capacitance value C(x), as described in more detail below.
2.1 Polyphase Filter Operation
As described above, the polyphase filter is used to extract an IF signal that has been demodulated from a received RF signal for a desired channel.
For example,
Referring to
Referring to
A complex signal x(t) can be represented by two real signals, an in-phase signal xI(t) and a quadrature-phase signal xQ(t), according to x(t)=xI(t)+jxQ(t). For example, in the analysis above, the complex exponential can be represented as:
exp(j2πft)=cos(2πft)+j sin(2πft).
The receiver 103 multiplies the incoming RF signal by this complex exponential using the I mixer 104 to provide the real part of the product xI(t)=xRF(t) cos(2πft), and the Q mixer 106 to provide the imaginary part of the product xQ(t)=xRF(t) sin(2πft). These two real signals xI(t) and xQ(t) are the inputs to the polyphase band-pass filter 110.
Before turning to an exemplary implementation of a polyphase band-pass filter that receives two real input signals,
Therefore, when A(jω) corresponds to the low-pass frequency response 304 (
where ωc=2πfc (corresponding to a Laplace transform with a single pole on the negative real axis), and B(jω) corresponds to a complex gain B(jω)=−jωIF/ωc, then the frequency response H(jω) of the circuit 300 is
This frequency response H(jω) corresponds to a shift in the pole of the symmetric low-pass frequency response HLP(jω) resulting in an asymmetric band-pass frequency response similar to the frequency response 216.
The resulting effect of the polyphase filter 400 on the Fourier transforms XI(jω) and XQ(jω) of the input signals xI(t) and xQ(t), respectively, is given by
YI(jω)=HLP(jω)XI(jω)−ωIFHLP(jω)YQ(jω),
YQ(jω)=HLP(jω)XQ(jω)+ωIFHLP(jω)YI(jω).
These two equations can be used to derive the following equation:
YI(jω)+jYQ(jω)=HLP(jω−jωIF)(XI(jω)+jXQ(jω)),
which shows the equivalence between the single-input “complex” example above, and the present two-input “real” example.
A variety of single stage or multi-stage filter designs can be used to implement a polyphase filter 110. The filter 400 shown in
and the bandwidth
of the polyphase filter. Since, as described above, the ratio of the bandwidth to the center frequency remains constant as the value of C(x) is tuned, the control input x can be used to tune both the bandwidth and center frequency once their ratio has been appropriately set (e.g., using trim resistor values in the circuit).
Other circuit designs can be used to implement the polyphase filter. For example, the filter can have any number of stages. The filter can have any type of pass-band shape using different filter types such as Chebychev, Butterworth, or Bessel filters. The filter can use “single-ended” signaling, as in the circuit 510, where signals are represented by a voltage on a single wire. Alternatively, the filter can use “double-ended” signaling, where differential signals are represented by a voltage difference between two wires. With double-ended signaling, the inverters 520 can be implemented by simply swapping the wires.
2.2 Filter Reconfiguration
Oscillation will occur in the oscillator circuit 420 when the following conditions on the round-trip gain |HRT(jω)| and round-trip phase HRT(jω) are met:
|HRT(jω)|=1,
HRT(jω)=2πn,
where n is an integer. The limiters 422 and 424 contribute to achieving this condition by providing gain for small input signals. This gain encourages growth of a large signal from a small signal (e.g., noise) oscillating at a resonant frequency of the circuit 420.
The oscillation frequency at which these two oscillation conditions are satisfied is a function of the cutoff frequency fc of the low-pass filters 402 and 404 and of the type of the filters (e.g., Butterworth). The relationship between the oscillation frequency and bandwidth Δf=2fc of the polyphase filter 400 is therefore predetermined and can be used in determining how to tune the polyphase filter 400 based on the oscillation frequency measured by the tuning circuitry 411.
Optionally, the circuit 420 can include a phase element 426 to shift the oscillation frequency. For example, the phase element 426 can be an inverter (contributing 180° to the round-trip phase) which can be implemented in a way that does not significantly affect symmetry between the effects of the I filter 402 and effects of the Q filter 404 on the circuit 420.
It is to be understood that the foregoing description is intended to illustrate and not to limit the scope of the invention, which is defined by the scope of the appended claims. Other embodiments are within the scope of the following claims.