Filtering apparatus

Abstract

A data buffer stores both latest and past output data of respective stages. A coefficient buffer stores all coefficients required for each filter processing operation. In first filter processing, a filtering apparatus applies a product-sum operation to input data based on required data read from the data buffer and coefficient buffer. In succeeding filter processing, the filtering apparatus applies a product-sum operation to an output obtained in immediately preceding processing based on required data read from the data buffer and coefficient buffer.

Description

BRIEF DESCRIPTION OF THE DRAWINGS

The accompanying drawings, which are incorporated in and constitute a part of the specification, illustrate an embodiment of the invention and, together with the description, serve to explain the principles of the invention, in which:

FIG. 1 illustrates a filtering apparatus according an embodiment of the present invention;

FIG. 2 illustrates a circuit arrangement for a filtering apparatus according to an embodiment of the present invention;

FIG. 3 illustrates a filtering apparatus according an embodiment of the present invention; and

FIG. 4 illustrates a filtering apparatus according an embodiment of the present invention.

Claims

1. A filtering apparatus successively performing multistage filter processing, comprising: a single-stage filtering section configured to perform a product-sum operation including multiplication operations and addition operations based on variable coefficients set for an input signal, a delay input signal, and a delay output signal;a coefficient storage section configured to store coefficients used for the filter processing for a plurality of stages; andan output storage section configured to store a plurality of outputs produced by the filtering section,

2. The filtering apparatus according to claim 1, wherein the filtering section receives an input signal, a 1-clock delayed input signal, a 2-clock delayed input signal, a 1-clock delayed output signal, and a 2-clock delayed output signal from the output storage section, wherein

3. The filtering apparatus according to claim 1, wherein each of the coefficient storage section and the output storage section is formed from a barrel shifter that is capable of successively supplying a set of outputs to the filtering section.