Unless otherwise indicated herein, the approaches described in this section are not admitted to be prior art by inclusion in this section.
Virtualization allows the abstraction and pooling of hardware resources to support virtual machines in a virtualized computing environment, such as a Software-Defined Datacenter (SDDC). For example, through server virtualization, virtual machines running different operating systems may be supported by the same physical machine (e.g., referred to as a “host”). Each virtual machine is generally provisioned with virtual resources to run an operating system and applications. The virtual resources may include central processing unit (CPU) resources, memory resources, storage resources, network resources, etc. Virtualization software (e.g., hypervisor) running on the physical machine is generally used to maintain a mapping between the virtual resources allocated to each virtual machine and the underlying physical resources of the host.
In order to meet new requirements of granularity and scalability in the virtualized computing environment, a firewall engine is deployed on each hypervisor to protect the virtual machines. A central firewall controller is used to control all firewall engines and distribute firewall rules to them based on any suitable security policy. However, conventional firewall rules may not be optimal to the performance of the hosts or a network via which the hosts communicate.
In the following detailed description, reference is made to the accompanying drawings, which form a part hereof. In the drawings, similar symbols typically identify similar components, unless context dictates otherwise. The illustrative embodiments described in the detailed description, drawings, and claims are not meant to be limiting. Other embodiments may be utilized, and other changes may be made, without departing from the spirit or scope of the subject matter presented here. It will be readily understood that the aspects of the present disclosure, as generally described herein, and illustrated in the drawings, can be arranged, substituted, combined, and designed in a wide variety of different configurations, all of which are explicitly contemplated herein.
The challenges of implementing a firewall, such as a distributed firewall, will be described in more detail with reference to
Virtualized computing environment 100 includes multiple hosts (also known as “computing devices”, “host computers”, “host devices”, “physical servers”, “server systems”, etc.), such as Host-A 110A and Host-B 110B. Each host 110A/110B executes virtualization software (e.g., hypervisor 111A/111B) and includes hardware 112A/112B to support various virtual machines. For example, Host-A 110A supports “VM1” 121, “VM2” 122 and “VM3” 123, while Host-B 110B supports “VM4” 124 and “VM5” 125. Although some hosts and virtual machines are shown for simplicity, there may be any suitable number of hosts, each supporting tens or hundreds of virtual machines in practice.
Hypervisor 111A/111B maintains a mapping between underlying hardware 112A/112B and virtual resources allocated to the virtual machines. For example, hardware 112A/112B includes one or more physical network interface controllers (PNICs) 114A/114B to access physical network 102. Hardware 112A/112B also includes other physical resources (not shown for simplicity), such as Central Processing Unit (CPU), memory (e.g., random access memory), storage disks (e.g., solid state drive, hard disk drive), etc.
“VM1” 121 to “VM5” 125 each represent a software implementation of a physical machine. Although examples of the present disclosure refer to “virtual machines”, it should be understood that virtual machines running within a virtualized computing environment are merely one example of “virtualized computing instance” or “workload” that represents an addressable data compute node (DCN), an isolated user space instance, etc. In practice, any suitable technologies aside from hardware virtualization may be used to provide isolated user space instances. For example, other workloads may include containers (e.g., running on top of a host operating system without the need for a hypervisor or separate operating system), physical hosts, client computers, virtual private servers, etc. The virtual machines may also be complete computation environments, containing virtual equivalents of the hardware and system software components of a physical system.
To support guest operating systems and run applications, virtual resources are allocated to the virtual machines. For example, corresponding to hardware 112A/112B, the virtual resources may include virtual CPU, virtual memory, virtual disk, virtual network interface controller (VNIC) to provide network access, etc. Hardware resources may be emulated using virtual machine monitors (VMMs) implemented by hypervisor 111A/111B. For example, at Host-A 110A, “VNIC1” 131A, “VNIC2” 132A and “VNIC3” 133A are emulated by respective VMMs 134A, 135A and 136A. At Host-B 110B, “VNIC4” 131B and “VNIC5” 132B are emulated by respective VMMs 133B, 134B. In practice, the VMMs may be considered as components that are part of respective virtual machines, or alternatively, separated from the virtual machines. Also, one virtual machine may have access to multiple VNICs.
Hypervisor 111A/111B implements virtual switch 140A/140B to handle both egress traffic (i.e., outgoing or outbound) and ingress traffic (i.e., incoming or inbound traffic). Virtual switch 140A/140B is generally a logical collection of virtual ports and maintains forwarding information of VNIC addresses to forward packets to and from the VNICs. Each VNIC may be logically associated with a virtual port (not shown for simplicity) maintained by virtual switch 140A/140B to facilitate packet forwarding. As used herein, the term “packets” may refer generally to a group of bits that can be transported together from a source to a destination, such as “segments,” “frames,” “messages,” “datagrams,” etc.
Virtual switch 140A/140B is connected to PNIC 114A/114B (e.g., via a NIC driver) to send egress packets to, and receive ingress packets, from physical network 102. For example, at source Host-B 110B, virtual switch 140B handles egress packets originating from “VM4” 124 and “VM5” 125. Egress packets destined for Host-A 110A (or any external entity) are forwarded by virtual switch 140B to physical network 102 via PNIC 114B. When received by the destination, those packets are taken as ingress packets from the perspective of Host-A 110A. Virtual switch 140A receives the ingress packets via PNIC 114A from physical network 102 for forwarding to “VM1” 121 (via “VNIC1” 131A), “VM2” 122 (via “VNIC2” 132A) or “VM3” 123 (via “VNIC3” 133A).
To protect host 110A/110B against security threats caused by unwanted packets, a firewall is implemented to filter packets to and from the virtual machines. More particularly, a distributed firewall is implemented using multiple distributed (or local) firewall engines 150A and 150B at respective Host-A 110A and Host-B 110B. For example, at Host-A 110A, hypervisor 111A implements firewall engine 150A to filter packets for “VM1” 121, “VM2” 122 and “VM3” 123. At Host-B 110B, hypervisor 111B implements firewall engine 150B to filter packets for “VM4” 124 and “VM5” 125. Firewall engines 150A and 150B are configurable by centralized management entity in the form of firewall controller 160. In particular, firewall controller 160 sends control messages to firewall engines 150A and 150B to apply firewall rules (e.g., configured based on inputs from users).
Conventionally, firewall engine 150A/150B is configured to enforce VNIC-level firewall rules 152A/152B. As used herein, the term “VNIC-level firewall rules” may refer generally to a set of firewall rules that are applicable to packets detected at or received via a particular virtual machine's VNIC (or associated virtual port maintained by corresponding virtual switch). For example, at Host-A 110A, three sets of VNIC-level firewall rules 152A may be applied at respective “VNIC1” 131A, “VNIC2” 132A and “VNIC3” 133A. Upon detecting egress packets sent by “VM1” 121 at “VNIC1” 131A, firewall engine 150A enforces VNIC-level firewall rules 152A associated with “VNIC1” 131A to allow or drop the egress packets. If dropped, this prevents the egress packets from being forwarded to virtual switch 140A and then to PNIC 114A.
However, for ingress packets that arrive at Host-A 110A, applying VNIC-level firewall rules 152A may not be optimal for host performance. Using “VM1” 121 as an example again, consider source “VM4” 124 at Host-B 110B sending packets to destination “VM1” 121 at Host-A 110A via physical network 102. See 170 in
Although “VM1” 121 is protected from unwanted ingress packets, the application of VNIC-level firewall rules 152A as explained above is inefficient and wastes valuable computing resources of Host-A 110A. In particular, although the ingress packets are eventually dropped, computing resources are used by virtual switch 140A to route the ingress packets to “VNIC1” 131A before VNIC-level firewall rules 152A are applied. This creates significant burden on virtual switch 140A when there is a large number of ingress packets.
PNIC-Level Firewall Rules
According to a first example of the present disclosure, instead of using VNIC-level firewall rules 152A, PNIC-level firewall rules 154A are applied to reduce processing overhead and improve host performance. As used herein, the term “PNIC-level firewall rules” may refer generally to a set of firewall rules that are applicable to packets detected at or received via a particular PNIC. For example in
Using “VM2” 122 in
In more detail,
At 210 in
At 220 in
At 230 in
At 240 and 250 in
Although not shown in
Firewall Rule Aggregation
Some example firewall rules will be explained using
In general, a firewall rule is specified in terms of multiple packet fields or data tuples, such as source Internet Protocol (IP) address, source port number (PN), destination IP address, destination port number and protocol. Any suitable protocol may be specified, such as Transmission Control Protocol (TCP), User Datagram Protocol (UDP), etc. An action is also specified, i.e., “PASS” to allow packets to pass through and “DROP” to block packets from passing through by dropping them. When applying a rule, the specified fields will be matched against corresponding fields of each ingress packet, and the action performed if there is a match.
In one example, “VM1” 121 and “VM2” 122 are configured to provide Hypertext Transfer Protocol (HTTP) services, while “VM3” 123 to provide HTTP Secure (HTTPS) services. In first set 310, rule 312 is applicable at “VNIC1” 131A to allow all ingress packets with destination IP address=IP-VM1 (i.e., IP address of “VM1” 121), destination PN=80 for HTTP and protocol=TCP. Otherwise, rule 314 will be enforced to drop the ingress packets. Similarly, in second set 320, rule 322 is applicable at “VNIC2” 132A to allow all ingress packets with destination IP address=IP-VM1 (i.e., IP address of “VM1” 121), destination PN=80 for HTTP and protocol=TCP. Otherwise, rule 324 is applicable. In third set 330, rule 332 is applicable at “VNIC3” 133A to allow ingress packets with destination IP address=IP-VM3 (i.e., IP address of “VM3” 123), destination PN=443 for HTTPS and protocol=TCP. Otherwise, rule 334 is applicable.
As explained using
Similarly, PNIC-level firewall rule 354 is generated based on corresponding VNIC-level firewall rules 332 (which cannot be synthesized with another rule) to allow ingress packets with destination IP address=IP-VM3, destination PN=443 and protocol=TCP to pass through. Based on VNIC-level firewall rules 314, 324 and 334, PNIC-level firewall rule 356 is generated to drop all other ingress packets that do not meet the requirements of either PNIC-level firewall rule 352 or 354.
It should be understood that generation operation (see 340 in
It should be understood that block 210 in
For example, the IP CIDR block 192.168.100.0/24 specifies a routing prefix 192.168.100.0 and a subnet mask 255.255.255.0 (i.e., 24 leading 1-bits). In other words, the notation 192.168.100.0/24 represents a subnet that includes a range of address from 192.168.100.0 through 192.168.100.255. In some examples, an individual IP address can be regarded as a /32 CIDR block (i.e., having 1-bits for the entire subnet mask). IP-VM1 and IP-VM2 may each be an IP CIDR block, in which case operation 340 in
Destination-Associated Firewall Rules
Conventionally, firewall rules are configured for application at the destination host, which may not be ideal for host and network performance. As explained using
According to a second example of the present disclosure, host and network performance may be improved by configuring source Host-B 110B to drop egress packets that will be blocked by destination Host-A 110A. In more detail,
In the example in
For example in
In more detail,
At 510 in
At 520 in
At 530 in
At 540 and 550 in
The number of destination-associated firewall rules 410 applicable at source Host-B 110B may be managed using any suitable approach. For example, firewall controller 160 or firewall engine 140B may assign an active period to each destination-associated firewall rule 410. In this case, at 570 and 580 in
Using example process 500 in
Example Destination-Associated Firewall Rules
As will be discussed using
(a) VNIC-Level Application
In more detail, at 610 in
In the example in
At 620 in
In the example in
In the above examples, rules 612, 622 in
(b) PNIC-Level Application
In particular, rule 632 in
Reactive and Proactive Modes
The generation of destination-associated firewall rules 410 according to blocks 510 to 530 may be performed according to a (a) reactive mode or (b) proactive mode that will be discussed below. In more detail,
At 710 in
(a) Reactive Mode
According to the reactive mode, a statistics-based approach is used to trigger the generation of destination-associated firewall rules 410. For example in
At 730 and 740, in response to determination that the statistics (X) exceeds a threshold, firewall engine 150A sends a report message to firewall controller 160 identifying (source IP address=IP-VM5, firewall rule applied, X). The aim is to trigger firewall controller 160 to stop source Host-B 110B from sending those unwanted packets.
At 715 and 740 in
At 760 in
(b) Proactive Mode
In contrast to the reactive mode, the proactive mode does not require any triggers or report messages from destination Host-A 110A. The proactive mode is suitable for protecting specialized virtual machines that receive a large number of ingress packets. For example in
Compared to the reactive mode, the implementation of the proactive mode is more resource-intensive because there may be a large number of potential source virtual machines that send packets to “VM2” 122. As such, the proactive mode may be selectively implemented for important destination virtual machine or destination host (e.g., database server).
Referring to
At 760 in
Although examples of the reactive move and proactive mode have described using different source and destination hosts for simplicity, it should be understood that the same approach may be used when both the source virtual machine (e.g., “VM3” 123) and destination virtual machine (e.g., “VM2” 122) reside on the same Host-A 110A. In the case of reactive mode, firewall controller 160 may also instruct firewall engine 150A to stop “VM3” 123 from sending unwanted packets to “VM2” 122. In the case of proactive mode, firewall controller 160 may determine both “VM1” 121 and “VM3” 123 as potential sources, and instruct firewall engine 150A to stop them from sending unwanted packets to “VM2” 122.
Computing Devices
The above examples can be implemented by hardware (including hardware logic circuitry), software or firmware or a combination thereof. The above examples may be implemented by any suitable computing device, etc. The computing device may include processor(s), memory unit(s) and PNIC(s) that may communicate with each other via a communication bus, etc. The computing device may include a non-transitory computer-readable medium having stored thereon instructions that, when executed by the processor, cause the processor to perform processes described herein with reference to
The techniques introduced above can be implemented in special-purpose hardwired circuitry, in software and/or firmware in conjunction with programmable circuitry, or in a combination thereof. Special-purpose hardwired circuitry may be in the form of, for example, one or more application-specific integrated circuits (ASICs), programmable logic devices (PLDs), field-programmable gate arrays (FPGAs), and others. The term ‘processor’ is to be interpreted broadly to include a processing unit, ASIC, logic unit, or programmable gate array etc.
The foregoing detailed description has set forth various embodiments of the devices and/or processes via the use of block diagrams, flowcharts, and/or examples. Insofar as such block diagrams, flowcharts, and/or examples contain one or more functions and/or operations, it will be understood by those within the art that each function and/or operation within such block diagrams, flowcharts, or examples can be implemented, individually and/or collectively, by a wide range of hardware, software, firmware, or any combination thereof.
Those skilled in the art will recognize that some aspects of the embodiments disclosed herein, in whole or in part, can be equivalently implemented in integrated circuits, as one or more computer programs running on one or more computers (e.g., as one or more programs running on one or more computing systems), as one or more programs running on one or more processors (e.g., as one or more programs running on one or more microprocessors), as firmware, or as virtually any combination thereof, and that designing the circuitry and/or writing the code for the software and or firmware would be well within the skill of one of skill in the art in light of this disclosure.
Software and/or to implement the techniques introduced here may be stored on a non-transitory computer-readable storage medium and may be executed by one or more general-purpose or special-purpose programmable microprocessors. A “computer-readable storage medium”, as the term is used herein, includes any mechanism that provides (i.e., stores and/or transmits) information in a form accessible by a machine (e.g., a computer, network device, personal digital assistant (PFD1), mobile device, manufacturing tool, any device with a set of one or more processors, etc.). A computer-readable storage medium may include recordable/non recordable media (e.g., read-only memory (ROM), random access memory (RAM), magnetic disk or optical storage media, flash memory devices, etc.).
The drawings are only illustrations of an example, wherein the units or procedure shown in the drawings are not necessarily essential for implementing the present disclosure. Those skilled in the art will understand that the units in the device in the examples can be arranged in the device in the examples as described, or can be alternatively located in one or more devices different from that in the examples. The units in the examples described can be combined into one module or further divided into a plurality of sub-units.
This application is a continuation application of U.S. patent application Ser. No. 17/180,606, filed Feb. 19, 2021, now published as U.S. Patent Publication 2021/0176212. U.S. patent application Ser. No. 17/180,606 is a continuation application of U.S. patent application Ser. No. 15/050,477, filed Feb. 23, 2016, now issued as U.S. Pat. No. 11,038,845. U.S. patent application Ser. No. 17/180,606, now published as U.S. Patent Publication 2021/0176212, and U.S. patent application Ser. No. 15/050,477, now issued as U.S. Pat. No. 11,038,845, are incorporated herein by reference.
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