Patent Application
20060085564
1. Field of the Invention
This invention is related in general to embedded systems. In particular, the invention consists of a method for updating firmware within multiple embedded processors utilizing a single update procedure.
2. Description of the Prior Art
A large number of present-day devices, such as automation systems, data-storage systems, toys, appliances, and automobiles, utilize embedded systems to control their functionality. These embedded systems include processing devices (“processors”) for processing information and issuing commands to other device components. These processors require operating instructions to control their operation. Additionally, these processors have internal memory locations and buffers for holding and manipulating data. The combination of operating instructions and data used by an embedded processor is referred to as firmware and the logical construct that defines the processor is referred to as the firmware image.
In complex systems, a high-level management device implements high-level management software to direct and control low-level embedded processors located within sub-systems. One function of the high-level management software is to program these embedded processors with updated firmware images in order to change the functionality of the processors. This is accomplished by downloading a new firmware image into a download buffer which may either be part of or external to the embedded processor. Once fully downloaded, the new firmware image is loaded into the processor, replacing the original firmware image.
In order to provide increased fault-tolerance, embedded systems sometimes utilize redundant processors. Each redundant processor is usually connected to and controlled by the high-level management device through a direct communication path. If new firmware images need to be loaded into the processors, these images are traditionally transmitted to each redundant processor through the direct communication path,
Updating firmware for redundant processors is a communication-bandwidth intensive task as it involves transferring large amounts of data. While firmware updates are being transmitted, the direct communication path may not be used for other purposes. Accordingly, it would be advantageous to have a system for updating redundant embedded processors that minimizes the communication bandwidth utilization of the direct communication path.
The invention disclosed herein utilizes secondary communication paths between redundant embedded processors to reduce communication bandwidth utilization of a primary communication path during firmware updates. A high-level management device implements high-level management software to select one of the redundant embedded processors as a master sub-system and instructs it to prepare for a firmware download. The high-level management software also instructs the master sub-system to establish a secondary communication path to all other associated redundant processors and to direct them to prepare for firmware downloads of their own. The high-level management device then transmits an updated firmware image to the master sub-system where it is re-distributed to the other associated redundant processors over the secondary communication paths.
Various other purposes and advantages of the invention will become clear from its description in the specification that follows and from the novel features particularly pointed out in the appended claims. Therefore, to the accomplishment of the objectives described above, this invention comprises the features hereinafter illustrated in the drawings, fully described in the detailed description of the preferred embodiments and particularly pointed out in the claims. However, such drawings and description disclose just a few of the various ways in which the invention may be practiced.
This invention is based on the idea of utilizing secondary communication paths between redundant embedded processors to reduce bandwidth utilization of direct communication paths between the redundant embedded processors and a high-level management device. The invention disclosed herein may be implemented as a method, apparatus or article of manufacture using standard programming or engineering techniques to produce software, firmware, hardware, or any combination thereof. The term “article of manufacture” as used herein refers to code or logic implemented in hardware or computer readable media such as optical storage devices, and volatile or non-volatile memory devices. Such hardware may include, but is not limited to, field programmable gate arrays (“FPGAs”), application-specific integrated circuits (“ASICs”), complex programmable logic devices (“CPLDs”), programmable logic arrays (“PLAs”), microprocessors, or other similar processing devices.
Referring to figures, wherein like parts are designated with the same reference numerals and symbols,
The redundant embedded processors may be micro-processors, general-purpose computing devices, or programmable logic devices. In this embodiment of the invention, the redundant embedded processors 14 are computer processors each with a download buffer 22, a non-volatile memory 24 for holding firmware images, and a logical construct 26 implementing a firmware image.
In
The flow chart of
Once the master sub-system 28 and other associated redundant embedded processors 14 are properly prepared, the high-level management device begins streaming a new firmware image to the master sub-system (step 108), where it is accumulated in the download buffer 22 or it can be transferred to nonvolatile memory 24 if the download buffer size is limited. The transmission of the firmware image data can be broken down into many small pieces to avoid reducing the bandwidth of important tasks through the primary path 16. In addition, during the process of transmitting the firmware image data, any of the redundant sub-systems can be selected to be the master sub-system and the primary path 16 can be changed depending on which master sub-system is selected. It should be noted that the firmware update process is accomplished concurrent with normal system operation. In step 110, the master sub-system re-distributes the new firmware image to the other associated redundant embedded processors 14 through the secondary communication paths 18. This re-distribution may occur as information arrives in the download buffer 22 of the master sub-system 28, or may be distributed once the firmware download is complete. Once the new firmware image has been received by all the redundant embedded processors, it is transferred to each associated non-volatile memory 24 (step 112). Optionally, the new firmware image may be validated by calculating the checksum or CRC of the data. If the new firmware image cannot be validated, it is ignored and the existing firmware image remains as the logical construct 26.
In step 114, the new firmware image replaces the existing firmware image. In this embodiment of the invention, this is accomplished by resetting the processors, allowing the new firmware image to be loaded as the logical construct 26.
An important aspect of this invention is that the only direct communication path 16 involved in the firmware update is the primary communication path 30. This allows the remaining direct communication paths 16 to remain available for other data transmission transactions. The direct communication path 16 can be changed during the course of transmitting data. This allows the management software application 20 to pick the least congested path to communicate with the master sub-system 28.
Those skilled in the art of making embedded systems may develop other embodiments of the present invention. For example, the process of update firmware images may be distributed through the redundant embedded processors utilizing a binary tree structure. Or, an embedded processor may serve as a dedicated master sub-system used solely as a distribution node for the firmware images. However, the terms and expressions which have been employed in the foregoing specification are used therein as terms of description and not of limitation, and there is no intention in the use of such terms and expressions of excluding equivalents of the features shown and described or portions thereof, it being recognized that the scope of the invention is defined and limited only by the claims which follow.
