Claims
- 1. A flat mount assembly, comprising a flat mount, at least one semiconductor chip in or on said flat mount, an antenna formed of two electrical conductors connected to said at least one semiconductor chip for interchanging data and power with an electronic apparatus, and a conductive layer disposed on said mount and overlapping with said electrical conductors of said antenna.
- 2. The flat mount assembly according to claim 1, wherein each of said two electrical conductors overlaps with an associated said conductive layer.
- 3. The flat mount assembly according to claim 2, wherein a respective said conductive layer completely covers a respective said electrical conductor.
- 4. The flat mount assembly according to claim 1, which further comprises a dielectric, and wherein said conductive layer is located at a distance from said electrical conductors, separated by said dielectric.
- 5. The flat mount assembly according to claim 1, wherein said electrical conductors are embedded together with said semiconductor chip in said flat mount.
- 6. The flat mount assembly according to claim 1, wherein said flat mount has a first main face and said electrical conductors are applied on said first main face.
- 7. The flat mount assembly according to claim 1, wherein said conductive layer is in direct electrical contact with said electrical conductors.
- 8. The flat mount assembly according to claim 1, wherein said conductive layer is arranged mirror-symmetrically with respect to said electrical conductors.
- 9. The flat mount assembly according to claim 1, wherein said electrical conductors are arranged symmetrically with respect to said semiconductor chip.
- 10. The flat mount assembly according to claim 1, wherein said semiconductor chip is disposed outside a mirror-image axis of said flat mount.
- 11. The flat mount assembly according to claim 1, wherein said flat mount is composed of paper.
- 12. The flat mount assembly according to claim 1, wherein a surface area of a respective said conductive layer is greater than a surface acrea of a respective said electrical conductor.
Priority Claims (1)
Number |
Date |
Country |
Kind |
99 123 207.5 |
Nov 1999 |
EP |
|
CROSS-REFERENCE TO RELATED APPLICATION
[0001] This application is a continuation of copending International Application No. PCT/DE00/04139, filed Nov. 23, 2000, which designated the United States and which was not published in English.
Continuations (1)
|
Number |
Date |
Country |
Parent |
PCT/DE00/04139 |
Nov 2000 |
US |
Child |
10156508 |
May 2002 |
US |