Patent Application
20050189866
1. Field of the Invention
The invention relates to a flat panel display apparatus and, more particularly, to a field emission display (hereinafter, abbreviated to an “FED”) as a flat panel display apparatus in which electron sources in each of which a number of cold cathode devices for emitting electrons are arranged in a matrix shape are enclosed in an airtight vessel.
2. Description of the Related Art
In recent years, an FED as a flat panel display apparatus in that electron sources in each of which electron emission devices of cold cathode devices are arranged in a matrix shape are enclosed in an airtight vessel (vacuum vessel) is highlighted as a flat panel display apparatus of a spontaneous light emitting type whose electric power consumption is small and which has luminance and contrast similar to those of a cathode ray tube. As electron emission devices, a Surface-conduction Electron-emitter Display device (hereinafter, abbreviated to an “SED type”), a Field Electron-emitter Display device (hereinafter, abbreviated to an “FE type”), a Metal-Insulator-Metal type electron emission device (hereinafter, abbreviated to an “MIM type”), and the like have been known. As an FE type, a spint type mainly made of a metal such as Mo or the like or a semiconductor material such as Si or the like and a CNT type using a carbon-nanotube (CNT) as an electron source can be mentioned. The SED type has been disclosed in, for example, JP-A-2000-164129. The MIM type has been disclosed in, for example, JP-A-2001-101965. A background art will be described hereinbelow by using the MIM type FED for simplicity of explanation. The background art which is mentioned here has been disclosed in, for example, JP-A-2001-101965.
The FED is constructed in such a manner that a rear substrate (also referred to as a cathode substrate) in which electron emission devices of cold cathode devices are arranged in a matrix shape on an insulative substrate and used as electron sources and a display substrate (also referred to as a anode substrate) in which phosphors of three primary colors R, G, and B which emit light by irradiation of electron beams from the electron sources are formed on a translucent substrate such as glass or the like and a metal back as a thin film of aluminum which protects deterioration of the phosphor due to the irradiation of the electron beam and functions as an anode electrode is formed on the phosphors are arranged so as to face each other at a predetermined interval, a supporting frame is seal-bonded to a peripheral edge portion between the rear substrate and the display substrate by frit glass or the like, and an inside of the FED is set into a vacuum airtight state of about 10−5 to 10−7 torr.
In the case of the MIM type, as shown in
Since the inside of the FED is filled with a vacuum atmosphere, in the case where the FED is used as a display apparatus of a large display screen, it is necessary to arrange a plurality of supporting members (hereinafter, referred to as “spacers”) between the display substrate and the rear substrate so that the vacuum chamber is not destroyed by a difference between the inner atmospheric pressure and the outer atmospheric pressure.
The spacer (for example, a flat shape) is constructed in such a manner that the display substrate side is arranged on black light absorbing layers provided among phosphors of R, G, and B constructing pixels in order to improve the contrast, for example, on metal backs in a matrix-shaped black matrix and the rear substrate side is arranged in parallel on a metal film formed on the surface protecting films of the upper electrode lines so as not to obstruct a trajectory of the electrons which reach the phosphor from the electron emission devices as electron sources.
The spacer is charged by the action of the electrons from the electron emission devices. Therefore, at a place near the spacer, the trajectory of the electrons which are emitted from the electron emission devices is bent and a phenomenon in which an image is distorted occurs. To prevent such a phenomenon, as disclosed in JP-A-57-118355 or JP-A-2002-260563, tin oxide of a high resistance film, a mixed crystal thin film of tin oxide and indium oxide, or a conductive film as a metal film for prevention of the charging is formed on the surface of the spacer, thereby allowing a microcurrent to flow on the spacer surface. For this purpose, the spacer is electrically connected to the metal film and the metal back between the upper electrode lines by a conductive adhesive material (for example, conductive frit glass in which a conductive material such as a metal or the like has been mixed).
Thus, an anode voltage (for example, 5 to 10 kV) applied to the metal back flows into the metal film of the rear substrate through the spacer. Ordinarily, the metal film is connected to a ground potential and a current from an anode electrode of a high voltage flows into the ground potential.
A whole constructional diagram of the FED mentioned above is shown in
In the FED, when a diagonal size of its display panel exceeds 5 inches, in order to support the atmospheric pressure, it is necessary to arrange a plurality of spacers made of the insulative material as reinforcing members between the display substrate and the rear substrate at intervals of a few centimeters. A part of the electrons emitted from the electron source devices collide with those spacers and cause charging. To prevent it, a high resistance film is formed on the spacer and slight conductivity is given thereto, thereby eliminating the charge on the spacer surface. Therefore, it is necessary to electrically connect the spacer to the metal back of the display substrate side and the metal film on the surface protecting film of the rear substrate side. In the metal film to which the ground potential is applied on the rear substrate side, since a thickness is equal to or less than 10 nm and adhesion strength to the surface protecting film is weak, if a pressure from the spacer is applied, disconnection is liable to easily occur. To prevent it, a third wiring that is independent of the signal line (upper electrode line) and the scanning line (lower electrode line) needs to be formed on the surface protecting film as a ground wiring for the spacer.
However, if a triple-layer wiring structure in which the signal line, the scanning line, and the independent third wiring are arranged on the rear substrate side is used as mentioned above, since a manufacturing step is inevitably longer than that of a double-layer wiring, deterioration in yield and an increase in manufacturing costs cause a problem.
There is also a problem of a voltage drop of a scanning line electrode. Such a problem will be described hereinbelow. In the case of displaying an image by the FED, a driving method called a line-sequential driving system is used as a standard. According to such a system, when still images of 60 frames per second are displayed, the display in each frame is executed every scanning line (horizontal direction). Therefore, all of the cold cathode electron sources corresponding to the number of signal lines and existing on the same scanning line are simultaneously made operative.
At the time of the operation, a current obtained by multiplying a current which is consumed by the cold cathode electron sources included in sub-pixels by the total number of signal lines and the number (3) of colors (RGB) flows in the scanning line. Since such a scanning line current causes a voltage drop along the scanning line due to a wiring resistance, the uniform operation of the cold cathode electron sources is obstructed.
A degree of the voltage drop differs depending on the system of the cold cathode electron sources. For example, in the spint type of the FE type, since almost of 100% of the electron source current is dispersed into the vacuum and reaches an anode (fluorescent screen), a current flowing in a gate line (scanning line) is extremely small and an influence of the voltage drop is small. On the other hand, in the SED type, the MIM type serving as a hot electron type, or the like, when the electron source current of at most a few % reaches the anode, most of the current flows as a reactive current into the gate line (scanning line). Therefore, when comparing with the same anode current, those electron sources are more easily influenced by the voltage drop than the spint type.
Hitherto, in the FED, the scanning lines are always selected as lower electrodes. This is because in the hot electron type electron sources, a film thickness of the upper electrode has to be set to a very thin film of about a few nm in order to reduce scattering of the hot electrons and since the sheet resistance is inevitably equal to or higher than 100 Ω/□, it is improper to use the upper electrodes as scanning lines.
As for the lower electrodes, since the lower electrode is made of an aluminum film whose thickness is equal to about 300 nm and a pitch of the scanning lines is equal to about three times as large as that of the signal lines and has an enough space, the sheet resistance can be suppressed to hundreds of mΩ/□ by assuring a sufficient line width. Therefore, it is very natural to select the lower electrodes as scanning lines.
However, according to such a construction, it has been found that it is difficult to suppress the voltage drop which becomes more typical in association with an enlargement of a display screen size.
In the FED, a scanning line current Is which is required to obtain predetermined luminance can be expressed by the following equation (1).
Is=Je×S/α (1)
where,
Thus, an amount of voltage drop (Vdrop) which is caused across the scanning line can be expressed by the following equation (2).
Vdrop=½×Id×Rs×(L/W) (2)
where,
It will be understood that when it is assumed that the display screen size is enlarged while keeping resolution constant, the voltage drop amount Vdrop increases in proportion to Rs×S/α. To suppress it, the following measures are taken.
(1) An electron emission coefficient is raised. However, although it is proper to thin a thickness of upper electrode, since there is a lower limitation, it is impossible to reduce the voltage drop amount in proportion.
(2) The sheet resistance Rs is reduced. To realize it, a thickness of lower electrode is increased and resistivity is reduced. However, improvement cannot be expected because of the following reasons (a) to (c).
From the above viewpoints, a new construction which can sufficiently reduce the sheet resistance of the scanning line is needed to enable the MIM type electron source to cope with the display of a large display screen.
The invention is made in consideration of the above circumstances and it is an object of the invention to provide a flat panel display apparatus having a conduction connecting structure of spacers and scanning lines, in which the above problems can be solved, there is no remarkable change between a resistance value of the scanning line in the scanning line direction in a portion with the spacer and that in a portion without a spacer and a luminance variation can be reduced.
To accomplish the above object, according to the invention, there is provided a flat panel display apparatus comprising: a rear substrate in which a number of cold cathode devices for emitting electrons are formed on an insulative substrate; a display substrate in which phosphors which are excited by electron beams from the cold cathode devices and emit light and are arranged in a matrix shape are formed on a translucent substrate arranged so as to face the rear substrate, light absorbing layers for improving contrast are formed among the phosphors, and a metal back to accelerate the electron beams is formed on the surfaces of the phosphors and the light absorbing layers on the side of the cold cathode devices; a plurality of supporting members which are perpendicularly arranged between the rear substrate and the display substrate and maintain intervals between them; and frame members, in which space surrounded by the rear substrate, the display substrate, and the frame members is set to a vacuum atmosphere, wherein the rear substrate has the cold cathode devices in crossing portions of a plurality of row-directional wirings and a plurality of column-directional wirings which perpendicularly cross and the supporting members are adhered and arranged in parallel on the row-directional wirings or the column-directional wirings with an anisotropic conductive adhesive material.
That is, according to the invention, there is provided a flat panel display apparatus comprising: a rear substrate in which a number of cold cathode devices for emitting electrons are formed on an insulative substrate; a display substrate which is arranged so as to face the rear substrate and in which phosphors that are excited by electron beams from the cold cathode devices and emit light are arranged in a matrix shape on a translucent substrate; supporting members which are arranged between the rear substrate and the display substrate and maintain intervals between them; and frame members, in which a space surrounded by the rear substrate, the display substrate, and the frame members is set to a vacuum atmosphere, wherein the rear substrate has the cold cathode devices in crossing portions of row-directional wirings and column-directional wirings which perpendicularly cross and the supporting members are adhered and arranged on the row-directional wirings or the column-directional wirings with an anisotropic conductive adhesive material.
According to the invention, the supporting members have flat portions and the flat portions are arranged on the row-directional wirings in parallel with the wiring direction.
According to the invention, in the anisotropic conductive adhesive material, a resistance value in the direction which perpendicularly crosses is two or more digits higher than that in the interval maintaining direction of the supporting members.
In the invention, since the anisotropic conductive adhesive material is used for conduction connection of the supporting members and predetermined directional wirings on which the supporting members are arranged, a resistance value RT in the thickness direction of the conductive adhesive material can be reduced, a plane-directional resistance value RL in the direction along the predetermined directional wirings which perpendicularly crosses the thickness direction of the conductive adhesive material can be increased, and an influence of the resistance value RL of a resistor which is in parallel with a predetermined directional wiring resistor R can be ignored. Thus, the luminance variation occurring in the portion with the spacer and the portion without a spacer can be reduced.
The invention is suitable particularly in the case where the wirings where the supporting members are arranged are the row-directional wirings, that is, the scanning lines.
According to the invention, it is possible to provide a flat panel display apparatus having a conduction connecting structure of the supporting members and the scanning lines, in which there is no remarkable change between the resistance value of the scanning line in the scanning line direction in the portion with the spacer and that in the portion without a spacer and the luminance variation can be reduced.
A best mode for carrying out the invention will be described hereinbelow.
An embodiment of a flat panel display apparatus of the invention will be described with reference to the drawings.
First, an example of the flat panel display apparatus to which the invention is applied will be explained. With respect to this flat panel display apparatus, the applicant et al. of the present invention have already proposed such devices in Japanese Patent Application No. 2002-216227 and JP-A-2004-246317. Their outlines will be described hereinbelow with reference to
In
An interlayer insulating film 14 and subsequent portions will be described with reference to manufacturing step diagrams because their constructions are complicated.
Subsequently, a resist pattern in a square frame-shape is formed onto the connection electrode lower layer 15A which forms the electron emitting portion region (square concave portion) of the electron source and the connection electrode lower layer 15A of Cr exposed to the inside of the frame-shaped pattern is selectively worked by wet etching and removed.
Returning to
The rear substrate on which a plurality of MIM type electron emission devices are arranged in a matrix shape (it is conveniently illustrated here by a matrix comprising 3×4 dots for simplicity of explanation) is shown in
An example of a flat panel display apparatus in which a rear substrate on that a plurality of electron emission devices are arranged in a matrix shape and a display substrate are arranged so as to face each other at a predetermined interval is shown in
In the case of applying the above construction to a panel of 17 inches in which an aspect ratio is equal to 4:3 and the number of pixels is equal to 640×480 (VGA), a conductor width of the upper electrode power supply wiring 16 is equal to about 200 μm and its wiring film thickness is equal to 5 μm. Therefore, a scanning line resistance is equal to about 5.9Ω because a specific resistance of Cu is equal to 1.7 μΩ·cm. When a potential difference of about 10V is applied between the lower electrode and the upper electrode, the current flowing in the upper electrode power supply wiring as a scanning line is equal to about 0.1 A.
In the case where, for example, a conductive adhesive material of a metal paste whose specific resistance is equal to about 3 μΩ·cm as disclosed in JP-A-2003-115216 is used as a conductive adhesive material for conduction-connecting the spacer onto the scanning line, in the scanning line portion where the spacer is arranged, a resistance whose specific resistance is equal to about 3 μΩ·cm based on the conductive adhesive material is connected to the scanning line whose specific resistance is equal to 1.7 μΩ·cm in parallel therewith, so that the resistance value of the scanning line in the portion with the spacer and that in the portion without a spacer differ. Consequently, voltage drops in the portion with the spacer and the portion without a spacer which are neighboring differ remarkably, luminance gradation (change in brightness) due to such a large different voltage drop is visually recognized, and what is called a “luminance variation” is caused. On the other hand, if there is no spacer, since the luminance gradation is constant (for example, the brightness becomes gradually dark from the left side of the display screen toward the right side of the display screen), it is difficult to visually recognize the luminance gradation.
The thinner the film thickness (5 μm) of Cu of the upper electrode power supply wiring 16 is made for the purpose of reducing the costs, the more the change in scanning line resistance in association with the localization of the conductive adhesive material increases and the more the luminance gradation can be easily seen.
To avoid such a situation, there is a method of smoothing the luminance gradation by uniformly coating the whole scanning line with the conductive adhesive material of the metal paste. However, such a method results in wasteful consumption of resources and an increase in costs.
In the diagrams, component elements having common functions are designated by the same reference numerals and the repetitive explanation about the component elements which have been described once is omitted here to avoid complexity. The scanning line and the upper electrode power supply wiring are the same and it is assumed hereinbelow that the upper electrode power supply wiring is called a scanning line unless otherwise a doubt is raised.
The invention is characterized in that the spacer is arranged on the scanning line in parallel in its longitudinal direction, in the portion where the scanning line and the spacer are conduction-connected by the conductive adhesive material, an anisotropic conductive adhesive material in which a resistance value in the plane direction which perpendicularly crosses the thickness direction, that is, a resistance value along the longitudinal direction of the scanning line is two or more digits larger than that in the thickness direction of the conductive adhesive material is used as a conductive adhesive material.
An embodiment 1 will now be described.
The anisotropic conductive adhesive material is a material obtained by dispersing conductive particles into an insulative adhesive agent using a thermosetting resin as a main component and used as, for example, an anisotropic conductive film (usually, abbreviated to “ACF”) molded in a film shape. The anisotropic conductive adhesive material shows conductivity in the thickness direction where a pressure is applied and insulation performance in the plane direction which perpendicularly crosses the pressing direction and has been disclosed in, for example, JP-A-2003-308728.
As disclosed in JP-A-2003-226858 showing the hardening action similar to that of the thermosetting adhesive agent, according to the anisotropic conductive adhesive material 127, metallic particles or metal-coated plastic particles are dispersed in the adhesive agent, thereby causing the anisotropy showing the conductivity in the thickness direction and showing the insulation performance in the plane direction. That is, the adhesive agent serving as a base material is made of a silicon resin containing at least phenylheptamethyl cyclotetra siloxane and 2,6-cis-diphenyl hexamethyl cyclotetra siloxane and thermally hardened at temperatures of 200 to 400° C. As for the FED, ordinarily, after the display substrate and the rear substrate are assembled as a display panel, a heat treatment step is executed at about 300° C. Therefore, the present adhesive agent can be preferably used.
A connecting step of the spacers and the scanning lines is shown in
As mentioned above, the rear substrate 1 onto which the spacers have temporarily been fixed and the substrate 101 on which the phosphor and the metal back have been formed are assembled through the supporting frames 116 as shown in
Naturally, in place of the frit glass 115, the adhesive agent made of the silicon resin containing at least phenylheptamethyl cyclotetra siloxane and 2,6-cis-diphenyl hexamethyl cyclotetra siloxane as a base material of the anisotropic conductive adhesive material 127 can be also used in the joint portions of the substrate 101 and the supporting frames 116 and the joint portions of the rear substrate 1 and the supporting frames 116. By using such an adhesive agent, vacuum airtightness of the FED can be further improved as also disclosed in JP-A-2003-226858.
As mentioned above, according to the invention, since the anisotropic conductive adhesive material is used for the conduction connection of the spacers and the scanning line as a row-directional wiring on which the spacers are arranged, the resistance value RT in the thickness direction of the conductive adhesive material can be reduced, the resistance value RL in the plane direction along the scanning line which perpendicularly crosses the thickness direction of the conductive adhesive material can be increased, and the influence of the resistance value RL of the resistor which is in parallel with the scanning line resistor R1 can be ignored. Thus, the luminance variation occurring in the portion with the spacer and the portion without a spacer can be preferably reduced.
In the embodiment mentioned above, since the spacers can be thickened, the invention has been described as an example in which the spacers can be arranged on the scanning line as a row-directional wiring and along the scanning line. However, the invention is not limited to such an example but can be also naturally applied to the case where the spacers are arranged on the scanning line as a column-directional wiring and along the signal line (for example, refer to
The invention can be also applied to the case where the spacers are not in the flat-plate shape but are in an L-character shape or a T-character shape obtained by combining two flat plate-shaped spacers. For example, in the case where one spacer is arranged on the scanning line and in parallel therewith and the other spacer is arranged so as to traverse a plurality of scanning lines, in the case of the spacer in the transverse direction, since a resistance film formed on the spacer surface has a high resistance (for example, in paragraph No. 0121 of JP-A-2000-164129, a specific resistance is equal to 1×102 to 1×106 Ω·cm), even if the spacer traverses the scanning lines, an interference between the adjacent scanning lines through the spacer can be ignored. On the other hand, in the case of the spacer in the scanning line direction, the luminance variation can be preferably reduced by the anisotropic conductive adhesive material.
Naturally, the invention can be also similarly applied to the case of a lattice shape (box shape) in which a plurality of spacers are combined.
It should be further understood by those skilled in the art that although the foregoing description has been made on embodiments of the invention, the invention is not limited thereto and various changes and modifications may be made without departing from the spirit of the invention and the scope of the appended claims.
| Number | Date | Country | Kind |
|---|---|---|---|
| 2004-019915 | Jan 2004 | JP | national |
