The present invention will be described below on the basis of Example with reference to the drawings.
Example is related to a flat-panel type display according to an embodiment of the present invention and a spacer according to an embodiment of the present invention.
In the display of Example, a schematic perspective exploded view of a part of a cathode panel CP and an anode panel AP when the cathode panel CP and the anode panel AP are disassembled is similar to the diagram shown in
In the display of Example, a marginal portion of a cathode panel CP provided with a plurality of electron emission regions EA and a marginal portion of an anode panel AP provided with luminescent layers 22 and an anode 24 are bonded to each other, spacers 140 are disposed between the cathode panel CP and the anode panel AP, and a space sandwiched between the cathode panel CP and the anode panel AP is maintained under vacuum.
The spacer 140 is composed of a substrate of spacer 140A and an antistatic coating 140B disposed on the side surface portion of the substrate of spacer 140A. The antistatic coating 140B is formed from germanium nitride containing no transition metal. The thickness of the antistatic coating 140B is within the range of 2 nm to 20 nm, and the volume resistivity of the substrate of spacer 140A is within the range of 5×106 Ω·m to 2×108 Ω·m, more specifically is within the range of 1×107 Ω·m to 1×108 Ω·m. The spacer 140 will be described later in detail.
The structure of the display of Example will be described below, and a method for manufacturing the spacer and the display of Example will be described. Thereafter, the characteristics of the display incorporated with the spacers of Example will be described.
First, the structure of the display of Example will be described.
As shown in
An interlayer insulating layer 16 is disposed on an insulating layer 12 and the gate electrode 13, and a focusing electrode 17 formed from aluminum having an thickness of 0.4 μm is disposed thereon on the basis of a DC sputtering method. The focusing electrode 17 may exert a common converging effect on the plurality of field emission elements. A third opening 14C communicating with a first opening 14A is disposed in the interlayer insulating layer 16. A penetration hole (not shown in the drawing) for evacuation is disposed in an invalid region of the cathode panel CP. An exhaust tube (not shown in the drawing), which may be referred to as a tip tube and which is sealed and cut after evacuation, is attached to the penetration hole.
In Example, the field emission element constituting the electron emission region EA is composed of a Spindt type electron emission element. The Spindt type electron emission element is composed of:
(a) the cathode 11 disposed on a support 10,
(b) the insulating layer 12 disposed on the support 10 and the cathode 11,
(c) the gate electrode 13 disposed on the insulating layer 12,
(d) an opening 14 disposed in the gate electrode 13 and the insulating layer 12 (the first opening 14A disposed in the gate electrode 13 and an second opening 14B disposed in the insulating layer 12), and
(e) a conical electron emission portion 15 disposed on the cathode 11 positioned at the bottom of the opening 14.
In Example, the anode panel AP is composed of a substrate 20, luminescent layers 22 disposed on the substrate 20, and an anode 24 covering the luminescent layers 22. More specifically, the anode panel AP is provided with the substrate 20, luminescent layers 22 (red-emitting luminescent layers 22R, green-emitting luminescent layers 22G, and blue-emitting luminescent layers 22B), which are disposed on the substrate 20 between a partition wall 21 and another partition wall 21 disposed on the substrate 20 and which is composed of many luminescent particles, and the anode 24 disposed on the luminescent layers 22. The anode 24 is formed from aluminum (Al) having an thickness of about 0.3 μm, and is a in the shape of a thin single sheet covering the effective region. The anode 24 is disposed in such a way as to cover the partition walls 21 and the luminescent layers 22. A light absorbing layer (black matrix) 23 is disposed between a luminescent layer 22 and another luminescent layer 22 and between the partition wall 21 and the substrate 20 in order to prevent an occurrence of color blurring of a display image or an occurrence of optical crosstalk. The space sandwiched between the cathode panel CP and the anode panel AP is allowed to become under vacuum (pressure: for example, 10−3 Pa or less).
Each subpixel is composed of an electron emission region EA on the cathode panel side and a luminescent layer 22 on the anode panel side facing a group of the field emission elements. The pixels of the order of a few hundreds of thousands to a few millions, for example, are arrayed in the effective region. In the display for performing color display, each pixel is composed of a set of one red-emitting subpixel, one green-emitting subpixel, and one blue-emitting subpixel.
In Example, the cathode 11 is connected to a cathode control circuit 31, the gate electrode 13 is connected to a gate electrode control circuit 32, the focusing electrode 17 is connected to a focusing electrode control circuit (not shown in the drawing), and the anode 24 is connected to an anode control circuit 33. These control circuits may be composed of known circuits. In an actual operation of the display, the anode voltage VA applied from the anode control circuit 33 to the anode 24 is usually constant, and may be set at, for example, 5 kilovolts to 15 kilovolts, and specifically, for example, at 9 kilovolts (for example, d0=2.0 mm). On the other hand, in the actual operation of the display, with respect to the voltage VC applied to the cathode 11 and the voltage VG applied to the gate electrode 13, any one of
(1) a system in which the voltage VC applied to the cathode 11 is made constant, and the voltage VG applied to the gate electrode 13 is varied,
(2) a system in which the voltage VC applied to the cathode 11 is varied, and the voltage VG applied to the gate electrode 13 is made constant, and
(3) a system in which the voltage VC applied to the cathode 11 is varied, and the voltage VG applied to the gate electrode 13 is also varied is adopted.
In the actual operation of the display, a relatively negative voltage (VC) is applied to the cathode 11 from the cathode control circuit 31, a relatively positive voltage (VG) is applied to the gate electrode 13 from the gate electrode control circuit 32, 0 volts, for example, is applied to the focusing electrode 17 from the focusing electrode control circuit, and a positive voltage (anode voltage VA) further higher than the voltage of the gate electrode 13 is applied to the anode 24 from the anode control circuit 33. In the case where display is performed in the above-described display, for example, a scanning signal is input into the cathode 11 from the cathode control circuit 31, and a video signal is input into the gate electrode 13 from the gate electrode control circuit 32. Alternatively, a video signal may be input into the cathode 11 from the cathode control circuit 31, and a scanning signal may be input into the gate electrode 13 from the gate electrode control circuit 32. Electrons are emitted from the electron emission portion 15 on the basis of the quantum tunnel effect by an electric field generated when a voltage is applied between the cathode 11 and the gate electrode 13, and the electrons are attracted to the anode 24 and pass through the anode 24, so as to collide with the luminescent layer 22. As a result, the luminescent layer 22 is excited and emits light, so that a desired image is obtained. That is, the operation of this display is basically controlled by the voltage VG applied to the gate electrode 13 and the voltage VC applied to the cathode 11.
The structure of the display of Example has been described above. The method for manufacturing the spacer 140 and the display of Example will be described below.
The spacer 140 of Example is composed of a substrate of spacer 140A and an antistatic coating 140B disposed on the side surface portion of the substrate of spacer 140A. The antistatic coating 140B is formed from germanium nitride containing no transition metal. The thickness of the antistatic coating 140B is within the range of 2 nm to 20 nm, and the volume resistivity of the substrate of spacer 140A is within the range of 5×106 Ω·m to 2×108 Ω·m, and more specifically is within the range of 1×107 Ω·m to 1×108 Ω·m.
The method for manufacturing the spacer of Example and the method for manufacturing the flat-panel type display of Example will be described below with reference to
Step-100
A green sheet slurry is prepared, in which a ceramic powder and a metal oxide powder serving as an electrical conductivity-imparting material are used as the dispersoid and a binder composed of an organic material, e.g., an acrylic emulsion and polyvinyl alcohol (PVA), is added (refer to Step-100 shown in
Step-110
A green sheet is produced from the green sheet slurry (refer to Step-110 shown in
Step-120
The green sheet is subjected to a firing treatment, so as to produce a tabular ceramic material (refer to Step-120 shown in
Step-130
The tabular ceramic material is cut so as to produce a substrate of spacer 140A (refer to Step-130 shown in
Step-140
An antistatic coating 140B having a thickness of 2 nm to 20 nm is formed on the side surface portion of the substrate of spacer 140B (refer to Step-130 shown in
The spacer 140 of Example composed of the substrate of spacer 140A and the antistatic coating 140B may be produced by the above-described Step-100 to Step-140.
For purposes of comparison, the spacers of Comparative examples shown in Table 3 to Table 5 were produced as in the above-described Step-100 to Step-140. With respect to the spacers of Comparative examples shown in Table 3 and Table 4, the antistatic coatings were formed under the conditions exemplified in the following Table 2. With respect to the spacers of Comparative examples shown in Table 5, the antistatic coatings were formed under the conditions exemplified in the following Table 6. The 4 types of “composition of powder contained in slurry” shown in Table 1 and Table 3 to Table 5 are common to Table 1 and Table 3 to Table 5. In Comparative examples shown in Table 4, substrate of spacers having a volume resistivity of 2×108 Ω·m or more were particularly selected among the substrate of spacers produced through Step-100 to Step-130 and the antistatic coatings were formed.
Step-150
Subsequently, a flat-panel type display is assembled. Specifically, the anode panel AP and the cathode panel CP are arranged in such a way that the luminescent layers 22 and the electron emission regions EA are opposed to each other with the spacer 140 therebetween. The marginal portions of the anode panel AP and the cathode panel CP (more specifically, the support 10 and the substrate 20) are bonded to each other with the bonding component 26 therebetween. For example, in the case where the bonding component is composed of a frame body and a bonding material layer, frit glass is applied to a bonding section of the frame body constituting the bonding component and the anode panel AP and a bonding section of the frame body and the cathode panel CP, so as to form a bonding material layer constituting the bonding component, the frit glass is dried by prefiring, the anode panel AP, the cathode panel CP, and the frame body are bonded to each other and, thereafter, formal firing is performed at about 450° C. for 10 to 30 minutes. It is desired that the formal firing is performed in an inert gas atmosphere in order to prevent oxidation and the like due to the firing. The space surrounded by the anode panel AP, the cathode panel CP, and the bonding component 26 is evacuated through a penetration hole (not shown in the drawing) and a tip tube (not shown in the drawing). When the pressure of the space reaches about 10−4 Pa, the tip tube is sealed and cut by heat-fusion or press-contact. In this manner, the space surrounded by the anode panel AP, the cathode panel CP, and the bonding component 26 is allowed to become under vacuum. Subsequently, the required wiring to external circuits is performed, so that the flat-panel type display of Example may be completed.
The displays incorporated with the spacers of Example 1A to Example 4D were used, and changes in brightness over time of a pixel in the vicinity of the spacer 140 were measured. Specifically, the white was displayed on all over the display region, and the brightness barycenter of the pixel (in Example, one subpixel) in the vicinity of the spacer 140 was measured by a method as described below. The voltage applied to the anode panel AP (more specifically, the anode 24) is set at about 10 kV, and the driving condition of the display is set in such a way that the electric power calculated from the above-described voltage and the effective value of the amount of current passing the anode becomes about 20 W. The display region of the flat-panel type display is about 40 cm×30 cm. Similar measurements were performed by using the displays incorporated with the spacers of Comparative example 1A to Comparative example 6D shown in Table 3 to Table 5.
A method for determining the brightness barycenter will be described below with reference to
With respect to the pixel to be measured, the brightness barycenter just after the operation of the display (hereafter may be referred to as a brightness barycenter at the initial stage) and the brightness barycenter after a lapse of a predetermined time in the operation state (hereafter may be referred to as a brightness barycenter after changes over time) were measured. Specifically, with respect to the pixel to be measured, the brightness distribution in the inside thereof was measured with a CCD camera or the like just after the display was lit up. The brightness L(xi,yj) was determined by using the measurement results. The coordinates (XCS,YCS) of the brightness barycenter at the initial stage was calculated by using the resulting brightness L(xi,yj). After a lapse of a predetermined time while the display was in the operation state, the coordinates (XCT,YCT) of the brightness barycenter after changes over time was calculated in a manner similar to that described above.
The amount of displacement of the brightness barycenter is determined by using the coordinates (XCS,YCS) of the brightness barycenter at the initial stage and the coordinates (XCT,YCT) of the brightness barycenter after changes over time. Specifically, the distance between the two brightness barycenters is determined by calculation. The above-described operations were performed with respect to the display of Example, and an operation time required for the brightness barycenter of the pixel positioned in the vicinity of the spacer to move 5 μm was calculated. The results are shown in Table 1 and Table 3 to Table 5. When the operation time reached 3.5×104 hours (35,000 hours) or more, the measurement was terminated at that point in time.
As shown in Table 1, with respect to the spacers of Example 1A to Example 4D, the operation times required for the brightness barycenter of the pixel positioned in the vicinity of the spacer to move 5 μm are 3.5×104 hours or more.
On the other hand, as shown in Table 3, with respect to the spacer of Comparative example 1A, the thickness of the antistatic coating was less than 2 nm, the function of the antistatic coating was inadequate, and changes in brightness resulting from charging of the spacer were observed visually from just after the operation of the display. With respect to the spacers of Comparative example 2B and Comparative example 2C, the thickness of the antistatic coating was a thick 25 to 30 nm, and changes in brightness resulting from charging of the spacers were observed visually from just after the operation of the display. The measurements of the changes over time of these spacers were canceled.
As shown in Table 4, with respect to the spacers of Comparative example 4A to Comparative example 5D, the volume resistivity of the substrate of spacer exceeded 2×108 Ω·m, hitches occurred in the flow of the electrical charge due to charging to the anode panel side or the cathode panel side, and changes in brightness resulting from charging of the spacers were observed visually from just after the operation of the display. The measurements of the changes over time of these spacers were also canceled.
As shown in Table 5, with respect to the spacers of Comparative example 6A to Comparative example 6D, the operation times required for the brightness barycenter of the pixel positioned in the vicinity of the spacer to move 5 μm are, at best, about 2×104 hours.
According to the above-described measurement results, the antistatic coating is formed from germanium nitride containing no transition metal, the thickness of the antistatic coating is specified to be within the range of 2 nm to 20 nm, the volume resistivity of the substrate of spacer is specified to be within the range of 5×106 Ω·m to 2×108 Ω·m, more specifically within the range of 1×107 Ω·m to 1×108 Ω·m and, thereby, variations in electric resistance of the antistatic coating may be reduced, and relative changes in brightness of pixels along the spacer may be reduced.
The present invention has been described with reference to preferred examples. However, the present invention is not limited to these examples. The configuration and the structure of the flat-panel type display, the cathode panel, the anode panel, the cold-cathode field electron emission display, and the cold-cathode field electron emission element described in Example are no more than an example, and may be changed appropriately. Likewise, the methods for manufacturing the cathode panel, the anode panel, the cold-cathode field electron emission display, and the cold-cathode field electron emission element are no more than an example, and may be changed appropriately. Furthermore, various materials used in the production of the cathode panel and the anode panel are also no more than an example, and may be changed appropriately. With respect to the display, merely the color display has been described as an example. However, monochromatic display may be adopted.
With respect to the field emission element, merely the form, in which one electron emission portion corresponds to one opening, has been described. However, a form in which a plurality of field emission elements correspond to one opening or a form in which one electron emission portion corresponds to a plurality of openings may be adopted depending on the structure of the field emission element. Alternatively, a plurality of first openings may be disposed in the gate electrode, a plurality of second openings communicating with the above-described plurality of first openings may be disposed in the insulating layer, so as to dispose at least one electron emission portion.
The electron emission source may be composed of an element, commonly called surface-conduction type electron emission element. In this surface-conduction type electron emission element, a pair of electrodes, which is formed from an electrically conductive material, e.g., tin oxide (SnO2), gold (Au), indium oxide (In2O3)/tin oxide (SnO2), carbon, or palladium oxide (PdO) and which have a very small area, are disposed in a matrix with a predetermined gap therebetween on a support formed from, for example, glass. A carbon thin film is disposed on each of the electrodes. In the configuration, a row direction wiring is connected to one electrode of the pair of electrodes, and a column direction wiring is connected to the other electrode of the pair of electrodes. When a voltage is applied to the pair of electrodes, an electric field is applied to the carbon thin films opposed to each other with a gap therebetween, and electrons are emitted from the carbon thin film. The resulting electrons are allowed to collide with a luminescent layer on a second panel and, thereby, the luminescent layer is excited to emit light, so that a desired image is obtained. Alternatively, the electron emission source may be composed of a metal/insulating film/metal type element.
It should be understood by those skilled in the art that various modifications, combinations, sub-combinations and alterations may occur depending on design requirements and other factors insofar as they are within the scope of the appended claims or the equivalents thereof.
Number | Date | Country | Kind |
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2006-137398 | May 2006 | JP | national |