Claims
- 1. A configurable device comprising:
a floating-gate field effect transistor that can be configured to perform a computational function upon an input signal that is coupled into a floating-gate of the floating gate field-effect transistor, wherein the computational function is dependent upon a charge that is programmed into the floating-gate of the floating-gate field effect transistor; and a configuration circuit that is used to configure circuit parameters of the floating gate field-effect transistor in order to perform the computational function.
- 2. The device of claim 1, wherein the floating-gate field effect transistor is a floating-gate pFET, and wherein the floating-gate pFET is a part of an analog memory array.
- 3. The device of claim 2, wherein upon programming the charge into the floating-gate of the floating-gate field effect transistor, the computational function is a switching function to switch a signal that is applied between the drain and source terminals of the pFET.
- 4. The device of claim 2 further comprising:
an analog input/output interface circuit; a configurable analog block comprising the floating-gate field effect transistor; and an interconnect circuit that is programmable to provide interconnection between the analog input/output interface circuit and the configurable analog block.
- 5. The device of claim 4, wherein the interconnect circuit is further programmable to provide the charge that is programmed into the floating-gate of the floating-gate pFET.
- 6. The device of claim 1, wherein the computational function comprises multiplying the input signal by a weight that is proportional to the charge that is programmed into the floating-gate of the floating-gate field-effect transistor in order to produce a first order product term.
- 7. The device of claim 1, wherein the computational function comprises multiplying the input signal by a weight that is proportional to the charge that is programmed into the floating-gate of the floating-gate field effect transistor in order to produce a higher order product term.
- 8. The device of claim 1, wherein configuring circuit parameters of the floating-gate field effect transistor comprises providing a charge at a floating gate of the floating-gate field effect transistor, and wherein providing the charge comprises at least one of a tunneling operation and a hot-electron injection operation.
- 9. The device of claim 1, wherein configuring circuit parameters of the floating-gate field effect transistor comprises providing a charge at a floating gate of the floating-gate field effect transistor, and wherein providing the charge comprises a tunneling operation that is performed substantially concurrent to a hot-electron injection operation.
- 10. A method of using a floating-gate pFET as a computation device, the method comprising:
coupling an input signal into a floating-gate of the floating-gate pFET; and providing a charge at the floating-gate of the floating-gate pFET in order to produce an output signal that is a mathematical combination of the input signal and a weight that is proportional to the charge at the floating-gate.
- 11. The method of claim 10, wherein providing the charge at the floating-gate comprises:
providing a tunneling operation to add the charge at the floating-gate of the floating-gate PFET; measuring the charge at the floating-gate of the floating-gate pFET; providing a hot-electron injection operation to remove a portion of the charge at the floating-gate of the floating-gate pFET that is based on measuring the charge, to adjust the charge at the floating-gate of the floating-gate pFET to a desired level of charge.
- 12. The method of claim 11, wherein measuring the charge at the floating-gate of the floating-gate pFET comprises measuring the source-drain current of the floating-gate pFET after decoupling the input signal.
- 13. The method of claim 10, wherein providing the charge at the floating-gate comprises:
providing a tunneling operation to add the charge at the floating-gate of the floating-gate pFET; measuring the output signal; providing a hot-electron injection operation to remove a portion of the charge at the floating-gate of the floating-gate pFET that is based on measuring the output signal, to adjust the charge at the floating-gate of the floating-gate pFET to a desired level of charge.
- 14. The method of claim 13, wherein measuring the output signal comprises measuring the source-drain current of the floating-gate pFET at a first amplitude of the input signal that is coupled into the floating-gate of the floating-gate pFET.
CROSS REFERENCE TO RELATED APPLICATIONS
[0001] This application claims the benefit of U.S. Provisional Patent Application serial No. 60/366,714 filed Mar. 22, 2002, which is incorporated herein by reference in its entirety.
Provisional Applications (1)
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Number |
Date |
Country |
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60366714 |
Mar 2002 |
US |