BACKGROUND OF THE INVENTION
1. Field of the Invention
The present invention relates to a flyback converter system, and more particularly, to a flyback converter system capable of preventing two side switches from being turned on simultaneously.
2. Description of the Prior Art
Recently, because of rapid advances in electronic products, electronic products are shrinking in size and weight. Their functions are also increasingly diversified, but power consumption cannot rise simultaneously. Therefore, design of a power management integrated circuit (IC) becomes more complex, more efficient and demands a higher power density ratio per unit area. A high frequency switching power supply fits the above requirements well.
A flyback converter is one widely used switching power supply. Although the flyback converter may not require circuit isolation, the outputs and inputs of the flyback converter must be isolated in order to increase power efficiency, as well as for safety considerations. The flyback converter is a buck-boost converter with circuit isolation characteristics. A magnetic component of the flyback converter is used to transmit energy, and not as a transformer. In addition, the characteristics of the flyback converter are low cost, circuit design maturity, and simple structure. Therefore, the flyback converter is often used in design of an auxiliary power supply for supplying power to an entire system.
Please refer to FIG. 1. FIG. 1 is a diagram of a conventional flyback converter system 10. The flyback converter system 10 includes a power supply module 101 and a power receiving module 102. The power supply module 101 includes a voltage regulator 1011, a primary side 1012 of the flyback converter system 10, and a primary side switch 1013. The voltage regulator 1011 is used for stabilizing a voltage Vin. The primary side 1012 of the flyback converter system 10 is coupled to the voltage regulator 1011. The primary side switch 1013 is coupled between the voltage regulator 1011 and the primary side 1012 of the flyback converter system 10 for controlling a magnetic flux direction of the primary side 1012. The power receiving module 102 includes a secondary side 1021 of the flyback converter system 10, a secondary side switch 1022, a controller 1023, a load capacitor CL, a load resistor RL, a filtering capacitor Cdc, a resistor RMOT for adjusting turning-on time of the secondary side switch 1022, and a filtering resistor Rdc. The secondary side 1021 of the flyback converter system 10 is used for receiving power from the primary side 1012 of the flyback converter system 10; the secondary side switch 1022 is coupled to the secondary side 1021; and the controller 1023 determines whether the secondary side switch 1022 is turned on or off according to a drain voltage of the secondary side switch 1022.
When the primary side switch 1013 is turned on, electrical current passes through the primary side 1012 of the flyback converter system 10 gradually, and the flyback converter system 10 stores the power in the primary side 1012. Due to a variation of the magnetic flux of the primary side 1012, the primary side 1012 and the secondary side 1021 have opposite polarities. As shown in FIG. 1, both nodes A and B are at high voltages, so an inverse bias is imposed on a parasitic diode of the secondary side switch 1022, such that no power is transferred to the power receiving module 102. On the other hand, when the primary side switch 1013 is turned off, the magnetic flux of the primary side 1012 vanishes, resulting in a low voltage at the node B. Meanwhile, the parasitic diode of the secondary side switch 1022 is turned on, so there is power transferred to the power receiving module 102, current passes through the load resistor RL, and the load capacitor CL is charged.
Please refer to FIG. 2. FIG. 2 is a waveform diagram of the drain voltage of the secondary side switch 1022, a gate voltage of the secondary side switch 1022, a turning-on lasting time, and a turning-off lasting time when the power receiving module 102 has a light load (discontinuous current mode, DCM). When the magnetic flux of the primary side 1012 vanishes, resulting in voltage at B point being lower than a switch turning-on threshold VTH2, the secondary side switch 1022 is turned on and the gate voltage of the secondary side switch 1022 is converted from a low voltage to a high voltage. Because of the light load, current through the secondary side switch 1022 is low. When the magnetic flux direction changes again, the current through the secondary side switch 1022 reduces to zero. If the node B is at a voltage over a switch turning-off threshold VTH1, the secondary side switch 1022 is turned off, and the gate voltage of the secondary side switch 1022 is converted from a high voltage to a low voltage.
Please refer to FIG. 3. FIG. 3 is a waveform diagram of a drain voltage of the secondary side switch 1022, a gate voltage of the secondary side switch 1022, the turned-on lasting time, and the turned-off lasting time when the power receiving module 102 has a heavy load (continuous current mode, CCM). When the magnetic flux of the primary side 1012 vanishes, resulting in voltage at the node B being lower than the switch turning-on threshold VTH2, the secondary side switch 1022 is turned on, and the gate voltage of the secondary side switch 1022 is converted from a low voltage to a high voltage. Because of the heavy load, current through the secondary side switch 1022 is higher than the current in DCM mode. When magnetic flux direction changes again, the current through the secondary side switch 1022 is not reduced to zero. Because of a voltage drop between the drain and the source of the secondary side switch 1022, the switch turning-off threshold VTH1 must be set lower than the switch turning-off threshold VTH1 in DCM mode to avoid voltage of the node B being unable to rise over the switch turning-off threshold VTH1, the secondary side switch 1022 being unable to be turned off, the primary side switch 1013 and the secondary side switch 1022 being turned on simultaneously, and the flyback converter system 10 being damaged.
To sum up, the conventional flyback converter system 10 has two disadvantages. First, when the flyback converter system 10 is designed to operate in DCM mode, the flyback converter system 10 may switch from DCM mode to CCM mode due to sudden introduction of a heavy load. Meanwhile a voltage of the node B cannot rise over the switch turning-off threshold VTH1, so as to prevent the secondary side switch 1022 from being turned off, which would cause the primary side switch 1013 and the secondary side switch 1022 to be turned on simultaneously, and the flyback converter system 10 to be damaged. Second, setting the switch turning-off threshold VTH1 for the heaviest load condition for safety reasons may prevent the flyback converter system 10 from being damaged, however the secondary side switch 1022 may also be turned off too fast in a light load condition, decreasing efficiency of the flyback converter system 10.
SUMMARY OF THE INVENTION
An embodiment of the present invention provides a flyback converter system capable of preventing two side switches from being turned on simultaneously. The flyback converter system comprises a power supply module, and a power receiving module. The power supply module comprises a voltage regulator, a primary side of the flyback converter system, and a primary side switch. The voltage regulator is used for stabilizing a voltage inputting the power supply module; the primary side of the flyback converter system is coupled to the voltage regulator; and the primary side switch is coupled between the voltage regulator and the primary side of the flyback converter system for controlling a magnetic flux direction of the primary side of the flyback converter system. The power receiving module comprises the secondary side of the flyback converter system, the secondary side switch, and the controller. The secondary side of the flyback converter system is used for receiving a power from the primary side of the flyback converter system; the secondary side switch is coupled to the secondary side of the flyback converter system; and the controller comprises a switch on module, a switch off module, and a flip-flop. The switch on module is used for turning on the secondary side switch; the switch off module is used for turning off the secondary side switch; the flip-flop is coupled to the switch on module and the OR gate for turning on or off the secondary side switch according to an output signal of the switch on module and an output signal of the switch off module. The switch turning-off module comprises a first switch off sub-module, a second switch off sub-module, and an OR gate. The first switch off sub-module is used for turning off the secondary side switch according to an impedance of a load coupled to the power receiving module; the second switch off sub-module is used for turning off the secondary side switch according to a period of the secondary side switch; and the OR gate is coupled to the first switch off sub-module and the second switch off sub-module for turning off the secondary side switch according to an output signal of the first switch off sub-module and an output signal of the second switch off sub-module.
Another embodiment of the present invention provides a controller capable of preventing two side switches of a flyback converter system from being turned on simultaneously. The controller comprises a switch on module, a switch off module, and a flip-flop. The switch on module is used for turning on a secondary side switch of the flyback converter system; the switch off module is used for turning off the secondary side switch; the flip-flop is coupled to the switch on module and an OR gate for turning on or off the secondary side switch according to an output signal of the switch on module and an output signal of the switch off module. The switch turning-off module comprises a first switch off sub-module, a second switch off sub-module, and the OR gate. The first switch off sub-module is used for turning off the secondary side switch according to an impedance of a load coupled to a power receiving module; the second switch off sub-module is used for turning off the secondary side switch according to a period of the secondary side switch; and the OR gate is coupled to the first switch off sub-module and the second switch off sub-module for turning off the secondary side switch according to an output signal of the first switch off sub-module and an output signal of the second switch off sub-module.
These and other objectives of the present invention will no doubt become obvious to those of ordinary skill in the art after reading the following detailed description of the preferred embodiment that is illustrated in the various figures and drawings.
BRIEF DESCRIPTION OF THE DRAWINGS
FIG. 1 is a diagram of the conventional flyback converter system.
FIG. 2 is a waveform diagram of the drain voltage of the secondary side switch, the gate voltage of the secondary side switch, the turning-on lasting time, and the turning-off lasting time when the power receiving module with the light load (discontinuous current mode, DCM).
FIG. 3 is a waveform diagram of the drain voltage of the secondary side switch, the gate voltage of the secondary side switch, the turned-on lasting time, and the turned-off lasting time when the power receiving module with the heavy load (continuous current mode, CCM).
FIG. 4 is a diagram of the flyback converter system according to one embodiment of the present invention.
FIG. 5 is a diagram illustrating the controller of the flyback converter system in FIG. 4.
FIG. 6 is a waveform diagram of the current of the secondary side switch, the gate voltage of the secondary side switch, the drain voltage of the secondary side switch, and the output signal of the fourth comparator in CCM mode.
FIG. 7 is a waveform diagram of the drain voltage of the secondary side switch, the output signal of the third comparator, and the voltage of the capacitor of the load detector in SCM mode.
DETAILED DESCRIPTION
Please refer to FIG. 4. FIG. 4 is a diagram of a flyback converter system 40 according to one embodiment of the present invention. The flyback converter system 40 includes a power supply module 401 and a power receiving module 402. The power supply module 401 includes a voltage regulator 4011, a primary side 4012 of the flyback converter system 40, and a primary side switch 4013. The voltage regulator 4011 is used for stabilizing a voltage being inputted into the power supply module 401. The primary side 4012 of the flyback converter system 40 coupled to the voltage regulator 4011 is used for storing input power. The primary side switch 4013 is coupled between the voltage regulator 4011 and the primary side 4012 of the flyback converter system 40 for controlling a magnetic flux direction of the primary side 4012. The power receiving module 402 includes a secondary side 4021 of the flyback converter system 40, a secondary side switch 4022, a controller 4023, a load capacitor CL, a load resistor RL, a filtering capacitor Cdc, and a filtering resistor Rdc. The secondary side 4021 of the flyback converter system 40 coupled to the secondary side switch 4022 is used for receiving power from the primary side 4012 of the flyback converter system 40. The secondary side switch 4022 is used for turning the power receiving module 402 on or off. The controller 4023 determines whether the secondary side switch 4022 is turned on according to a drain voltage of the secondary side switch 4022. The controller 4023 is used for controlling turning off of the secondary side switch 4022 according to the drain voltage of the secondary side switch 4022, the load resistor RL, and a period of the secondary side switch 4022. The controller 4023 is used for controlling enabling of the secondary side switch 4022 according to the load resistor RL. In addition, the filtering capacitor Cdc and the filtering resistor Rdc are used for filtering a noise of an output voltage of the power receiving module 402. After filtering the noise, the output voltage of the power receiving module 402 is used as a supply voltage for the controller 4023.
When the primary side switch 4013 is turned on, current flows through the primary side 4012 of the flyback converter system 40 gradually, and the flyback converter system 40 stores the power in the primary side 4012. Due to a variation of the magnetic flux, the primary side 4012 and the secondary side 4021 have opposite polarities. As shown in FIG. 4, both nodes A and B are at high voltages, so there is an inverse bias imposed on a parasitic diode of the secondary side switch 4022, so that no power is transferred to the power receiving module 402. On the other hand, when the primary side switch 4013 is turned off, the magnetic flux vanishes, resulting in low voltage at the node B. Meanwhile, the parasitic diode of the secondary side switch 4022 is turned on, so power is transferred to the power receiving module 102, current flows through the load resistor RL, and the load capacitor CL is charged.
Please refer to FIG. 5 and FIG. 4. FIG. 5 is a diagram illustrating the controller 4023 of the flyback converter system 40 capable of preventing two side switches 4013, 4022 from being turned on simultaneously. The controller 4023 includes a switch on module 501, a switch off module 502, a flip-flop 503, and an enabling switch module 504. The switch on module 501 is used for turning on the secondary side switch 4022, and the switch off module 502 is used for turning off the secondary side switch 4022. The switch off module 502 includes a first switch off sub-module 5021, a second switch off sub-module 5022, and an OR gate 5023. The first switch off sub-module 5021 is used for turning off the secondary side switch 4022 according to an impedance of the load resistor RL coupled to the power receiving module 402. The second switch off sub-module 5022 is used for turning off the secondary side switch 4022 according to the period of the secondary side switch 4022. The OR gate 5023 is coupled to the first switch off sub-module 5021 and the second switch off sub-module 5022 for outputting a signal to a reset terminal of the flip-flop 503 according to an output signal of the first switch off sub-module 5021 and an output signal of the second switch off sub-module 5022. The flip-flop 503 is coupled to the switch on module 501 and the OR gate 5023. The flip-flop 503 is used to output a control signal SYNC for turning on or off the secondary side switch 4022 according to an output signal of the switch on module 501 and an output signal of the switch off module 502. The flip-flop 503 may be a set-reset (SR) flip-flop. The enabling switch module 504 is used for enabling the secondary side switch 4022 according to the impedance of the load resistor RL.
The switch on module 501 includes a second comparator 5011, a switch kept on device 5012, a second AND gate 5013, and a kept on time adjustment element 5014. A positive input terminal of the second comparator 5011 is coupled to a power supply VTH2 (a switch turning-on threshold), and a negative input terminal of the second comparator 5011 is coupled to a drain of the secondary side switch. A reset input terminal of the switch kept on device 5012 is coupled to a positive output terminal of the flip-flop 5013. A first input terminal of the second AND gate 5013 is coupled to an output terminal of the second comparator 5011, and an output terminal of the second AND gate 5013 is coupled to a signal input terminal of the flip-flop 503. A first terminal of the kept on time adjustment element 5014 is coupled to the switch kept on device 5012, and a second terminal of the kept on time adjustment element 5014 is coupled to ground.
The first switch off sub-module 5021 includes a first comparator 50211, a switch kept off device 50212, and a first AND gate 50213. A positive input terminal of the first comparator 50211 is coupled to the drain of the secondary side switch 4022, a negative input terminal of the first comparator 50211 is coupled to a power supply VTH1 (a switch turning-off threshold). An output terminal of the switch kept off device 50212 is coupled to a second input terminal of the second AND gate 5013, and a reset input terminal of the switch kept off device 50212 is coupled to an inverse output terminal of the flip-flop 503. A first input terminal of the first AND gate 50213 is coupled to an output terminal of the first comparator 50211, a second input terminal of the first AND gate 50213 is coupled to an output terminal of the switch kept on device 5012, and an output terminal of the first AND gate 50213 is coupled to a first input terminal of the OR gate 5023.
The second switch off sub-module 5022 includes a time recorder 50221, a fourth comparator 50222, and a period threshold adjuster 50223. The time recorder 50221 is used for recording length of the period of the secondary side switch 4022 and outputting lengths of two sequential periods of the secondary side switch 4022. The fourth comparator 50222 is coupled to the time recorder 50221 and a second input terminal of the OR gate 5023. The fourth comparator 50222 is used for receiving the lengths of the two sequential periods and comparing the lengths of the two sequential periods, and used for outputting a logic signal to the second input terminal of the OR gate 5023 according to a difference between a period threshold and a difference of the lengths of the two sequential periods. The period threshold adjuster 50223 is used for adjusting the period threshold. A first terminal of the period threshold adjuster 50223 is coupled to the fourth comparator 50222 and a second terminal of the period threshold adjuster 50223 is coupled to ground.
The enabling switch module 504 includes a third comparator 5041, and a load detector 5042. A positive input terminal of the third comparator 5041 is coupled to the drain of the secondary side switch 4022, a negative input terminal of the third comparator 5041 is coupled to a power supply VTH3, and an output terminal of the third comparator 5041 is coupled to a set input terminal of the switch kept off device 50212 and an input terminal of the time recorder 50221. An input terminal of the load detector 5042 is coupled to the output terminal of the third comparator 5041, and the load detector 5042 is used for outputting a disable signal which can disable the switch on module 501, the switch off module 502, and the flip-flop 503 when the load is very light.
Please refer to FIG. 2 and FIG. 4. In DCM mode, when the primary side switch 4013 is turned off, the magnetic flux vanishes resulting in voltage at the node B being lower than a switch turning-on threshold VTH2, and the secondary side switch 4022 is turned on. Because of the light load, current flowing through the secondary side switch 4022 is low. When the magnetic flux direction changes again, the current through secondary side switch 4022 is reduced to zero. If the node B is at a voltage higher than a switch turning-off threshold VTH1, the secondary side switch 4022 is turned off. Because the current through the secondary side switch 4022 is low and a drain voltage of the secondary side switch 4022 is not very low, when the primary side switch 4013 is turned on again, voltage at the node B easily rises over the switch turning-off threshold VTH1, so as to prevent the primary side switch 4013 and the secondary side switch 4022 from being turned on simultaneously, and prevent the flyback converter system 40 from being damaged.
As mentioned above, the primary side switch 4013 and the secondary side switch 4022 are not turned on simultaneously in DCM mode, therefore the operation of the controller 4023 is not described again. Please refer to FIG. 5. In CCM mode, when the primary side switch 4013 is turned off, the magnetic flux vanishes, resulting in voltage at the node B of the power receiving module 402 being lower than the switch turning-on threshold VTH2 (that is, VD is a low voltage). Meanwhile, the second comparator 5011 outputs a logic-high voltage signal to the second AND gate 5013, and the switch kept off device 50212 also outputs a logic-high voltage signal to the second AND gate 5013. So, the second AND gate 5013 outputs a logic-high voltage signal to the signal input terminal of the flip-flop 503. Due to VD being a low voltage, the first comparator 50211 outputs a logic-low voltage signal to the first AND gate 50213, and the switch kept on device 5012 also outputs a logic-low voltage signal to the first AND gate 50213 for a period of time to ensure the first AND gate 50213 outputs a logic-low voltage signal. That is to say, the first switch off sub-module 5021 may not interfere with the secondary side switch 4022 being turned on. Due to VD being a low voltage, the third comparator 5041 outputs a logic-low voltage signal, and both the enabling switch module 504 and the second switch off sub-module 5022 are inactive.
Please refer to FIG. 5. In CCM mode, when the primary side switch 4013 is turned on again, the magnetic flux changes, resulting in the node B of the power receiving module 402 being at a high voltage (that is, VD is a high voltage). Therefore, the switch on module 501 outputs a logic-low voltage signal to the signal input terminal of the flip-flop 503 (and the switch kept on device 5012 also outputs a logic-low voltage signal to the second AND gate 5013 to ensure the signal input terminal of the flip-flop 503 receives the logic-low voltage signal). Due to VD being a high voltage, the first comparator 50211 should output a logic-high voltage signal to the first AND gate 50213. However, in CCM mode, a current through the secondary side switch 4022 is larger than a current in DCM mode, so voltage at VD is not higher than VTH1 (a switch turning-off threshold), which would cause the secondary side switch 4022 to be unable to be turned off via the first switch off sub-module 5021. Due to VD being a high voltage, when voltage at VD is higher than VTH3, the third comparator 5041 outputs a logic-high voltage signal to the set terminal of the switch kept off device 50212 and the time recorder 50221. Then, the switch kept off device 50212 outputs a logic-low voltage signal to the second AND gate 5013, and the time recorder 50221 records a length of a time interval until voltage at VD is higher than VTH3 again. The length of the time interval is defined as a period Tperiod of the secondary side switch 4022. Then the fourth comparator 50222 compares lengths of two sequential periods of the secondary side switch 4022. When a difference between the lengths of the two sequential periods is less than the period threshold Tblanking, the fourth comparator 50222 outputs a logic-high voltage signal to the OR gate 5023, and the OR gate 5023 outputs a logic-high voltage signal to the reset input terminal of the flip-flop 503, which would cause a logic-low voltage at SYNC, resulting in the secondary side switch 4022 being turned off (please refer to FIG. 6). The first switch off sub-module 5021 and the second switch off sub-module 5022 prevent the primary side switch 4013 and the secondary side switch 4022 from being turned on simultaneously.
Please refer to FIG. 5. A turning-on lasting time adjusting resistor Rhold of the kept on time adjustment element 5014 is used for adjusting the turning-on lasting time. A period threshold adjusting resistor Rblank of the period threshold adjuster 50223 is used for adjusting the period threshold.
In addition to DCM mode and CCM mode, the flyback converter system 40 may have a very light load (skip cycle mode, SCM). When the power receiving module 402 has the very light load, the primary side switch 4013 may not be turned on in every period. Therefore, the enabling switch module 504 including the load detector 5042 is provided. When the flyback converter system 40 is in SCM mode, the load detector 5042 may disable the switch on module 501, the switch off module 502, and the flip-flop 503. When the flyback converter system 40 leaves SCM mode, the load detector 5042 may enable the switch on module 501, the switch off module 502, and the flip-flop 503 again. Please refer to FIG. 5 and FIG. 7. After the primary side switch 4013 is turned on, voltage at VD is higher than VTH3 while the third comparator 5041 outputs the logic-high voltage signal. After the primary side switch 4013 is turned off, voltage at VD is lower than VTH3 while the third comparator 5041 outputs the logic-low voltage signal. When the third comparator 5041 outputs the logic-high voltage signal, a capacitor CSCM of the load detector 5042 is charged. When the third comparator 5041 outputs the logic-low voltage signal, the capacitor CSCM of the load detector 5042 is discharged. In SCM mode, the primary side switch 4013 may not be turned on in every period, so voltage of the capacitor CSCM is very low; when leaving SCM mode, the voltage of the capacitor CSCM raises persistently. Determination of whether the flyback converter system 40 is in SCM mode or not may be performed according to the voltage of the capacitor CSCM through a hysteresis effect. When the voltage of the capacitor CSCM is higher than VHSCM, the flyback converter system 40 leaves SCM mode; when the voltage of the capacitor CSCM is lower than VLSCM, the flyback converter system 40 is in SCM mode. VHSCM and VLSCM may be determined by experiment.
In summary, compared to conventional design, in which VTH1 is adjusted according to a load, in the embodiments above, VTH1 may be set to a negative value approaching zero. Therefore, even if the flyback converter system 40 is in CCM mode, and the current through the secondary side switch 4022 becomes large, resulting in the secondary side switch 4022 being not turned off, the period of the secondary side switch 4022 may still be detected via the second switch off sub-module 5022, so as to force the secondary side switch 4022 to be turned off before the primary side switch 4013 is turned on, and to ensure normal operation of the flyback converter system 40. In addition, the embodiments further provide the enabling switch module 504. When the load is very light, the enabling switch module 504 may disable the switch on module 501, the switch off module 502, and the flip-flop 503 for economizing power.
Those skilled in the art will readily observe that numerous modifications and alterations of the device and method may be made while retaining the teachings of the invention.
Patent Grant
8159838
