Claims
- 1. An FM demodulating circuit arrangement comprising:
- an input for receiving an FM signal to be demodulated;
- delay means coupled to said input for delaying the received FM signal by a preset time delay;
- a signal combining circuit coupled to said input and to said delay means for combining the delayed and undelayed FM signals so as to derive a combined signal having a mean value which is proportional to the frequency of the received FM signal; and
- filter means coupled to said signal combining circuit for filtering the combined signal to derive the mean value thereof, such filtered signal constituting a demodulated signal the amplitude of which corresponds to the frequency of the received FM signal;
- characterized in that:
- said demodulating circuit arrangement further comprises a datum level detection circuit coupled to said filter means to receive the demodulated signal, detect a selected datum level thereof, and provide a control signal corresponding to said datum level to said delay means; and
- the preset time delay of said delay means is adjustable by said control signal, thereby adjusting the proportionality factor between the frequency swing of the FM signal and the amplitude of the demodulated signal, so as to maintain a substantially constant value of said datum level of the demodulated signal;
- whereby the maximum amplitude of the demodulated signal is stabilized relative to said datum level thereof despite variations in the maximum frequency swing of the FM signal.
- 2. An FM demodulating circuit arrangement as claimed in claim 1, wherein said selected datum level of the demodulated signal is the minimum voltage level of such signal.
- 3. An FM demodulating circuit arrangement as claimed in claim 1, further comprising a frequency swing detection circuit coupled to the input of said circuit arrangement and to said delay means for detecting whether the phase shift between the delayed FM signal and the received FM signal exceeds a limit value corresponding to a predetermined limiting frequency swing of the received FM signal, said limit value being determined by said preset time delay; whereby adjustment of said preset time delay by the control signal from said datum level detection circuit also serves to adjust said limit value.
Priority Claims (1)
Number |
Date |
Country |
Kind |
3834118 |
Oct 1988 |
DEX |
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Parent Case Info
This is a continuation of application Ser. No. 07/410,393, filed Sept. 20, 1989 and now abandoned.
US Referenced Citations (3)
Foreign Referenced Citations (6)
Number |
Date |
Country |
3702854 |
Aug 1988 |
DEX |
3702855 |
Aug 1988 |
DEX |
3702856 |
Aug 1988 |
DEX |
3706319 |
Sep 1988 |
DEX |
54-34746 |
Mar 1979 |
JPX |
54-34747 |
Mar 1979 |
JPX |
Continuations (1)
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Number |
Date |
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Parent |
410393 |
Sep 1989 |
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