Claims
- 1. A focus detection apparatus comprising:
- a) a detector for repeatedly performing focus detection and outputting a defocus signal upon every focus detection;
- b) a processing circuit for invalidating the defocus signal when the defocus signal from said detector falls within a predetermined range; and
- c) a control circuit for disabling said processing circuit when a value falling outside the predetermined range is output as a defocus signal from said detector after invalidation is determined by said processing circuit.
- 2. A focus detection apparatus according to claim 1, wherein said processing circuit invalidates the defocus signal, which is repeatedly output from said detector, when said processing circuit determines that the defocus signal falls within the predetermined range for plural focus detections.
- 3. A focus detection apparatus according to claim 2, wherein said processing circuit invalidates the defocus signal when it determines that the defocus signal continuously falls within the predetermined range for plural focus detections.
- 4. A focus detection apparatus according to claim 1, wherein, when said control circuit receives a defocus signal falling outside the predetermined range after said processing circuit invalidated a defocus signal falling within the predetermined range, said control circuit validates the defocus signal and thereafter disables said processing circuit from invalidating a defocus signal from said detector.
- 5. A focus detection apparatus according to claim 2, wherein, when said control circuit receives a defocus signal falling outside the predetermined range after said processing circuit invalidated a defocus signal falling within the predetermined range, said control circuit validates the defocus signal and thereafter disables said processing circuit form invalidating a defocus signal form said detector.
- 6. A focus detection apparatus according to claim 3, wherein, when said control circuit receives a defocus signal falling outside the predetermined range after said processing circuit invalidated a defocus signal falling within the predetermined range, said control circuit validates the defocus signal and thereafter disables said processing circuit form invalidating a defocus signal from said detector.
Priority Claims (1)
Number |
Date |
Country |
Kind |
2-7770 |
Jan 1990 |
JPX |
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Parent Case Info
This application is a division of application Ser. No. 07/641,509 filed Jan. 15, 1991, now U.S. Pat. No. 5,189,465.
US Referenced Citations (15)
Foreign Referenced Citations (2)
Number |
Date |
Country |
2055005 |
Feb 1981 |
GBX |
2223140 |
Mar 1990 |
GBX |
Divisions (1)
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Number |
Date |
Country |
Parent |
641508 |
Jan 1991 |
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