Patent Application
20090308440
The present invention relates generally to the field of solar cells. More particularly, the present invention relates to solar cell devices and methods of their formation.
There are two major steps in making solar cells. The first step is to form a substrate that is configured to generate electron-hole pairs upon the reception of light. One example of such a substrate includes a p-n junction. The second step is to form conductive contacts on the substrate that are configured to conduct the charge from the separated electrons so that the charge can be conducted and carried away.
Currently, diffusion is used in the first step to form p-n junctions. A paste of dopant is placed on the surface of the substrate. It is then heated up, driving the dopant into a particular depth and forming the junction. Alternatively, a phosphorous dominant gas is introduced to the substrate. Heating is then used to drive the phosphorous into the substrate. In the second step, contact lines are screen printed onto the surface of the junction.
The use of diffusion of dopant from the surface into the substrate is plagued by problems. One of the main problems is the accumulation of unactivated dopants near the surface as the dopants are driven into the bulk of the material, which can vary the resistivity at different depths and regions of the substrate and thus lead to varying light absorption and electron-hole generation performance. In particular, one problem encountered is the lack of utilization of the blue light as the result of formation of the so-called “dead layer.”
Additionally, lateral positioning of the dopants across the substrate is especially difficult as the line widths and wafer thicknesses are getting smaller. For example, for selective emitter applications, the solar cell industry is expected to require dopant lateral placements from 200 microns down to less than 50 microns. Such placement can be very difficult for the present methodology of diffusion and screen printing. Moreover, as wafers get thinner, from 150-200 microns of today down to less than 20 microns, vertical and batch diffusion and screen printing becomes extremely difficult or even impossible.
Furthermore, the use of diffusion has been unable to provide the ideal levels of dopant concentration and resulting resistivity. The electron-hole pair generation region of the solar cell would ideally have a low concentration of dopant and a high resistivity level, while the contact region (near or at the surface) of the solar cell would ideally have a high concentration of dopant and a low resistivity level. Diffusion is unable to address each region separately and is limited to a sheet resistance of about 50 Ohms/square (Ω/□) for both regions, which is not quite high enough for the electron-hole pair generation region and not quite low enough for the contact region.
The present invention provides methods for addressing the various ohmic losses arising from the use of older processes of doping solar substrate. The present invention involves modifying the resistance of the substrate, contacts, busbars and fingers, the contact resistance of the metal-silicon interface, the resistance of backside metallization, and achieving the desired resistivity under the grid contact and in between the fingers. Moreover, the advantageous formation of a selective emitter and its ability to improve performance is possible through the use of the present invention. The present invention is capable of being applied to grown single or mono-crystalline silicon, poly or multi-crystalline silicon, as well as very thin silicon or very thin film deposited silicon or other materials used for solar cell formation and other applications. It is also capable of being extended to atomic species placement for any other material used in the fabrication of junctions and/or contacts.
Application-specific ion implantation and annealing systems and methods can be employed by the present invention in order to provide the appropriate and independent placement and concentration of dopant both within the bulk of the material and laterally positioned across the substrate. The use of accurate and highly accurately placed dopant and tailoring of dopant atomic profile is described below. Methods are described that address the requirements for heavily doped (10-40 Ohms/square) regions under the grid line, as well as methods to achieve lightly doped (80-160 Ohms/square) regions in between grid fingers. Ideal sheet resistance levels of approximately 25 Ohms/square for the contact region under the grid line, which translates to a dopant concentration of approximately 1E20 per cubic centimeter, and approximately 100 Ohms/square for the electron-hole pair generation region between the grid fingers and/or below the contact region, which translates to a dopant concentration of approximately 1E19 per cubic centimeter, are able to be achieved through the use of the present invention.
Additionally, through the use of tailored parameters, the atomic dopant profile is simultaneously matched to provide the electrical junctions at the appropriate depth against the substrate background doping levels and to provide the resistivity required for the formation of the contacts on the surface. Use of retrograde doping and flat atomic profile (box junctions) are also deployed, if desired. This methodology provides a simple, effective and inexpensive means for formation of a selective emitter and appropriate resistivity to enhance solar cells efficiency performance.
The dopants can be activated through the use of a traditional furnace anneal with long time anneal, the use of rapid annealing, such as rapid thermal anneal (RTA), or the use of very rapid temperature rise and cool down methods, such as laser annealing, flash lamp annealing, or employing a firing furnace at the end of the solar cell fabrication, which can employ a lower temperature when used with the implantation of the present invention. Controlled use of annealing time and temperature provides further enhancement of atomic profile within the substrate. In the present invention, shorter time anneal is preferably used to ensure that dopant placement is not altered, but that full or near full activation is achieved.
In one aspect of the invention, a method of forming a solar cell is provided. A semiconducting wafer is provided having a pre-doped region. A first ion implantation of a dopant into the semiconducting wafer is performed to form a first doped region over the pre-doped region. The first ion implantation has a concentration-versus-depth profile. A second ion implantation of a dopant into the semiconducting wafer is performed to form a second doped region over the pre-doped region. The second ion implantation has a concentration-versus-depth profile different from that of the first ion implantation. At least one of the first doped region and the second doped region is configured to generate electron-hole pairs upon receiving light, and the first and second ion implantations are performed independently of one another.
In some embodiments, a p-n junction is formed between the pre-doped region and the at least one of the first doped region and the second doped region that is configured to generate electron-hole pairs. In some embodiments, the semiconducting wafer is provided as a silicon substrate.
In some embodiments, the first doped region formed by the first ion implantation has a sheet resistance in a range of approximately 80 Ohms/square to approximately 160 Ohms/square. In some embodiments, the second doped region formed by the second ion implantation has a sheet resistance in a range of approximately 10 Ohms/square to approximately 40 Ohms/square. In some embodiments, the first doped region formed by the first ion implantation has a sheet resistance in a range of approximately 80 Ohms/square to approximately 160 Ohms/square, and the second doped region formed by the second ion implantation has a sheet resistance in a range of approximately 10 Ohms/square to approximately 40 Ohms/square.
In some embodiments, the method further comprises the step of disposing metal contact lines on the surface of the semiconducting wafer, wherein the metal contact lines are configured to conduct electrical charge from at least one of the first and second doped regions. In some embodiments, the pre-doped region is p-type doped and the first and second doped regions are n-type doped. In some embodiments, the method further comprises the step of performing an annealing process on the semiconducting wafer after at least one of the ion implantation steps.
In another aspect of the invention, a method of forming a solar cell is provided. A semiconducting wafer is provided having a pre-doped region. A homogeneously doped region is formed in the semiconducting wafer over the pre-doped region by performing a first ion implantation of a dopant into the semiconducting wafer, wherein a p-n junction is formed between the pre-doped region and the homogeneously doped region and the homogeneously doped region is configured to generate electron-hole pairs upon receiving light. A plurality of selectively doped regions are formed in the semiconducting wafer over the homogeneously doped region by performing a second ion implantation of a dopant into the semiconducting wafer. The first and second ion implantations are performed independently of one another, and the selectively doped regions have a higher concentration of dopant than the homogeneously doped region.
In some embodiments, the semiconducting wafer is provided as a silicon substrate. In some embodiments, the homogeneously doped region formed by the first ion implantation has a sheet resistance in a range of approximately 80 Ohms/square to approximately 160 Ohms/square. In some embodiments, each one of the selectively doped regions formed by the second ion implantation has a sheet resistance in a range of approximately 10 Ohms/square to approximately 40 Ohms/square. In some embodiments, the homogeneously doped region formed by the first ion implantation has a sheet resistance in a range of approximately 80 Ohms/square to approximately 160 Ohms/square, and each one of the selectively doped regions formed by the second ion implantation has a sheet resistance in a range of approximately 10 Ohms/square to approximately 40 Ohms/square.
In some embodiments, the method further comprises the step of disposing metal contact lines on the surface of the semiconducting wafer, wherein the metal contact lines are aligned over the plurality of selectively doped regions and are configured to conduct electrical charge from the plurality of selectively doped regions.
In some embodiments, the method further comprises the step of forming a metallic seed layer near the surface of the semiconducting wafer, wherein the metallic seed layer is configured to act as a transition layer between the selectively doped regions and the metal contact lines. In some embodiments, the metallic seed layer comprises a silicide. In some embodiments, the step of forming the metallic seed layer comprises ion implanting at least one material into the semiconducting wafer, wherein the at least one material is chosen from the group consisting of: Ni, Ta, Ti, W, and Cu.
In some embodiments, the pre-doped region is p-type doped and the homogeneously and selectively doped regions are n-type doped. In some embodiments, the method further comprises the step of performing an annealing process on the semiconducting wafer after at least one of the ion implantation steps. In some embodiments, the method further comprises the step of forming an anti-reflective coating layer over the homogeneously doped region.
In some embodiments, the selectively doped regions are implanted in the semiconducting wafer at predetermined locations using a mask, wherein the mask comprises openings that are aligned with the predetermined location. In some embodiments, the mask is a contact mask disposed on the surface of the semiconducting wafer during the second ion implantation. In some embodiments, the mask is a physical mask disposed a predetermined distance above the surface of the semiconducting wafer during the second ion implantation. In some embodiments, the selectively doped regions are implanted in the semiconducting wafer at predetermined locations using a shaped ion beam, wherein the shaped ion beam is aligned with the predetermined locations. In some embodiments, the selectively doped regions are laterally spaced apart from one another a distance in the range of approximately 1 mm to approximately 3 mm.
In yet another aspect of the invention, a solar cell is provided. The solar cell comprises a semiconducting wafer, a homogeneously doped region, a p-n junction, a plurality of selectively doped regions, and a plurality of metal contacts. The semiconducting wafer has a background doped region. The homogeneously doped region is formed in the semiconducting wafer over the background doped region by ion implanting a dopant into the semiconducting wafer and has a sheet resistance of between approximately 80 Ohms/square and approximately 160 Ohms/square. The p-n junction is formed between the homogeneously doped region and the background doped region. The selectively doped regions are formed in the semiconducting wafer over the homogeneously doped region by ion implanting a dopant into the semiconducting wafer. Each one of the selectively doped regions has a sheet resistance of between approximately 10 Ohms/square and approximately 40 Ohms/square. The metal contacts are disposed on the surface of the semiconducting wafer and are aligned over the plurality of selectively doped regions. The metal contacts are configured to conduct electrical charge from the plurality of selectively doped regions.
In some embodiments, the semiconducting wafer is a silicon substrate. In some embodiments, the homogeneously doped region formed by the first ion implantation has a sheet resistance of approximately 100 Ohms/square. In some embodiments, each one of the selectively doped regions formed by the second ion implantation has a sheet resistance of approximately 25 Ohms/square.
In some embodiments, the solar cell further comprises a metallic seed layer disposed over the selectively doped regions and under the metal contacts. In some embodiments, the metallic seed layer comprises a silicide. In some embodiments, the metallic seed layer comprises at least one material chosen from the group consisting of: Ni, Ta, Ti, W, and Cu.
In some embodiments, the pre-doped region is p-type doped and the homogeneously and selectively doped regions are n-type doped. In some embodiments, the solar cell further comprises an anti-reflective coating layer disposed over the homogeneously doped region. In some embodiments, the selectively doped regions are laterally spaced apart from one another a distance in the range of approximately 1 mm to approximately 3 mm.
The following description is presented to enable one of ordinary skill in the art to make and use the invention and is provided in the context of a patent application and its requirements. Various modifications to the described embodiments will be readily apparent to those skilled in the art and the generic principles herein may be applied to other embodiments. Thus, the present invention is not intended to be limited to the embodiment shown but is to be accorded the widest scope consistent with the principles and features described herein.
In operation, as light comes into the semiconductor material of the wafer 110 through the exposed surface 140 between the contact lines 120 and fingers 130, it is converted into electron-hole pairs, typically within the n-type doped region 160. The electrons go one way, getting attracted into the contacts 120, while the holes go the other way, towards the p-type doped region 150. The more dopant there is within a particular region, the more the electron-hole pairs are recaptured within that region, resulting in more lost electricity. Therefore, it is beneficial to control the level of doping for different regions. In regions where the light is to be converted into electron-hole pairs, the level of doping should be relatively low. In regions where the charge is to go through the contact lines 120, the level of doping should be high. In
As a result of minimizing the dopant concentration (thereby, maximizing the resistivity) of the homogeneous emitter region and maximizing the dopant concentration (thereby, minimizing the resistivity) of the selective emitter regions, the ability of the solar cell to transfer the generated electrons from the homogeneous emitter region through the selective emitter regions to the contact lines is increased, while the risk of losing electricity to electron-hole pair recombination is reduced. Additionally, although bigger contact lines can conduct more electricity, they also block more light from entering the solar cell and being converted into electrons. By maximizing the dopant concentration of the selective emitter regions near the contact lines, the contact lines can actually be made thinner, thereby allowing more light to enter the solar cell, while improving the solar cells ability to transfer the electrons from the electron-hole pair generating region to the contact lines.
In some embodiments, the homogeneously doped region is doped to have a sheet resistance in a range of approximately 80 Ohms/square to approximately 160 Ohms/square, while the selectively doped regions are doped to have a sheet resistance in a range of approximately 10 Ohms/square to approximately 40 Ohms/square. In some embodiments, the homogeneously doped region is doped to have a sheet resistance of approximately 100 Ohms/square, while the selectively doped regions are doped to have a sheet resistance of approximately 25 Ohms/square.
As previously mentioned, the prior art has been unable to attain these configurations. In order to achieve these or similar dopant concentration and sheet resistance levels, and their accompanying benefits, the present invention employs independently performed ion implantations in the formation of these different regions.
At a step 210, a semiconducting wafer is provided. In some embodiments, the semiconducting wafer is provided as a silicon substrate (having a mono- or poly-crystalline structure). The semiconducting wafer is provided already having been doped. In some embodiments, the semiconducting wafer is pre-doped with a p-type dopant, thereby creating a p-type background region on which the other aspects of the solar cell can be formed. In other embodiments, the semiconducting wafer is pre-doped with an n-type dopant, thereby creating a n-type background region on which the other aspects of the solar cell can be formed. In some embodiments, the pre-doped background region is doped to have a sheet resistance in a range of approximately 30 Ohms/square to approximately 70 Ohms/square.
At a step 220, the semiconducting wafer is homogeneously doped with a low concentration level of dopant using an ion implantation process. In some embodiments, this step is achieved through blanket implantation of dopant in the pre-doped semiconducting wafer.
The dopant is implanted and the junction is formed to and at a predetermined depth, such as according to manufacturer requirements. In some embodiments, the depth and level of dopant is determined by the specific PV manufacturer resistivity and junction requirements. Various models can be used to pre-analyze and form a tailored atomic profile for this purpose. The information can be fed into the implant and anneal systems to meet the requirements.
The distance of the junction from the surface of the wafer is determined by the amount of energy used in the ion beam during the ion implantation of the dopant. In some embodiments, the amount of energy is in the range of 1 to 150 KeV, depending on the desired specifications for the solar cell device. The dopant concentration, and consequently the sheet resistance, of any of the regions being implanted with dopant, whether they be homogeneously implanted or selectively implanted, can be determined by the beam current of the ion implantation system. The species of the gas being ionized in the ion implantation system for the ion beam determines whether the doping will be either n-type or p-type. For example, phosphorous and arsenic each result in n-type doping, while boron results in p-type doping.
It is contemplated that various ion implantation systems can be used in the present invention. In some embodiments, plasma implant technology is employed. In some embodiments, an implantation system (not shown) having a high productivity is used for the doping of the different regions. Such an implantation system is the subject of co-pending U.S. Provisional Application Ser. No. 61/131,688, filed Jun. 11, 2008, entitled “APPLICATIONS SPECIFIC IMPLANT SYSTEM FOR USE IN SOLAR CELL FABRICATIONS,” which is hereby incorporated by reference in its entirety as if set forth herein. In some embodiments, either a spot beam or a widened beam is used to provide full coverage across the wafer at a productivity of one-thousand or more wafers per hour.
At a step 230, the semiconducting wafer is selectively doped with a high concentration level of dopant using a direct and/or plasma ion implantation process, thereby forming a selective emitter region on the wafer. The ion implantation process used in the step 230 is preferably independent of the ion implantation process used in the step 220.
In this selective doping step, the appropriate depth and doping level, through the adjustment of implant energy and dose, are selected to provide very high dopant concentration (low resistivity) at or near the surface of the substrate. This can be achieved through multiple implants at varying energies and doses or as a continuum of variability to provide a tailored profile, which will be discussed in further detail below with respect to
The purpose of the selective doping is to achieve the surface resistivity required for the subsequent contact formation. As the requirements for the fabrications of the contact migrates from screen printing to lithography or ink jet printing or other novel methods, the surface resistivity can be adjusted to meet the requirements. Additionally, if any surface passivation method is deployed, the implant conditions can be adopted to cope to such variations.
The placement of dopant in the appropriate lateral position underneath the subsequent grid lines and at the appropriate concentration level is extremely advantageous. The formation of a plurality of highly doped regions in the semiconducting wafer over the homogeneously doped region can be achieved through various methods.
It is noted that in some embodiments, such as in
It is also noted that the implantation steps 220 and 230 can be repeated as many times as necessary to achieve the desired results.
Optionally, at a step 235, a contact seed layer, preferably metallic, is implanted over the selectively doped regions in order to create a transition layer between the semiconducting wafer and the metal (or otherwise conductive) contact that will eventually be disposed on the surface of the semiconducting wafer. The formation of this contact seed layer can serve to affect the work function of the contact/semiconductor interface, to improve the electrical contact between the semiconductor material and metal contact.
At a step 240, metal (or otherwise conductive) contact lines are placed on the surface of the semiconducting wafer. In some embodiments, the metal contact lines are formed on the surface of the semiconducting wafer, such as by printing, or using photolithography and plating. However, it is contemplated that other processes can be used to dispose the metal contacts onto the semiconducting wafer.
Optionally, at a step 245, an anti-reflective coating layer is formed over the homogeneously doped region. In some embodiments, the anti-reflective coating layer is formed by depositing an anti-reflective coating material over the homogeneously doped region. Materials that can be used to form the anti-reflective coating layer include, but are not limited to, SiO2 and Si3N4). In some embodiments, the already-formed anti-reflective coating layer on the wafer can be enhanced by applying ion implantation to it.
At a step 250, an annealing process is performed on the wafer. In some embodiments, the annealing step heats the semiconducting wafer to a temperature near, but below, its melting point and restores damage that was inflicted upon the crystal structure of the semiconducting wafer due to any of the ion implantation steps. The annealing step can comprise furnace annealing. Alternatively, a laser annealing or flash lamp annealing can be used in place of the furnace annealing. Although
For some of the methods above, provision of a registration mark on the semiconducting wafer may be used to align the formation of features. This can be achieved prior to the implant through various methods and is dependent on the capability of the PV manufacturer and their requirements. A simple method would be to laser scribe registration marks inline to present semiconductor registration marks. However the requirements for photovoltaic applications are not as stringent as semiconductors, and thus a simple registration mark will suffice.
The doping under the grid lines can also be tailored, laterally, to form a low resistivity region that can be potentially larger or smaller than the contact grid lines. This can be advantageous as it can reduce the potential of electrical leakage from the grid lines to the rest of the wafer. Such leakage can reduce the efficiency of cell performance. An adjustment of the implant beam dimension or physical mask can provide such capability. The magnitude of such leakage can be reduced or eliminated through the advantageous placement of dopant laterally as well.
The tailoring of the atomic profile can further be enhanced by the use of additional implants at various energies (depth) and dose (doping levels) to achieve the optimal profile for best achievable cell performance. In some embodiments, such combination implants are a series of lower dose and faster implants that can provide high productivity and tailored profiles. Such methods can be extended to the formation of a box junction, providing a flat top profile with an abrupt deep junction drop in atomic distribution. Alternatively the deep junctions can be graded to provide a gentle transition from high to low doping regions, and thus prevent the formation of electrical barriers.
Additional implants can also be used at the end of the PV fabrication process as a remediation implant. This can be in the traditional sense of the retrograde implants as deployed in semiconductor applications. It can also be used where an implant is carried out subsequent to formation of the surface and deep junction resistivity or at the final completion of the cell fabrication. If a cell does not meet the final testing specifications, a trimming implant as a remediation step can be used to improve the performance. Alternatively, a very light doping around the edges of the grid line could be used to prevent further leakage, if the final testing shows an adverse effect.
The employment by the present invention of multiple independent dopant implants through ion implantation enables the shaping of an atomic profile of a solar cell device according to the user's preferences or requirements. Some users may prefer a boxed junction (or box profile) as an ideal abrupt junction at a certain depth. Other users may prefer a rolling profile from the surface down to the junction depth (background doping). Another group of users may prefer a very peaky profile at a shallow depth, followed by a gentle rolling profile all the way to the background doping. So far, those skilled in the art have not been able to achieve the advantage of being able to efficiently and effectively control the shape of the atomic profile and have been limited to a simple Gaussian distribution. The present invention uses multiple independent dopant implants having predetermined different concentration-versus-depth profiles in order to tailor the total atomic profile of the solar cell according to the user's preferences.
Although each individual implantation can be limited to a Gaussian or pseudo-Gaussian distribution, the present invention combines them to effectively tailor the shape of the total atomic profile. In controlling the total atomic profile through the use of multiple independent implants, the present invention enables the user to effectively control the junction depth 840, where the implanted dopant of one type (such as n-type dopant) meets the dopant of the pre-doped background region 820 (such as p-type dopant). The user is also enabled to also control the dopant concentration 830 at or near the surface of the solar cell. The present invention allows the user to control the surface concentration 830 and the junction depth 840 independently of one another. In some embodiments, the atomic profile is tailored to have the junction depth in the range of approximately 0.01 micrometers to approximately 0.5 micrometers. In some embodiments, the atomic profile is tailored to have the surface concentration in the range of approximately 5E18 At./cm3 to approximately 4.8E21 At./cm3). However, it is contemplated that the atomic profile can be tailored to have different junction depths and surface concentrations.
In the prior art, the adjustment of the atomic profile is limited.
In graph 1000′ of
In
As discussed above, embodiments of the present invention are well suited for fabricating solar cell devices. The following co-pending patent applications, each of which is hereby incorporated by reference in its entirety as if set forth herein, describe ways of fabricating solar cell devices: “SOLAR CELL FABRICATION USING IMPLANTATION,” by Babak Adibi and Edward S. Murrer, filed Jun. 11, 2009, having Attorney Docket No. SITI-00100; “APPLICATIONS SPECIFIC IMPLANT SYSTEM FOR USE IN SOLAR CELL FABRICATIONS,” by Babak Adibi and Edward S. Murrer, filed Jun. 11, 2009, having Attorney Docket No. SITI-00200; and “SOLAR CELL FABRICATION WITH FACETING AND IMPLANTATION,” by Babak Adibi and Edward S. Murrer, filed Jun. 24, 2008, having Attorney Docket No. SITI-00400. It is contemplated that any of the features described within these co-pending patent applications can be incorporated into the present invention.
The present invention has been described in terms of specific embodiments incorporating details to facilitate the understanding of principles of construction and operation of the invention. Such reference herein to specific embodiments and details thereof is not intended to limit the scope of the claims appended hereto. It will be readily apparent to one skilled in the art that other various modifications may be made in the embodiment chosen for illustration without departing from the spirit and scope of the invention as defined by the claims.
This application claims priority to co-pending U.S. Provisional Application Ser. No. 61/131,687, filed Jun. 11, 2008, entitled “SOLAR CELL FABRICATION USING IMPLANTATION,” co-pending U.S. Provisional Application Ser. No. 61/131,688, filed Jun. 11, 2008, entitled “APPLICATIONS SPECIFIC IMPLANT SYSTEM FOR USE IN SOLAR CELL FABRICATIONS,” co-pending U.S. Provisional Application Ser. No. 61/131,698, filed Jun. 11, 2008, entitled “FORMATION OF SOLAR CELL-SELECTIVE EMITTER USING IMPLANTATION AND ANNEAL METHODS,” co-pending U.S. Provisional Application Ser. No. 61/133,028, filed Jun. 24, 2008, entitled “SOLAR CELL FABRICATION WITH FACETING AND IMPLANTATION,” and co-pending U.S. Provisional Application Ser. No. 61/210,545, filed Mar. 20, 2009, entitled “ADVANCED HIGH EFFICIENCY CRYSTALLINE SOLAR CELL FABRICATIONS METHOD,” which are all hereby incorporated by reference as if set forth herein.
| Number | Date | Country | |
|---|---|---|---|
| 61131687 | Jun 2008 | US | |
| 61131688 | Jun 2008 | US | |
| 61131698 | Jun 2008 | US | |
| 61133028 | Jun 2008 | US | |
| 61210545 | Mar 2009 | US |
