Patent Application
20120151303
The present invention relates to the field of communication systems, and in particular to the field of error correction schemes for telecommunication systems.
Real-world communication networks, whether based on wired or wireless transmission media, are imperfect in the sense that data loss is common. This is due to the fact that the physical communication channels used capture interference from other sources than the intended transmitter, and undergo time-domain variations of the attenuation experienced between a given transmitter and receiver. The latter effect, known as fading, is particularly important in wireless communication.
Data transmission systems and the multimedia services that are transported over them have to be designed to operate correctly over such imperfect networks. For this reason, various error detection and error correction schemes have been devised, which operate at different levels in the protocol stack.
One class of forward error correction (FEC) schemes is known as Reed-Solomon codes, and these operate on the basis of certain mathematical properties of finite fields, in particular Galois fields such as GF(28).
In frame or packet based communication systems, such as those covered by the IEEE 802® standards family and the TCP/IP standards family, the effect of error detection and error correction schemes is felt at the level of entire frames or packets. Hence, the detection of one or more uncorrectable errors within a given frame or packet, for example through verification of Cyclic Redundancy Code (CRC), will lead to an invalidation of the entire frame or packet. Typically, an invalidated received frame or packet is not passed on to the higher layers of the protocol stack, such that the entire frame or packet is to be considered lost.
Upper layer FEC solutions are proposed to overcome the losses resilient to physical layer FEC mechanisms, and link layer retransmission schemes. At the receiver side, each packet is considered by the upper layers either completely received or completely lost (erased) based on a CRC (Cyclic Redundancy Check). Accordingly, the FEC decoder encounters a “block erasure channel”.
In this context, different upper layer FEC solutions are available in several specifications for different applications. Some solutions are integrated in the application layer above the IP level; these are referred to as Application Layer FEC (denoted by AL-FEC). Others are situated in the link layer below the IP level; these are referred to as Link Layer FEC (denoted by LL-FEC).
It is an object of an embodiment of the invention to reduce the complexity of the error correction facilities of a communication system such as a DVB-SH system by using a binary based decoder.
It is also an object of an embodiment of the invention to improve the performance of the error correction facilities of a communication system such as a DVB-SH system by creating a virtual binary erasure channel.
An embodiment of the method according to the present invention for generating redundancy information related to data to be transmitted, comprises rearranging (601) the data by interleaving it using single-bit granularity; generating (602) redundancy information pertaining to the interleaved data by means of a forward error correction algorithm; and rearranging (603) the redundancy information by interleaving it using single-bit granularity. In a particular embodiment, the method further comprises transmitting (604) the data and the interleaved redundancy information over a communication network.
An embodiment of the method according to the present invention for correcting erasures in received data, comprises rearranging (701) the received data by interleaving it using single-bit granularity; rearranging (702) received redundancy information pertaining to the received data by de-interleaving it using single-bit granularity; and correcting (703) erasures in the received data by applying a forward error correction algorithm to the rearranged received data using the rearranged redundancy information.
The steps of the various methods of the present invention are not necessarily carried out in the order in which they are described or depicted.
In one embodiment, a transmitting system according to the present invention comprises a first binary interleaving agent (10) adapted to rearrange transmission data with a single-bit granularity; a second binary interleaving agent (20) adapted to rearrange redundancy information pertaining to the transmission data with a single-bit granularity; and an agent (30) for processing the rearranged data, thereby generating redundancy information pertaining to the rearranged transmission data.
In one embodiment, a receiving system of the present invention comprises a first binary interleaving agent (10) adapted to rearrange reception data with a single-bit granularity; a second binary interleaving agent (20) adapted to rearrange redundancy information pertaining to the reception data with a single-bit granularity; and an agent (30) for processing the rearranged reception data by means of a forward error correction algorithm, thereby using the redundancy information.
In one advantageous embodiment, the forward error correction decoding algorithm is a binary based Reed-Solomon algorithm. In a particular embodiment, said forward error correction decoding algorithm is an adaptive parity check matrix based sum-product algorithm. In another embodiment, the forward error correction algorithm is a Raptor Code algorithm. In yet another embodiment, the forward error correction algorithm is an LDPC code.
In one embodiment, the first interleaving agent (10) applies the following interleaving formula to a table comprising C columns of byte-sized data:
c′
i=8nci mod(8C−1) (1)
wherein c′i is the new bit-column number for the bit originally in column ci, and n is a factor denoting the number of byte lengths any given bit will move as a result of the interleaving operation.
In a more particular embodiment, the second interleaving agent (20) applies the following interleaving formula to a table comprising F columns of byte-sized redundancy information:
c′
i=8nci mod(8F−1) (2)
wherein c′1 is the new bit-column number for the bit originally in column ci, and n is a factor denoting the number of byte lengths any given bit will move as a result of the interleaving operation.
In one embodiment of a system of the present invention, the data pertains to a number of frames.
In a particular embodiment of the system, the communication network is a Digital Video Broadcast network. In other embodiments of the present invention, the communication network may be any kind of Digital Subscriber Line, such as but not limited to ADSL, SHDSL, VDSL, 2BASE-TL, and 10PASS-TS. In still other embodiments of the present invention, the communication network may be an active or a passive optical network, such as but not limited to an EPON or a GPON.
The embodiments described above pertain to transmitting devices as well as receiving devices. Where a transmitting device will generate redundancy information, a receiving device will use received redundancy information to recover lost data by correcting erasures through application of a forward error correction algorithm. To this end, the receiver will apply the same interleaving to the received data as the one applied on the transmitting end to generate the redundancy information. Additionally, the receiver will de-interleave the received redundancy information, by applying a converse rearrangement with respect to the one applied on the transmitting end. Assuming Reed-Solomon coding was used at the transmitter, the receiver can then apply an efficient Reed-Solomon decoding algorithm such as the adaptive parity check matrix based sum-product algorithm to the Reed-Solomon codeword thus obtained.
An important design trade-off is presented by the choice between a better performance in error correction, leading to a better Quality of Service and Quality of Experience for the end user, and a less complex and costly receiver. Embodiments of the present invention are based on the insight that Reed-Solomon codes can efficiently be decoded in a binary representation, for example by using the adaptive parity check matrix based sum-product algorithm proposed by Jiang et al. (J. Jiang and K R Narayanan, “Iterative soft decision decoding of Reed Solomon codes based on adaptive parity check matrices”, Proceedings of the International Symposium on Information Theory, 2004). Such an algorithm circumvents the complexity of operations over a finite field, by operating over a sparse graph representation of the binary images of the Reed-Solomon codes. This approach would for example allow for a low-complexity software-based MPE-IFEC decoding solution for DVB-SH. Embodiments of the invention are further based on the insight that the error correction performance provided by such decoders is better when operating on a binary erasure channel than when operating on an equivalent packet or frame erasure channel.
In a frame based communications system, a virtual binary erasure channel system is advantageously achieved by interleaving data belonging to a number of frames or packets on a per-bit basis. This approach ensures that the loss of any frame or packet will not result in the loss of a correspondingly large set of contiguous bits.
In a typical block-based approach, interleaving on a per-bit basis involves storing binary data in a table, and shifting or swapping the positions of individual bit columns. In a special case, the table has a height of one row, and individual bits are shifted or swapped.
In an embodiment of a transmitter according to the present invention, interleaving is applied to a data table with a bit-column granularity, i.e. by treating every byte column as a set of 8 bit columns by expressing each byte in binary form, prior to the application of any forward error correction algorithms. The redundancy bytes resulting from the application of a forward error correction algorithm are again interleaved with a bit-column granularity.
Thus, a loss at the physical layer of an individual datagram burst, which in a system according to the prior art would lead to the loss of complete byte columns in the encoding/decoding tables, will now only lead to the loss of discrete non-adjacent bit columns. This way, a virtual binary erasure channel is obtained, and data recovery by means of a low-complexity binary Reed-Solomon decoding algorithm is made possible.
As it is desirable that any byte column loss be replaced with a number of non-adjacent bit column losses, regardless of whether the lost column represents data or parity information, the invention further provides for a second bit-wise interleaving step, which operates on the obtained parity information before it is provided to the lower layers in columns.
Although operations are carried out on the data at the level of individual bits or bit columns, the skilled person will appreciate that the total number of bits shall typically not be changed by the proposed processing. In particular, assuming an integer number of bytes, the number of bits available for processing would be a multiple of 8, and the result of the processing, expressed as a number of bits, would yield the same multiple of 8. Hence, it is implied that any subsequent processing that may in that case take place at the level of bytes may do so without the need for any explicit regrouping or reassembly process.
By interleaving data belonging to and redundancy information pertaining to multiple frames at the bit level, the present invention provides the advantage of a channel that is a virtual implementation of the concept of a binary erasure channel model, even though the underlying data exchange is frame-oriented.
In this application, we have used and we use the word frame to denote any framed data at the various layers in the protocol stack, including MAC frames, IP packets, datagrams, bursts from a time slicing scheme, and the like.
Some embodiments of apparatus and/or methods in accordance with embodiments of the present invention are now described, by way of example only, and with reference to the accompanying drawings, in which:
Digital Video Broadcasting (DVB) standards include upper layer FEC in streaming and file delivery solutions on the application layer, as well as in link layer protocols. One such standard is the DVB-SH specification, which is a mobile broadcast standard designed to deliver IP-based multimedia services (TV content, data delivery, Video-on-Demand) at frequencies below 3 GHz to mobile handsets as well as portable and vehicular devices. It provides universal coverage by combining a Satellite Component (SC) and a Complementary Ground Component (CGC) in a cooperative mode (CGC is also referred to as the Ancillary Terrestrial Component, ATC). The SC ensures a global coverage while CGC provides cellular type coverage. All types of environment (indoor/outdoor, urban/suburban/rural, static/mobile) are addressed.
In order to guarantee a high quality of video service in severely challenging wireless transmission conditions, such as the occurrence of deep fading events or “non line-of-sight” transmission, DVB-SH uses time diversity. This implies spreading the forward error correction code words over a time span that is sufficiently long in relation to the duration of a typical temporary deterioration of the channel conditions. Hence, on the one hand, the error correcting redundancy may be calculated over multiple frames, and, on the other hand, the resulting redundancy information may also be divided over multiple frames. This type of time diversity can be provided by the Multi-Protocol Encapsulation Inter-bursts FEC (MPE-IFEC) scheme.
The MPE-IFEC scheme operates through a specific combination of interleaving and LL-FEC protection. Received datagram bursts are mapped upon C×T byte matrices denoted as the Application Data Sub-Tables (ADSTs), which are used to column-wise construct the M Application Data Tables (ADTs) which serve as inputs to a parallelized FEC coding process. As the ADTs are constructed by columns, i.e. bytes of a given column with increasing row indices represent temporally adjacent bytes from the original datagram, while the FEC processing is applied row by row, the system provides an inherent byte-based interleaving effect. Furthermore, the ADST to ADT allocation is such that the data pertaining to any particular datagram burst, residing in a single ADST, is spread by individual byte columns over B ADTs, where B is chosen to provide an adequate chance of successful error correction in the event of a loss of a burst. After the encoding, columns from the output tables of the M parallel encoders, the IFEC Data Tables (iFDTs), are again spread by individual byte columns into IFEC sections for transmission in different IFEC bursts, which are combined with the original data bursts to form the actual time slice bursts transmitted on the transmission medium.
The present invention may be embodied in such a way that the sliding principle of the MPE-IFEC scheme is retained and compliance with the architecture and existing implementations of the byte-based MPE-IFEC is maintained.
More specifically, the present invention may be applied as an additional part of the MPE-IFEC process in a communication system such as a Digital Video Broadcast system, e.g. a DVB-SH system, to provide a virtual binary erasure channel over an infrastructure with block erasure characteristics (
The general structure of a DVB-SH system is illustrated in
The bit-wise interleaving process of the present invention may operate on an ADST (40). To enjoy the benefit of additional time diversity, the bit-wise interleaving process can be applied across a block of multiple ADSTs. Alternatively, the bit-wise interleaving process of the present invention may operate on an ADT (45). In communication systems that do not order data in ADTs or ADSTs, the bitwise interleaving process of the present invention may operate on any equally suitable collection of data.
The result of applying the binary interleaving formulas described above to data bits or redundancy information is illustrated in an exemplary way in
The description and drawings merely illustrate the principles of the invention. It will thus be appreciated that those skilled in the art will be able to devise various arrangements that, although not explicitly described or shown herein, embody the principles of the invention and are included within its spirit and scope. Furthermore, all examples recited herein are principally intended expressly to be only for pedagogical purposes to aid the reader in understanding the principles of the invention and the concepts contributed by the inventor(s) to furthering the art, and are to be construed as being without limitation to such specifically recited examples and conditions. Moreover, all statements herein reciting principles, aspects, and embodiments of the invention, as well as specific examples thereof, are intended to encompass equivalents thereof.
A person of skill in the art would readily recognize that steps of various above-described methods can be performed by programmed computers. Herein, some embodiments are also intended to cover program storage devices, e.g., digital data storage media, which are machine or computer readable and encode machine-executable or computer-executable programs of instructions, wherein said instructions perform some or all of the steps of said above-described methods. The program storage devices may be, e.g., digital memories, magnetic storage media such as a magnetic disks and magnetic tapes, hard drives, or optically readable digital data storage media. The embodiments are also intended to cover computers programmed to perform said steps of the above-described methods.
| Number | Date | Country | Kind |
|---|---|---|---|
| 09305543.2 | Jun 2009 | EP | regional |
| Filing Document | Filing Date | Country | Kind | 371c Date |
|---|---|---|---|---|
| PCT/EP10/58056 | 6/9/2010 | WO | 00 | 3/2/2012 |
