The proposed technology relates to frame error concealment based on frames including transform coefficient vectors.
High quality audio transmission may typically utilize transform-based coding schemes. The input audio signal is usually processed in time-blocks called frames of certain size e.g. 20 ms. A frame is transformed by a suitable transform, such as e.g. the Modified Discrete Cosine Transform (MDCT), and the transform coefficients are then quantized and transmitted over the network.
However, when an audio codec is operated in a communication system which includes wireless or packet networks, a frame could get lost in the transmission, or arrive too late, in order to be used in a real-time scenario. A similar problem arises when the data within a frame has been corrupted, and the codec may be set to discard such corrupted frames. The above examples are called frame erasure or packet loss, and when it occurs the decoder typically invokes certain algorithms to avoid or reduce the degradation in audio quality caused by the frame erasure, and such algorithms are called frame erasure (or error) concealment-algorithms (FEC) or packet loss concealment-algorithms (PLC).
The purpose of error concealment is to synthesize lost parts of the audio signal that do not arrive or do not arrive on time at the decoder, or are corrupt. When additional delay can be tolerated and/or additional bits are available one could use various powerful FEC concepts that can be based e.g. on interpolating lost frame between two good frames or transmitting essential side information.
However, in a real-time conversational scenario it is typically not possible to introduce additional delay, and rarely possible to increase bit-budget and computational complexity of the algorithm. Three exemplary FEC-approaches for a real-time scenario are the following:
An example of an FEC algorithm that is commonly used by transform-based codecs is a frame repeat-algorithm that uses the repetition-approach, and repeats the transform coefficients of the previously received frame, sometimes with a scaling factor, for example as described in [1]. The repeated transform coefficients are then used to reconstruct the audio signal for the lost frame. Frame repeat-algorithms and algorithms for inserting noise or silence are attractive algorithms, because they have low computational complexity and do not require any extra bits to be transmitted or any extra delay. However, the error concealment may degrade the reconstructed signal. For example, a muting-based FEC-scheme could create large energy discontinuities and a poor perceived quality, and the use of a noise injection algorithm could lead to negative perceptual impact, especially when applied to a region with prominenttonal components.
Another approach described in [2] involves transmission of side information for reconstruction of erroneous frames by interpolation. A drawback of this method is that it requires extra bandwidth for the side information. For MDCT coefficients without side information available, amplitudes are estimated by interpolation, whereas signs are estimated by using a probabilistic model that requires a large number of past frames (50 are suggested), which may not be available in reality.
A rather complex interpolation method with multiplicative corrections for reconstruction of lost frames is described in [3].
A further drawback of interpolation based frame error concealment methods is that they introduce extra delays (the frame after the erroneous frame has to be received before any interpolation may be attempted) that may not be acceptable in, for example, real-time applications such as conversational applications.
An object of the proposed technology is improved frame error concealment.
This object is met by embodiments of the proposed technology.
According to a first aspect, there is provided a frame error concealment method based on frames including transform coefficient vectors. The method involves tracking sign changes between corresponding transform coefficients of predetermined sub-vectors of consecutive good stationary frames. The method also involves accumulating the number of sign changes in corresponding sub-vectors of a predetermined number of consecutive good stationary frames. Furthermore, the method involves reconstructing an erroneous frame with the latest good stationary frame, but with reversed signs of transform coefficients in sub-vectors having an accumulated number of sign changes that exceeds a predetermined threshold.
According to a second aspect, there is provided a computer program for frame error concealment based on frames including transform coefficient vectors. The computer program comprises computer readable code which when run on a processor causes the processor to perform the following actions: It tracks sign changes between corresponding transform coefficients of predetermined sub-vectors of consecutive good stationary frames. It accumulates the number of sign changes in corresponding sub-vectors of a predetermined number of consecutive good stationary frames. It reconstructs an erroneous frame with the latest good stationary frame, but with reversed signs of transform coefficients in sub-vectors having an accumulated number of sign changes that exceeds a predetermined threshold.
According to a third aspect, there is provided a computer program product, comprising a computer readable medium and a computer program according to the second aspect stored on the computer readable medium.
According to a fourth aspect, the proposed technology involves an embodiment of a decoder configured for frame error concealment based on frames including transform coefficient vectors. The decoder includes a sign change tracker configured to track sign changes between corresponding transform coefficients of predetermined sub-vectors of consecutive good stationary frames. The decoder further includes a sign change accumulator configured to accumulate the number of sign changes in corresponding sub-vectors of a predetermined number of consecutive good stationary frames. The decoder also includes a frame reconstructor configured to reconstruct an erroneous frame with the latest good stationary frame, but with reversed signs of transform coefficients in sub-vectors having an accumulated number of sign changes that exceeds a predetermined threshold.
According to a fifth aspect, the proposed technology involves another embodiment of a decoder configured for frame error concealment based on frames including transform coefficient vectors. The decoder includes a sign change tracking module for tracking sign changes between corresponding transform coefficients of predetermined sub-vectors of consecutive good stationary frames. The decoder further includes a sign change accumulation module for accumulating the number of sign changes in corresponding sub-vectors of a predetermined number of consecutive good stationary frames. The decoder also includes a frame reconstruction module for reconstructing an erroneous frame with the latest good stationary frame, but with reversed signs of transform coefficients in sub-vectors having an accumulated number of sign changes that exceeds a predetermined threshold.
According to a sixth aspect, the proposed technology involves a further embodiment of a decoder configured for frame error concealment based on frames including transform coefficient vectors. The decoder includes a processor and a memory, where the memory contains instructions executable by the processor, whereby the decoder is operative to perform the following actions: It tracks sign changes between corresponding transform coefficients of predetermined sub-vectors of consecutive good stationary frames. It accumulates the number of sign changes in corresponding sub-vectors of a predetermined number of consecutive good stationary frames. It reconstructs an erroneous frame with the latest good stationary frame, but with reversed signs of transform coefficients in sub-vectors having an accumulated number of sign changes that exceeds a predetermined threshold.
According to a seventh aspect, the proposed technology involves a user terminal including a decoder in accordance with the fourth, fifth or sixth aspect.
At least one of the embodiments is able to improve the subjective audio quality in case of frame loss, frame delay or frame corruption, and this improvement is achieved without transmitting additional side parameters or generating extra delays required by interpolation, and with low complexity and memory requirements.
The proposed technology, together with further objects and advantages thereof, may best be understood by making reference to the following description taken together with the accompanying drawings, in which:
Throughout the drawings, the same reference designations are used for similar or corresponding elements.
The technology proposed herein is generally applicable to Modulated Lapped Transform (MLT) types, for example MDCT, which is the presently preferred transform. In order to simplify the description only the MDCT will be discussed below.
Furthermore, in the description below the terms lost frame, delayed frame, corrupt frame and frames containing corrupted data all represent examples of erroneous frames which are to be reconstructed by the proposed frame error concealment technology. Similarly the term “good frames” will be used to indicate non-erroneous frames.
The use of a frame repeat-algorithm for concealing frame errors in a transform codec which uses the MDCT may cause degradation in the reconstructed audio signal, due to the fact that in the MDCT-domain, the phase information is conveyed both in the amplitude and in the sign of the MDCT-coefficients. For tonal or harmonic components, the evolution of the corresponding MDCT coefficients in terms of amplitude and sign depends on the frequency and the initial phase of the underlying tones. The MDCT coefficients for the tonal components in the lost frame may sometimes have the same sign and amplitude as in the previous frame, wherein a frame repeat-algorithm will be advantageous. However, sometimes the MDCT coefficients for the tonal components have changed sign and/or amplitude in the lost frame, and in those cases the frame repeat-algorithm will not work well. When this happens, the sign-mismatch caused by repeating the coefficients with the wrong sign will cause the energy of the tonal components to be spread out over a larger frequency region, which will result in an audible distortion.
The embodiments described herein analyze the sign-changes of MDCT coefficients in previously received frames, e.g. using a sign change tracking algorithm, and use the collected data regarding the sign-change for creating a low complexity FEC algorithm with improved perceptual quality.
Since the problem with phase discontinues is most audible for strong tonal components, and such components will affect a group of several coefficients, the transform coefficients may be grouped into sub-vectors on which the sign-analysis is performed. The analysis according to embodiments described herein also takes into account the signal dynamics, for example as measured by a transient detector, in order to determine the reliability of past data. The number of sign changes of the transform coefficients may be determined for each sub-vector over a defined number of previously received frames, and this data is used for determining the signs of the transform coefficients in a reconstructed sub-vector. According to embodiments described herein, the sign of all coefficients in a sub-vector used in a frame repeat algorithm will be switched (reversed), in case the determined number of sign-changes of the transform coefficients in each corresponding sub-vector over the previously received frames is high, i.e. is equal to or exceeds a defined switching threshold.
Embodiments described herein involve a decoder-based sign extrapolation-algorithm that uses collected data from a sign change tracking algorithm for extrapolating the signs of a reconstructed MDCT vector. The sign extrapolation-algorithm is activated at a frame loss.
The sign extrapolation-algorithm may further keep track of whether the previously received frames (as stored in a memory, i.e. in a decoder buffer) are stationary or if they contain transients, since the algorithm is only meaningful to perform on stationary frames, i.e. when the signal does not contain transients. Thus, according to an embodiment, the sign of the reconstructed coefficients will be randomized, in case any of the analyzed frames of interest contain a transient.
An embodiment of the sign extrapolation-algorithm is based on sign-analysis over three previously received frames, due to the fact that three frames provide sufficient data in order to achieve a good performance. In case only the last two frames are stationary, the frame n−3 is discarded. The analysis of the sign-change over two frames is similar to the analysis of the sign-change over three frames, but the threshold level is adapted accordingly.
Tonal or harmonic components in the time-domain audio signal will affect several coefficients in the MDCT domain. A further embodiment captures this behavior in the sign-analysis by determining the number of sign-changes of groups of MDCT coefficients, instead of on the entire vector of MDCT coefficients, such that the MDCT coefficients are grouped into e.g. 4-dimensional bands in which the sign analysis is performed. Since the distortion caused by sign mismatch is most audible in the low frequency region, a further embodiment of the sign analysis is only performed in the frequency range 0-1600 Hz, in order to reduce computational complexity. If the frequency resolution of the MDCT transform used in this embodiment is e.g. 25 Hz per coefficient, the frequency range will consist of 64 coefficients which could be divided into B bands, where B=16 in this example.
According to an embodiment, the determining of the number of sign-changes of the transform coefficients in frames received by the decoder is performed by a sign change tracking-algorithm, which is active as long as the decoder receives frames, i.e. as long as there are no frame losses. During this period, the decoder may update two state variables, sn and Δn for each sub-vector or band b used in the sign analysis, and in the example with 16 sub-vectors there will thus be 32 state variables.
The first state variable sn for each sub-vector or band b holds the number of sign switches between the current frame n and the past frame n−1, and is updated in accordance with (note that here frame n is considered to be a good frame, while frame n in
where the index ib indicates coefficients in sub-vector or band b, n is the frame number, and {circumflex over (x)}n is the vector of received quantized transform coefficients.
If the frame n is a transient, which is indicated by the variable isTransientn in (1), the number of sign switches is not relevant information, and will be set to 0 for all bands.
The variable isTransientn is obtained as a “transient bit” from the encoder, and may be determined on the encoder side as described in [4].
The second state variable Δn for each sub-vector holds the aggregated number of sign switches between the current frame n and the past frame n−1 and between the past frame n−1 and the frame n−2, in accordance with:
The sign extrapolation-algorithm is activated when the decoder does not receive a frame or the frame is bad, i.e. if the data is corrupted.
According to an embodiment, when a frame is lost (erroneous), the decoder first performs a frame repeat-algorithm and copies the transform coefficients from the previous frame into the current frame. Next, the algorithm checks if the three previously received frames contain any transients by checking the stored transient flags for those frames. (However, if any of the last two previously received frames contains transients, there is no useful data in the memory to perform sign analysis on and no sign prediction is performed, as discussed with reference to
If at least the two previously received frames are stationary, the sign extrapolation-algorithm compares the number of sign-switches Δn for each band with a defined switching threshold T and switches, or flips, the signs of the corresponding coefficients in the current frame if the number of sign-switches is equal to or exceeds the switching threshold.
According to an embodiment, and under the assumption of 4-dim bands, the level of the switching threshold T depends on the number of stationary frames in the memory, according to the following:
The comparison with the threshold T and the potential sign flip/switch for each band is done according to the following (wherein a sign flip or reversal is indicated by −1):
In this scheme, the extrapolated sign of the transform coefficients in the first lost frame is either switched, or kept the same as in the last good frame. In case there is a sequence of lost frames, in one embodiment the sign is randomized from the second frame.
Table 1 below is a summary of the sign extrapolation-algorithm for concealment of lost frame with index “n”, according to an embodiment (Note that here frame n is considered erroneous, while frame n was considered good in the above equations. Thus, there is an index shift of 1 unit in the table):
As noted above, the threshold may depend on the predetermined number of consecutive good stationary frames. For example, the threshold is assigned a first value for 2 consecutive good stationary frames and a second value for 3 consecutive good stationary frames.
Furthermore, stationarity of a received frame may be determined by determining whether it contain any transients, for example by examining the variable isTransientn as described above.
A further embodiment uses three modes of switching of the sign of the transform coefficients, e.g. switch, preserve, and random, and this is realized through comparison with two different thresholds, i.e. a preserve threshold Tp and a switching threshold Ts. This means that the extrapolated sign of the transform coefficients in the first lost frame is switched in case the number of sign switches is equal to or exceeds the switching threshold Ts, and is preserved in case number of sign switches is equal to or lower than the preserve threshold Tp. Further, the signs are randomized in case the number of sign switches is larger than the preserve threshold Tp and lower than the switching threshold Ts, i.e.:
In this scheme the sign extrapolation in the first lost frame is applied on the second and so on, as the randomization is already part of the scheme.
According to a further embodiment, a scaling factor (energy attenuation) is applied to the reconstructed coefficients, in addition to the switching of the sign:
{circumflex over (x)}n=G*{circumflex over (x)}n-1 (6)
In equation (6) G is a scaling factor which may be 1 if no gain prediction is used, or G≦1 in the case of gain prediction (or simple attenuation rule, like −3 dB for each consecutive lost frame).
The steps, functions, procedures, modules and/or blocks described herein may be implemented in hardware using any conventional technology, such as discrete circuit or integrated circuit technology, including both general-purpose electronic circuitry and application-specific circuitry.
Particular examples include one or more suitably configured digital signal processors and other known electronic circuits, e.g. discrete logic gates interconnected to perform a specialized function, or Application Specific Integrated Circuits (ASICs).
Alternatively, at least some of the steps, functions, procedures, modules and/or blocks described above may be implemented in software such as a computer program for execution by suitable processing circuitry including one or more processing units.
The flow diagram or diagrams presented herein may therefore be regarded as a computer flow diagram or diagrams, when performed by one or more processors. A corresponding apparatus may be defined as a group of function modules, where each step performed by the processor corresponds to a function module. In this case, the function modules are implemented as a computer program running on the processor.
Examples of processing circuitry includes, but is not limited to, one or more microprocessors, one or more Digital Signal Processors, DSPs, one or more Central Processing Units, CPUs, video acceleration hardware, and/or any suitable programmable logic circuitry such as one or more Field Programmable Gate Arrays, FPGAs, or one or more Programmable Logic Controllers.
It should also be understood that it may be possible to re-use the general processing capabilities of any conventional device or unit in which the proposed technology is implemented. It may also be possible to re-use existing software, e.g. by reprogramming of the existing software or by adding new software components.
The embodiments described herein apply to a decoder for an encoded audio signal, as illustrated in
The reconstructed transform coefficient vector is converted into an audio signal in an output unit OUT.
More specifically the decoder 20 includes a processor 22 and a memory 24, and the memory contains instructions executable by the processor, whereby the decoder 20 is operative to:
Illustrated in
The computer program residing in memory may be organized as appropriate function modules configured to perform, when executed by the processor, at least part of the steps and/or tasks described above. An example of such function modules is illustrated in
As noted above, the software or computer program 42 may be realized as a computer program product 40, which is normally carried or stored on a computer-readable medium. The computer-readable medium may include one or more removable or non-removable memory devices including, but not limited to a Read-Only Memory, ROM, a Random Access Memory, RAM, a Compact Disc, CD, a Digital Versatile Disc, DVD, a Universal Serial Bus, USB, memory, a Hard Disk Drive, HDD storage device, a flash memory, or any other conventional memory device. The computer program may thus be loaded into the operating memory of a computer or equivalent processing device for execution by the processing circuitry thereof.
For example, the computer program includes instructions executable by the processing circuitry, whereby the processing circuitry is able or operative to execute the steps, functions, procedure and/or blocks described herein. The computer or processing circuitry does not have to be dedicated to only execute the steps, functions, procedure and/or blocks described herein, but may also execute other tasks.
The technology described above may be used e.g. in a receiver, which can be used in a mobile device (e.g. mobile phone, laptop) or a stationary device, such as a personal computer. This device will be referred to as a user terminal including a decoder 20 as described above. The user terminal may be a wired or wireless device.
As used herein, the term “wireless device” may refer to a User Equipment, UE, a mobile phone, a cellular phone, a Personal Digital Assistant, PDA, equipped with radio communication capabilities, a smart phone, a laptop or Personal Computer, PC, equipped with an internal or external mobile broadband modem, a tablet PC with radio communication capabilities, a portable electronic radio communication device, a sensor device equipped with radio communication capabilities or the like. In particular, the term “UE” should be interpreted as a non-limiting term comprising any device equipped with radio circuitry for wireless communication according to any relevant communication standard.
As used herein, the term “wired device” may refer to at least some of the above devices (with or without radio communication capability), for example a PC, when configured for wired connection to a network.
It is to be understood that the choice of interacting units or modules, as well as the naming of the units are only for exemplary purpose, and may be configured in a plurality of alternative ways in order to be able to execute the disclosed process actions.
It should also be noted that the units or modules described in this disclosure are to be regarded as logical entities and not with necessity as separate physical entities. It will be appreciated that the scope of the technology disclosed herein fully encompasses other embodiments which may become obvious to those skilled in the art, and that the scope of this disclosure is accordingly not to be limited.
Reference to an element in the singular is not intended to mean “one and only one” unless explicitly so stated, but rather “one or more.” All structural and functional equivalents to the elements of the above-described embodiments that are known to those of ordinary skill in the art are expressly incorporated herein by reference and are intended to be encompassed hereby. Moreover, it is not necessary for a device or method to address each and every problem sought to be solved by the technology disclosed herein, for it to be encompassed hereby.
In the preceding description, for purposes of explanation and not limitation, specific details are set forth such as particular architectures, interfaces, techniques, etc. in order to provide a thorough understanding of the disclosed technology. However, it will be apparent to those skilled in the art that the disclosed technology may be practiced in other embodiments and/or combinations of embodiments that depart from these specific details. That is, those skilled in the art will be able to devise various arrangements which, although not explicitly described or shown herein, embody the principles of the disclosed technology. In some instances, detailed descriptions of well-known devices, circuits, and methods are omitted so as not to obscure the description of the disclosed technology with unnecessary detail. All statements herein reciting principles, aspects, and embodiments of the disclosed technology, as well as specific examples thereof, are intended to encompass both structural and functional equivalents thereof. Additionally, it is intended that such equivalents include both currently known equivalents as well as equivalents developed in the future, e.g. any elements developed that perform the same function, regardless of structure.
Thus, for example, it will be appreciated by those skilled in the art that the figures herein can represent conceptual views of illustrative circuitry or other functional units embodying the principles of the technology, and/or various processes which may be substantially represented in computer readable medium and executed by a computer or processor, even though such computer or processor may not be explicitly shown in the figures.
The functions of the various elements including functional blocks may be provided through the use of hardware such as circuit hardware and/or hardware capable of executing software in the form of coded instructions stored on computer readable medium. Thus, such functions and illustrated functional blocks are to be understood as being either a hardware-implemented and/or a computer-implemented, and thus machine-implemented.
The embodiments described above are to be understood as a few illustrative examples of the present invention. It will be understood by those skilled in the art that various modifications, combinations and changes may be made to the embodiments without departing from the scope of the present invention. In particular, different part solutions in the different embodiments can be combined in other configurations, where technically possible.
It will be understood by those skilled in the art that various modifications and changes may be made to the proposed technology without departure from the scope thereof, which is defined by the appended claims.
ASIC Application Specific Integrated Circuit
CPU Central Processing Units
DSP Digital Signal Processor
FEC Frame Erasure Concealment
FPGA Field Programmable Gate Array
MDCT Modified Discrete Cosine Transform
MLT Modulated Lapped Transform
PLC Packet Loss Concealment
This application is a 35 U.S.C. §371 National Phase Entry Application from PCT/SE2013/051332, filed Nov. 12, 2013, which claims priority to U.S. Application No. 61/764,254 filed Feb. 13, 2013. The above identified applications are incorporated by reference.
Filing Document | Filing Date | Country | Kind |
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PCT/SE2013/051332 | 11/12/2013 | WO | 00 |
Publishing Document | Publishing Date | Country | Kind |
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WO2014/126520 | 8/21/2014 | WO | A |
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Number | Date | Country | |
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20150379998 A1 | Dec 2015 | US |
Number | Date | Country | |
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61764254 | Feb 2013 | US |