1. Field of the Invention
The present invention generally relates to digital image processing technology, and more particularly to a frame rate up conversion method and apparatus
2. Description of the Prior Art
Applications of video and visual communication generally deal with large quantities of video data. To create a video presentation, a rendering device displays a plurality of digital images (“frames”) in succession, thereby simulating movement. Frame rate is the measurement of the frequency at which a rendering device produces unique consecutive frames. The term applies equally well to computer graphics, video cameras, film cameras, and motion capture systems. Frame rate is most often expressed in frames per second (fps), or simply hertz (Hz). Capability to display video in high frame rate mode is increasingly desired in modern image display application.
To increase the rate at which the frames are displayed to a user, it must generate intermediate frames between two selected reference frames of the video presentation. Frame rate up conversion methods generally employ motion compensated interpolation technique which uses motion measurement information between adjacent frames for intermediate frame interpolation.
A robust frame rate up conversion method is always required in the application regarding high frame rate video display.
According to a preferred embodiment, the present invention provides a frame rate up conversion method including the steps of: receiving a first reference frame and a second reference frame; and determining a first part in a new video frame according to the first reference frame, the second reference frame, and a second part in the new video frame, in which the first part is a current pixel block lying in the new video frame, the second part includes an already-generated pixel area lying in the new video frame, and the current pixel block is determined according to a first group of pixel blocks lying in the first reference frame, a second group of pixel blocks lying in the second reference frame, and the already-generated pixel area.
The determining step includes computing a plurality of similarity measuring indicators for a plurality of pixel block pairs, each of the plurality of pixel block pairs containing exactly two blocks containing one pixel block selecting from the first group of pixel blocks and another pixel block selected from the second group of pixel blocks; determining an optimum pixel pair among the plurality of pixel block pairs according to the plurality of similarity measuring indicators; and generating a super current pixel block in the new video frame by averaging the two pixel blocks of the optimum pixel pair, in which the current pixel block is determined to be a sub-block lying in the super current block.
According to a preferred embodiment, the present invention also provides a frame rate up conversion apparatus including a pixel block pair generating unit, an SMI (similarity measuring indicator) computing unit 320, an optimum pixel block pair selecting unit 330, a pixel block interpolating unit 340 and an already generated blocks buffer 350.
In the following description of the exemplary embodiment, reference is made to the accompanying drawings which form a part hereof, and in which is shown by way of illustration various manners in which the invention may be practiced. It is to be understood that other embodiments may be utilized, as structural and operational changes may be made without departing from the scope of the present invention.
In the newly generated video frame FC, the pixel block BC is the current or instant block to be generated. In this embodiment, the pixel block BC is an 8×8 pixel area, i.e., an area containing 8×8=64 pixels. The pixel block BC is located within a super pixel block BS which is a 16×16 pixel area in this embodiment.
The pixel block generation process firstly tries to determine whether the super pixel block BS is a part of an object lying in both the first reference frame FP and the second reference frame FN. For this purpose, a first group of pixel blocks GP within a first search range WP in the first reference frame FP and a second group of pixel blocks GN within a second search range WN in the second reference frame FN are determined in an appropriate manner. Pixel blocks contained in the first group GP may be overlapped with each other. Likewise, pixel blocks contained in the second group GN may also be overlapped with each other. Each pixel block contained in the first group GP is a candidate pixel block to be determined whether it is the same block as another pixel block contained in the second group GN.
A plurality of pixel block pairs are then determined in a feasible manner such that each of the pixel pair contains exactly one pixel block selecting from the first group GP and another pixel block selecting from the second group GN.
Each pixel block pair is deliberately chosen such that the motion vector associated therewith can be used to locate the aforementioned super pixel block BS. Referring to
Any suitable methods, such as full search or 3-steps search, may be employed to determine the first group GP, the second group GN, as well as the plurality of pixel block pairs. For example, the full search technique completely searching the entire WP and WN is feasible for this purpose.
A similarity measuring indicator SMI is then computed for each of the plurality of pixel block pairs. The similarity measuring indicator SMI for the pixel block pair (BP,BN) may be defined by the following expression:
SMI(BP,BN)=SAD(BP,BN)+SAD(BPD,BSD)*r+SAD(BND,BSD)*r,
in which SAD(Bi,Bj) represents the sum of absolute difference between pixel areas Bi and Bj, and r is a scaling factor typically between 0 and 1.
The pixel area BSD contains pixels already generated within the super pixel block BS in previous operation.
Sub-areas BPD and BND represent areas corresponding to the already-generated pixel area BSD within the pixel blocks BP and BN respectively.
An optimum pixel block pair is then determined among the plurality of pixel block pairs such that the optimum pixel block pair generates a minimum similarity measuring indicator among the plurality of similarity measuring indicators computed therefor. After the optimum pixel block pair is determined, the content of the super current pixel block BS may then be obtained by averaging the two pixel blocks contained in the optimum pixel pair. Note that the current pixel block BC is determined when the super current pixel block BS is determined, because, as shown in
In other embodiment, the dimension of the pixel block under processing is not necessarily 16×16 or 8×8. The width and length of the pixel block under processing may even be different. The pixel block under processing, for example, may be an M×N pixel area and M is not equal to N. Furthermore, the function SAD(Bi,Bj) may be replaced with any other suitable function measuring pixel block difference.
The pixel block generation process described above may be used in a frame rate up conversion method.
The present invention also includes an apparatus implementing the method disclosed above.
Please also refer to
In a preferred embodiment, all the units (except the buffer 350) described in
The foregoing description of the exemplary embodiment of the invention has been presented for the purposes of illustration and description. It is not intended to be exhaustive or to limit the invention to the precise form disclosed. Many modifications and variations are possible in light of the above teaching. It is intended that the scope of the invention be limited not with this detailed description, but rather by the claims appended hereto.