The invention relates generally to the field of CMOS image sensors. More specifically, the invention relates to such image sensors that process signals from the analog domain to the frequency domain and then to the digital domain.
With the performance improved rapidly, CMOS image sensors are increasingly found in more and more applications. Currently, CMOS image sensor circuits all have substantially the same structure. There is typically a photo sensitive device, like photodiodes, in the pixel array that convert the optical signal into an electric signal, which are stored by a sample/hold circuit (or a circuit array). In this manner, an analog signal processing chain is placed before an analog-to-digital converter.
Although the present image sensor design is satisfactory, improvements are desirable. One shortcoming of the present CMOS image sensor is that the analog processing chain includes high noise, low speed and high power.
Consequently, a need exists for an improved design in which the analog-to-digital conversion is placed at earlier stages of the processing and process signal in the digital domain. Therefore, in this invention, the analog signals are converted into digital codes immediately at the pixel array outputs by using a frequency modulation technique.
The present invention is directed to overcoming one or more of the problems set forth above. Briefly summarized, according to one aspect of the present invention, the present invention resides in an image sensor comprising (a) a plurality of photo-sensitive elements arranged in an array in which each photo-sensitive element converts incident light into a charge packet; (b) a charge-to-voltage converter that receives each charge packet and converts the charge packet into a voltage; (c) a voltage-to-frequency converter that receives each voltage and converts the voltage into a signal having a frequency; and (d) a frequency-to-digital signal converter that receives each signal having a frequency and converts the signal having the frequency into a digital signal.
The above and other objects of the present invention will become more apparent when taken in conjunction with the following description and drawings wherein identical reference numerals have been used, where possible, to designate identical elements that are common to the figures.
The present invention has the advantage of high-speed processing and low noise.
Referring to
A reset transistor 60 is electrically connected to the node of the floating diffusion 50 for resetting the voltage of the floating diffusion 50. A gate 70 of an amplifying transistor 80 is electrically connected to the floating diffusion 50 for receiving and amplifying the voltage of the floating diffusion 50. The amplifying transistor 80 receives and transfers the image signal captured by the pixels 10 to the output 90. It is noted that each pixel a row is connected via the output 90 to a row select bus (not shown) that enables the selection of a particular row for read out.
Referring to
The invention has been described with reference to a preferred embodiment. However, it will be appreciated that variations and modifications can be effected by a person of ordinary skill in the art without departing from the scope of the invention.