Frequency synthesizing apparatus and method having injection-locked quadrature VCO in RF transceiver

Information

  • Patent Application
  • 20070159259
  • Publication Number
    20070159259
  • Date Filed
    June 07, 2006
    19 years ago
  • Date Published
    July 12, 2007
    18 years ago
Abstract
A frequency synthesizing apparatus and method having an injection-locked quadrature VCO in an RF transceiver is provided. In the frequency synthesizer, an I signal following a frequency of a high frequency signal that is input using the injection-locked quadrature VCO and a Q signal thereof are simultaneously generated to have an appropriate driving power. Accordingly, the I signal and the Q signal thereof that are generated in the injection-locked quadrature VCO may be utilized as a local signal for frequency up/down-conversion, without being buffered. An output of an SSB mixer may be directly input into the injection-locked quadrature VCO. Also, high frequency signals that are generated in another circuit such as the SSB mixer, a PLL, or a VCO may be selected to be input into the injection-locked quadrature VCO by a selector.
Description

BRIEF DESCRIPTION OF THE DRAWINGS

The above and/or other aspects of the present invention will become apparent and more readily appreciated by describing certain exemplary embodiments of the present invention with reference to the accompanying drawings, in which:



FIG. 1 is a diagram illustrating a related art frequency synthesizer generating a two-phase high frequency signal;



FIG. 2 is a diagram illustrating a frequency synthesizer according to an exemplary embodiment of the present invention;



FIG. 3 is a diagram illustrating an exemplary injection-locked quadrature VCO shown in FIG. 2;



FIG. 4 is a circuit diagram illustrating an exemplary injection-locked quadrature VCO shown with respect to FIG. 3;



FIG. 5 is a diagram illustrating an example of a waveform showing a relationship between an output signal and an injection signal in an injection-locked quadrature VCO; and



FIG. 6 is a circuit diagram illustrating an exemplary injection-locked frequency divider circuit, as a modification of the circuit shown in FIG. 4.


Claims
  • 1. An oscillator comprising: a first oscillator which generates a first differential signal set from a second differential signal set input via first positive and negative input terminals; anda second oscillator which receives positive and negative signals of a third differential signal set for frequency locking via second positive and negative input terminals, respectively, receives positive and negative signals of the first differential signal set via third positive and negative input terminals, respectively, and generates the second differential signal set based on the positive and negative signals of the third differential signal set and the positive and negative signals of the first differential signal set.
  • 2. The oscillator of claim 1, wherein the positive signal of the second differential signal is input to the first negative input terminal of the first oscillator, and the negative signal of the second differential signal is input to the first positive input terminal of the first oscillator.
  • 3. The oscillator of claim 2, wherein a frequency of the first differential signal set and the second differential signal set correspond to a frequency of the third differential signal set, and the positive and negative signals of the first differential signal set are in-phase (I) signals and the positive and negative signals of the second differential signal set are quadrature-phase (Q) signals of the I signals.
  • 4. The oscillator of claim 2, wherein the first oscillator and the second oscillator drive a receiver mixer or a transmitter mixer without buffering the first differential signal set and the second differential signal set for a frequency up/down-conversion.
  • 5. The oscillator of claim 2, wherein the third differential signal set is an output of one of a single sideband (SSB) mixer, a phase-locked loop (PLL) and a voltage controlled oscillator (VCO).
  • 6. The oscillator of claim 5, wherein the third differential signal set is selected by a selector from the output of one of the SSB mixer, the PLL and the VCO .
  • 7. The oscillator of claim 2, wherein the oscillator comprises a voltage-controlled oscillator (VCO) which corrects a frequency by controlling a voltage applied to capacitance components or a varactor constituting a load circuit of the first oscillator or the second oscillator.
  • 8. The oscillator of claim 2, wherein: the first oscillator comprises a plurality of metal-oxide semiconductor field effect transistors (MOSFETs) having gate terminals coupled between a first load circuit and a first current source, as the first positive and negative input terminals, andthe second oscillator comprises a plurality of MOSFETs having gate terminals coupled between second load circuit and second current source, as the second positive and negative input terminals and the third positive and negative input terminals.
  • 9. The oscillator of claim 8, wherein the first load circuit and the second load circuit have a substantially identical impedance.
  • 10. An oscillator comprising: a first oscillator which generates a first differential signal set from a second differential signal set input via first positive and negative input terminals; anda second oscillator comprising a plurality of MOSFETs having gate terminals connected between a load circuit and a current source, as second positive and negative input terminals, the second oscillator generating a second differential signal set based on an injection signal and positive and negative signals of the first differential signal set received via the second positive and negative input terminals respectively.
  • 11. The oscillator of claim 10, wherein a positive signal of the second differential signal is input to the first negative input terminal of the first oscillator, and a negative signal of the second differential signal is input to the first positive input terminal of the first oscillator.
  • 12. The oscillator of claim 11, wherein the injection signal is received by one of the MOSFETs which is a current source.
  • 13. The oscillator of claim 12, further comprising a capacitor connected in series to a gate terminal of the MOSFET, wherein the injection signal is received through the capacitor.
  • 14. The oscillator of claim 10, wherein the first differential signal set and the second differential signal set have a frequency which is lower than a frequency of the injection signal, and the positive and negative signals of the first differential signal set are in-phase (I) signals and positive and negative signals of the second differential signal set are quadrature-phase (Q) signals of the I signals.
  • 15. The oscillator of claim 10, wherein the first differential signal set and the second differential signal set have one half the frequency of the injection signal.
  • 16. A frequency synthesizer comprising: a mixer which generates a frequency synthesized signal whose frequency is a synthesis of first high frequency I and Q signals and second high frequency I and Q signals;a selector which selects and outputs one of the I signal of the first high frequency and the frequency synthesized signal; andan oscillator which receives an output signal of the selector and generates a first local signal and a second local signal having a quadrature-phase with each other based on the output signal of the selector.
  • 17. The frequency synthesizer of claim 16, wherein each of the first and second local signal has a frequency identical to a frequency of the output signal of the selector.
  • 18. The frequency synthesizer of claim 16, wherein the first and second local signal of the oscillator each has a frequency which is one half a frequency of the output signal of the selector.
  • 19. An oscillation method comprising: generating at a first oscillator a first differential signal set using a second differential signal set input via first positive and negative input terminals of the first oscillator;receiving at a second oscillator positive and negative signals of a third differential signal set for frequency locking via second positive and negative input terminals of the second oscillator, respectively;receiving at the second oscillator positive and negative signals of the first differential signal set via third positive and negative input terminals of the second oscillator, respectively; andgenerating at the second oscillator a second differential signal set.
  • 20. The oscillation method of claim 19, wherein a positive signal of the second differential signal is input to the first negative input terminal of the first oscillator, and a negative signal of the second differential signal is input to the first positive input terminal of the first oscillator.
  • 21. The method of claim 20, wherein a frequency of the first differential signal set and the second differential signal set corresponds to a frequency of the third differential signal set, and the positive and negative signals of the first differential signal set are in-phase (I) signals and the positive and negative signals of the second differential signal set are quadrature-phase (Q) signals of the I signals.
  • 22. The method of claim 20, wherein the first differential signal set and the second differential signal set are utilized in a receiver mixer or a transmitter mixer without being buffered for a frequency up or down conversion.
  • 23. The method of claim 20, wherein the third differential signal set is an output of one of a single sideband (SSB) mixer, a phase-locked loop (PLL) and a voltage controlled oscillator (VCO).
  • 24. An oscillation method comprising: generating at a first oscillator a first differential signal set using a second differential signal set input via first positive and negative input terminals of the first oscillator;receiving at a second oscillator an injection signal via a capacitor connected in series to a gate terminal of a metal oxide semiconductor field effect transistor (MOSFET) for a current source;receiving at the second oscillator positive and negative signals of the first differential signal set via second positive and negative input terminals of the second oscillator, respectively; andgenerating at the second oscillator a second differential signal set,
  • 25. The oscillation method of claim 24, wherein a positive signal of the second differential signal is input to the first negative input terminal of the first oscillator, and a negative signal of the second differential signal is input to the first positive input terminal of the first oscillator.
  • 26. The oscillation method according to claim 24, wherein the second oscillator comprises a plurality of MOSFETs having gate terminals connected between a load circuit and the current source as the second positive and negative input terminals.
  • 27. The method of claim 26, wherein the first differential signal set and the second differential signal set have a frequency which is lower than a frequency of the injection signal, and the positive and negative signals of the first differential signal set are in-phase (I) signals and positive and negative signals of the second differential signal set are quadrature-phase (Q) signals of the I signals.
  • 28. The method of claim 26, wherein the first differential signal set and the second differential signal set have one half the frequency of the injection signal.
  • 29. A frequency synthesizing method comprising: generating a frequency synthesized signal whose frequency is a synthesis of first high frequency I and Q signals and second high frequency I and Q signals;selecting one of the first high frequency I signal and the frequency synthesized signal and outputting a selected signal;inputting the selected signal into an oscillator; andgenerating a first local signal and a second local signal having a quadrature-phase with each other based on the selected signal.
  • 30. The frequency synthesizing method of claim 29, wherein each of the first and second local signal has a frequency identical to a frequency of the selected signal.
  • 31. The frequency synthesizing method of claim 29, wherein the first and second local signal each has a frequency which is one half a frequency of the selected signal.
Priority Claims (1)
Number Date Country Kind
10-2006-0001861 Jan 2006 KR national