Patent Application
20050048931
1. Field of the Invention
This invention relates generally to the field of wireless equipment design and, more particularly, to radio frequency (RF) modulator and demodulator design.
2. Description of the Related Art
The wireless world has become increasingly digitally oriented, leading Radio Frequency (RF) based design work to feature prominently in the scope of today's digital communications design. One effect of this development has been the prominence achieved by the development of modulators and demodulators, which provide a necessary RF interface for systems such as cordless phones, wireless networks, and wireless peripheral devices for computers, such as cordless mice, keyboards, etc. Considerations during design of such devices often include achieving low cost manufacturing, and assuring plug-and-play capabilities, very low power (for example, operating for a year or more on standard batteries), and high data rates for duty-cycle power savings.
There are many digital encoding standards that allow for the transmission of vast amounts of data over wireless RF interfaces in shorter periods of time. One well-known digital encoding technique based on frequency modulation (FM) is frequency shift keying (FSK), which in its simplest form provides two discrete RF frequencies that can be used as carriers to transmit two data states, which may correspond to the commonly used digital binary states of “1” and “0”, respectively. FSK modulators are many times implemented through the use of an I and Q (IQ) network performing “quadrature modulation”, where two out of phase (by 90°) carrier frequencies are modulated by the two separate digital binary states, respectively, as described above. In general, an IQ network produces two equal amplitude and quadrature phased output signals when provided with RF and Local Oscillator (LO) input signals.
Another widely used functional building block found in communications is the image reject mixer. A basic mixer is used to mix two frequencies and produce an output that consists of both the sum and difference frequencies. An image reject mixer performs the additional task of rejecting the frequency components that are produced as a result of the mixing process when one input to the mixer is an image of the desired signal. The IQ image reject up-mixer architecture incorporates the image reject mixer functionality into an IQ network operating as a quadrature modulation circuit. Commonly in such architecture, the IQ baseband channels are driven from a Digital to Analog Converter (DAC) generating the FSK modulating waveforms. Implementations of these IQ DACs are often complex due to a large number of bits required to reach adequate Signal to Noise ratios (SNRs). In addition to the complexity of the DACs, area consuming look-up tables are often used to drive these DACs. The tables typically provide the information used by the DACs to generate the modulated waveform.
Generally, most current implementations of IQ up-mixer architectures employ a vast array of standard DACs. Standard DAC implementations with low quantization noise typically require a substantial number of bits and are therefore complex, consume much more current, rely far more heavily on internal component matching, and generally consume lots more area and development time. As mentioned above, these implementations also require the use of look-up tables, which can be sizeable.
Alternative FSK modulators (direct modulators, in general) typically use a filtered digital bitstream signal to directly drive the associated Voltage Controlled Oscillator (VCO), hence omitting DACs altogether. A typical disadvantage of this approach is related to modulation accuracy, since VCOs typically have substantial tolerance on their control port. Direct VCO modulation also interferes with the PLL control loop, which places unwanted constraints on the digital bitstream, often requiring coding, for example Manchester coding. Alternatively, dual port systems are sometimes used, which in part solves the bitstream constraint issues, albeit at the expense of added complexity (added design time, current and area consumption.)
A standard direct modulation transmitter implemented in accordance with prior art is shown in
Therefore, there exists a need for a system and method for designing an accurate FSK modulator, which features very high accuracy in the baseband waveform, consumes low power, and can be implemented on a small die size with low complexity requiring a substantially short design time.
In one set of embodiments, the invention comprises a system and method that provides digital FSK modulation for a modulating bitstream using an IQ image reject up-mixer architecture with the waveforms coded directly into the digital-to-analog converters (DACs). In one embodiment the FSK modulation scheme uses sine and cosine signals in the I-channel and Q-channel, respectively, and the sine (cosine) waves are directly coded into the DACs. Quantization noise may thus be virtually eliminated, and no look-up tables may be required.
A radio transmitter system may be designed using an FSK modulator implemented in accordance with one set of embodiments of the present invention. The radio transmitter system may include an FSK coding logic circuit configured to receive a digital data input coupled to the inputs of an IQ modulation and image reject up mixer through a respective DAC and a respective LPF for each the I and the Q input paths. In one embodiment the FSK modulation scheme employs sine signals for the I-channel and cosine signals for the Q-channel, where the DACs provide sinusoid signals to the LPFs. Since only sine and cosine waves are used during FSK modulation, the sine (cosine) waves may be directly coded into the DACs. The output of the IQ modulation and image reject up-mixer may be connected to a power amplifier, which may be used to transmit the modulated signal via a loop antenna.
In one embodiment, current sources are used for generating respective output levels for each DAC. For encoding sine (cosine) waves, the number of current sources required for each DAC may equal one-half the oversampling rate. Gray-coding may be used for a digital representation and coding of the sine (cosine) waves. The radio transmitter system may also include a phase-locked loop (PLL) and voltage controlled oscillator (VCO) used for generating reference sine and cosine inputs into the respective mixers in the I-channel and Q-channel. Thus, the FSK coding logic circuit may provide a cosine wave signal to the Q-channel in accordance with the digital input, while the VCO may provide a sine wave signal to the mixer in the Q-channel. Similarly, the FSK coding logic circuit may provide a sine wave (sin) signal corresponding to a digital input value of ‘1’ and a negative of the sine wave signal (−sin) corresponding to a digital value of ‘0’ to the I-channel, while the VCO may provide a cosine wave signal to the mixer in the I-channel.
Thus, various embodiments of the invention may provide a means for FSK modulation using an IQ image reject up-mixer architecture with sinusoid signals used in mapping the digital input signal, and the sinusoid signals coded directly into the DACs of the FSK modulator.
The foregoing, as well as other objects, features, and advantages of this invention may be more completely understood by reference to the following detailed description when read together with the accompanying drawings in which:
While the invention is susceptible to various modifications and alternative forms, specific embodiments thereof are shown by way of example in the drawings and will herein be described in detail. It should be understood, however, that the drawings and detailed description thereto are not intended to limit the invention to the particular form disclosed, but on the contrary, the intention is to cover all modifications, equivalents, and alternatives falling within the spirit and scope of the present invention as defined by the appended claims. Note, the headings are for organizational purposes only and are not meant to be used to limit or interpret the description or claims. Furthermore, note that the word “may” is used throughout this application in a permissive sense (i.e., having the potential to, being able to), not a mandatory sense (i.e., must).” The term “include”, and derivations thereof, mean “including, but not limited to”. The term “connected” means “directly or indirectly connected”, and the term “coupled” means “directly or indirectly connected”.
Referring again to
½ sin(wct−wmt)+½ sin(wct+wmt). (1)
Similarly, the output of mixer 214b may be expressed by the equation:
½ sin(wmt−wct)+½ sin(wmt+wct), (2)
which may be re-written as:
−½ sin(wct−wmt)+½ sin(wct+wmt). (3)
Thus, the output of summation node 216 may be written as
sin(wct+wmt). (4)
Hence, the lower sideband may be suppressed, signaling a binary value of ‘1’, and −sin(wmt) may suppress the upper sideband, signaling a binary value of ‘0’.
In one embodiment, a 10 KHz signal frequency is considered, and the constraints for LPFs 212a and 212b are considered for a rejection greater than 40 dB. In this embodiment, an oversampling rate of sixteen would result in an effective sampling frequency Fs 250 of 160 Khz (10 KHz multiplied by sixteen) requiring no more than a first order LPF filter at 20 KHz, which may be implemented as, but not limited to, a Butterworth filter, with an effective rejection of 42 dB. An oversampling rate of sixteen together with the periodic nature of the sine and cosine waves lead to DACs 210a and 210b being required to generate no more than nine levels during conversion, and the use of sine and cosine waves for the mixer inputs in turn leads to the possibility of DACs 210a and 210b to be sine wave coded. In other words, since sinusoidal waves are expected as inputs by mixers 214a and 214b, the outputs of DACs 210a and 210b need not exhibit a linear behavior, and may be expected to generate sine waves.
The concept described above is illustrated in
In one set of embodiments, current sources may be used in coding the specific voltage levels for DACs 201a and 210b.
It should be noted that the values for oversampling, sampling frequency, and LPF considerations used above are for analysis purposes of preferred embodiments, and those values may be selected to be different from those presented. Similarly, while current sources were employed for generating the voltage levels for the DACs, other methods well known by those skilled in the art may equally be employed.
Thus, various embodiments of the systems and methods described above may facilitate design of an FSK modulator using IQ up-mixers with sinewave coded DACs. A transmitter constructed using the FSK modulator may include a PLL with an operating bandwidth independent from the rest of the modulator circuit. The transmitter is capable of transmitting infinite rows of 1's and 0's and does not require extra coding, such as Manchester coding, while achieving modulation accuracy consistent with cell phone quality requirements.
Although the embodiments above have been described in considerable detail, other versions are possible. Numerous variations and modifications will become apparent to those skilled in the art once the above disclosure is fully appreciated. It is intended that the following claims be interpreted to embrace all such variations and modifications. Note the section headings used herein are for organizational purposes only and are not meant to limit the description provided herein or the claims attached hereto.
