This application claims the benefit under 35 U.S.C. §371 of published PCT Patent Application Number PCT/EP 2010/068155, filed Nov. 24, 2010, which claims priority to EP patent application number 09176946.3 filed on 24 Nov. 2009, and was published as WO2011/064270A1 on Dec. 29, 2011, the entire contents of which is hereby incorporated by reference herein.
The present invention relates to a fuel injector communication system. In particular, the present invention relates to a system and method for communicating with an electronic ID chip that is integrated into an injector within a fuel injection system.
During manufacture of a fuel injection system for an engine it is customary to assign trim data to individual injectors to compensate for fueling and timing variations. The trim data (e.g. valve timing offset, nozzle flow offset etc.) is acquired during injector testing and currently is imprinted on the injector surface as a bar-code or dot-code.
During assembly of the injectors into the engine, the bar-code or dot-code is scanned (by either a human operator or by an automated scanning system) and uploaded into the engine control unit (ECU) where the trim information is used to correct the injections.
Relying on the scanning of a code in order to load the trim data into the ECU raises the possibility that an injector could be installed without loading corresponding trim data or even the possibility that a new injector is installed during a repair/service without scanning its code. In this latter case old trim data corresponding to the original (and now replaced) injector would be applied by the ECU to the new injector with adverse effects on exhaust emissions.
In addition to the above issues it is noted that emissions regulations (e.g. the proposed California Code Regulation 1962.2 (OBDII)-(f)(15.2.2)(F) Comprehensive Output Components) may require that tolerance compensation features (e.g. trim data) implemented in hardware or software during production or repair procedures shall be monitored to ensure the proper compensation is being used. It may further be a requirement that an engine system be able to detect when the compensation being used by the control system does not match the compensation designated for the installed component.
One possible solution to the above issues would be to manufacture components having design tolerances that were extremely accurate. This method would essentially eliminate the need for trim data (and by association the need to monitor trim data) because the components would be essentially identical. However, although such an approach might overcome the above issues it would almost certainly be prohibitively expensive to implement.
It is therefore proposed to integrate an electronic ID chip into the injector with a unique identity number. This can then be checked by the ECU to ascertain if the injector has been changed. A further possibility is that the trim data may be stored in the ID chip and read by the ECU.
If an ID chip is integrated into an injector then for convenience it would be desirable to communicate with the chip using the existing injector drive wires and furthermore using the existing injector drive and diagnostic circuitry. However, where injectors are grouped into banks with a common connection, it may become necessary for each ID chip to be associated with its own unique bus address (because otherwise isolating the communication to a single injector would not be possible since all injectors on the bank would see the same signal).
If each injector requires its own bus address then it would become necessary to connect the injectors individually during assembly into the engine and instruct the ECU which injector is associated with which cylinder. This point becomes important if trim data is included in the ID chip because the ECU will need to know which cylinder it needs to apply the various trim data it stores to. However, this is not an ideal method as it is open to operator error.
EP0868602B1 discloses the use of an EEPROM device for storing trim data in an injector. However, no indication of how the data is read is mentioned other than an ‘EEPROM reader’.
WO2008/128499A1 also discloses the use of an EEPROM device for storing trim data in an injector. Communication with the EEPROM is via an HF carrier wave superimposed on the injector wires with AM or FM modulation/demodulation at each end of the injector wires. Each injector uses a pair of wires for the carrier wave signal which requires individual modulation/demodulation circuits in the ECU as well as the injectors. The disclosure does not discuss how banked injectors are addressed.
It is therefore an object of the present invention to provide an injection system that overcomes or substantially mitigates the above-mentioned problems.
According to a first aspect of the present invention there is provided an injector for a fuel injection system comprising: input means for receiving drive signals from an injector drive circuit for controlling operation of the injector, and an ID chip, wherein the injector further comprises an electronic latch means arranged to move between a first state in which the electronic latch means is arranged to be enabled such that the ID chip is in communication with the injector drive circuit via the input means, and a second state in which the electronic latch means is arranged to be disabled such that the ID chip is not in communication with the injector drive circuit via the input means wherein the electronic latch means is arranged to move from the first state to the second state upon receipt at the injector of a drive pulse signal from the injector drive circuit.
The solution to the ID tag communication system provided by the present invention is the incorporation of an “electronic latch”, which can be in one of two states, the first state enabling communication with the injector drive circuit and the second state disabling communication with the injector drive circuit. The latch is arranged such that it moves from the first state to the second state upon receipt of a drive pulse signal from the drive circuitry. The electronic latch means therefore operates according to a “flip-flop” mode.
Since individual injectors can be sent individual drive pulse signals, the individual injectors in accordance with the first aspect of the present invention (and therefore the ID chips contained therein) can be addressed by the ECU/drive circuitry. Since the ECU knows which cylinder it is addressing, the ID chips no longer need unique bus addresses. The ID chips may be programmed with unique serial numbers for traceability and may even contain the trim data, but they can all have the same bus address. One particular advantage of the use of an electronic latch means in accordance with embodiments of the present invention is that existing injector drive lines/circuitry can be used to enable and disable communication with the ID chip within the injector. It is therefore unnecessary to provide additional circuitry as in prior art systems.
It is noted that the ID chip may have an activation voltage that is lower than the battery voltage of the drive circuit. In order to allow the ID chip to operate effectively, the injector may further comprise voltage translation means to step down the voltage of drive signals received from drive circuit to a voltage supply level of the ID chip. The voltage translation means may be provided by, for example, a bi-directional translator component. It is also noted that the voltage translation means would also allow signal output by the ID chip to be sent back to the ECU via the inputs/drive circuit without being swamped by normal operational voltage pulses within the system.
Preferably, the electronic latch means may be arranged to switch from the second state to the first state when the fuel injection system powers up. In this way, the ID chips can be placed into contact with the ECU during power up.
The electronic latch means may conveniently comprise an arrangement of transistors, a capacitor, and a diode. In one embodiment, the electronic latch means comprises first and second transistors which are connected such that once they are turned on, they remain on unless either a Hi-side bias voltage is removed or they are forced by a third transistor into an off state.
The injector may further comprise a delay capacitor to prevent the electronic latch means switching off during data communications with the ID chip. Conveniently, a third transistor may be switched on by an appropriate drive pulse signal in order to discharge the delay capacitor and thereby switch off the first and second transistors, and switch the electronic latch means back to the first state. Conveniently, a further transistor may be arranged to remain on while a voltage bias appears on a Hi side line thereby ensuring the electronic latch means can only turn on during initial power up.
Conveniently, one of the arrangements of transistors within the latch means may be used to power the ID chip.
Where the injector is a solenoid controlled injector, the drive signal may conveniently be arranged to initiate either an inductive kick from the solenoid or a voltage difference across the solenoid in order to disable the electronic latch means.
Conveniently, the ID chip may be arranged to output an ID response signal in response to a communication signal from an ECU connected to the drive circuit. The ID chip may further conveniently be an EEPROM device that is arranged to store identity data relating to the injector and/or trim data for use by the ECU in operating the injector.
In a further variation of the present invention, the electronic latch means may be arranged to be enabled (such that the ID chip is in communication with the injector circuit via the input means, the “first state”) in response to a first condition and may be arranged to be disabled (such that the ID chip is not in communication with the injector drive circuit via the input means, the “second state”) in response to a second condition. Conveniently, the first condition may comprise a first drive signal received from the injector drive circuit via the input means, and the second condition may comprise a second drive signal received from the injector drive circuit via the input means. The electronic latch means may conveniently be activated by sending a voltage pulse or pulses (first drive signal) from the injector drive circuit via the input means to the electronic latch means. A further drive signal may then be used to disable the latch means that are not required.
In order that normal voltage pulses (during normal injector operation) do not interfere with the enablement/disablement of the electronic latch means, the voltage pulse or pulses of the first drive signal may preferably comprise a voltage pulse exceeding a predetermined level for a predetermined length of time.
Where the injector is a solenoid controlled injector comprising an injector valve and the drive circuit is arranged, in a pull-in phase (also referred to as the “boost phase”), to apply a voltage pulse at a first voltage potential for a first period of time across the injector so that the valve is caused to move from a first state to a second state, and is arranged, in a hold phase, to apply a second voltage potential or series of pulses at a second voltage potential across the injector, the first drive signal may conveniently comprise a voltage pulse at the first voltage potential for a time period greater than the first period of time.
The electronic latch means may conveniently comprise an arrangement of transistors, a capacitor, and a diode, and the transistors within such an arrangement may be configured such that following a suitable voltage pulse (i.e. a high enough voltage applied for a sufficiently long period of time) the transistors in the arrangement of transistors latch together in order to connect the ID chip to the drive circuit via the input means.
The presence of the diode may conveniently be used to define a threshold time period that the first drive signal needs to be applied to the electronic latch means before it is enabled. Preferably, therefore, the first drive signal comprises a voltage pulse that exceeds the breakdown voltage of the diode and is of sufficient duration to allow the capacitor to fully charge.
In an alternative to the use of a first drive signal, the first condition may alternatively comprise a rising voltage at the inputs and the second condition may comprise a drive signal received from the injector drive circuit via the input means. The first condition in this alternative variation of the invention may be achieved by pulling down the injector lines within the associated drive circuit for a minimum period of time and then allowing the voltage potential on the injector lines to rise to the bias voltage of the drive circuit. With an appropriate arrangement of transistors, capacitors, and diodes within the electronic latch, this condition may be used to enable all of the latches within the engine system. A drive signal may again be used as the second condition to disable the latch means that are not required.
Regardless of the enablement mechanism used, the arrangement of the electronic latch means may be configured such that the drive signal of the second condition comprises a disable mechanism to discharge the capacitor and to unlatch the transistor arrangement.
According to a second aspect of the present invention there is provided an electronic control unit (ECU) for communicating with a first injector in a fuel injector system comprising a plurality of injectors, each injector comprising: inputs for receiving drive pulse signals from an injector drive circuit, an electronic latch means, and an integrated ID chip; the electronic control unit being arranged to: enable the electronic latch means of each injector within the fuel injector system such that each ID chip is connected to the inputs, send a drive pulse signal to each injector except the first injector within the fuel injector system, the drive pulse signal being arranged to disable the electronic latch means of the injectors receiving the drive pulse signal, send a communications signal to the first injector, and receive a response signal from the ID chip associated with the first injector.
Conveniently the injector may be the injector according to the first aspect of the present invention.
A diagnostic comparator component already present within the drive circuitry may conveniently be used to interpret the response signal output by the ID chip.
According to a third aspect of the present invention there is provided a method of communicating with a first injector in a fuel injector system comprising a plurality of injectors, each injector comprising inputs for receiving drive signals from a drive circuit, an electronic latch means and an integrated ID chip, the method comprising: enabling the electronic latch means of each injector within the fuel injector system such that each ID chip is connected to the inputs, sending a drive signal to each injector except the first injector within the fuel system, sending a communications signal to the first injector, and receiving at an electronic control unit a response signal from the ID chip associated with the first injector.
Each injector within the fuel system of the third aspect of the invention may conveniently be an injector according to the first aspect of the present invention.
In the third aspect of the invention a fuel injector system is provided in which each fuel injector comprises an electronic latch means that controls whether an ID chip integrated into the injector is operably connected to the inputs of the injector on which it is integrated. The electronic latches may all be enabled and then selective latch means disabled to leave a single injector in an enabled state. Communications signals (requesting either identification of the ID chip or a request for data stored on the ID chip) may then be sent to the enabled injector and the resultant response may be received at an electronic control unit (ECU). In a preferred embodiment the ECU controls the enable/disable functionality of the system.
A diagnostic comparator component already present within the drive circuitry may conveniently be used to interpret the response signal output from the ID chip.
It is noted that preferred features of the first aspect of the invention apply to the second and third aspects of the invention. The ECU of the second aspect of the invention and the method of the third aspect of the invention may be arranged to communicate with each injector of the fuel system in turn.
The invention extends to a carrier medium for carrying a computer readable code for controlling a computer or electronic control unit to carry out the method of the third aspect of the invention.
a and 4b show the structure of the electronic latch of
a and 5b show the structure of the electronic latch of
In the following description it is noted that like numerals are used to denote like features.
The present invention provides a mechanism for communicating with an ID chip integrated with an injector using existing drive wires and circuitry and existing diagnostic circuitry. In the embodiments described below a combination of drive pulses and/or rising voltages are used to turn specific “electronic latches” on and off in order to communicate with specific injectors. The “electronic latches” described below can be in one of two states, the first state enabling communication between the ID chip and an injector drive circuit and the second state disabling communication between the ID chip and the injector drive circuit.
Turning to
In
It is noted that the control of the solenoid valve is divided into two general categories, a so called “pull-in” phase and a “hold phase”.
During the pull-in phase, the armature of the solenoid-controlled valve is caused to close by the application of a first current level through the solenoid coil. During the hold phase a second, lower current level is supplied to the solenoid coil to keep the valve closed.
The driving current provided during the pull-in phase is often supplied by a capacitor which is charged when the valve is open. The capacitor and associated circuitry is hereinafter referred to as the “Boost circuit”. It is noted that not all injectors utilise a boost circuit during the pull-in phase. For example, light duty fuel injectors do not generally comprise a boost circuit and use battery voltage to provide the pull-in phase.
The driving current provided during the hold phase is supplied by applying the standard battery voltage across the solenoid coil in order to provide the second current level. A so-called “chopping circuit” controls the application of the battery voltage so that the required drive current supplied to the actuator throughout the injection is between defined thresholds.
The high side boost voltage may be typically 50V. Battery voltage (VBAT) is typically 12V-14V or 24V-28V.
The ID chip 14 is conveniently an EEPROM type using a single-wire communications (single IO connection). In order to communicate with the ID chip, which requires an approximately 5V supply, a bi-directional level translator 16 is used. This is provided by an N-channel MOSFET Q5 with its gate biased at VCC (typically 5V). This ‘shifts’ the injector bias voltage down to VCC. A voltage regulator consisting of D5, R5, Q6, D6 and C1 taps power from the low-side connection to provide a ‘parasitic’ dc power supply VCC. The capacitor C1 acts as a reservoir to maintain VCC constant during the brief time that the data-communications line 18 is in its ‘low’ state.
It is noted that V_INJ is typically the same as VBAT or higher and the bias voltage must be greater than VCC to maintain the parasitic supply. The return path is through ground i.e. the injector 12 must be grounded through the engine.
Communication from the ECU 20 to the injector ID chip 14 is carried out by pulsing Q1 with a defined pulse sequence that is recognised by the ID chip 14. The ID chip then responds with a series of digital pulses representing its own unique ID number. The bi-direction level translator 16 is used to step up the output voltage from U1 such that it is not swamped by the high side voltage.
During the time that the ID chip 14 is transmitting data, Q1 remains off and the power is provided by the bias resistors R3 and R4. The comparator U4 will detect the pulse train and pass it to the main ECU microcontroller 22 for checking against a previously stored value. Note that the bias voltage must be greater than VCC to maintain the parasitic supply. Also R3 and R4 must be chosen so that the loading of the ID circuit does not pull the bias voltage below VCC.
It should be noted that during the communication sequence, the injector high-side switch Q4 remains off. The signal return path is through the ground connection.
It is further noted that the ID chip would normally be polled during engine start up and so the communication process (which would typically last in the region of 100 milliseconds) would be essentially hidden to a vehicle user.
In the example of
As with
Since “electronic latches” are not utilised in
For example, during assembly it would be necessary to connect the injectors (12, 30, 32) individually into the engine and to instruct the ECU (not shown) which injector is associated with which cylinder. This is important if trim data is included in the ID chips so that the ECU can apply the trim to the correct cylinder. However, this is not an ideal method as it is open to operator error.
In the event that only one of the injectors (12, 30, 32) is then replaced then the system of
However, if more than one ID chip is replaced then this arrangement would not be capable of determining which ID chip was located in which cylinder. To fully address the prior art problems detailed above each ID chip (14, 34, 36) would require a unique bus address so that the ECU could communicate with each injector individually.
In the arrangement of
The electronic latch arrangement (68, 70, 72) is configured such that the latches are disabled (i.e. move from the first state to the second state) by normal injector operation. The latch may be configured to respond to either the inductive kick imparted to the injector or to the voltage difference between the high and low side lines (51a, 51b) during injection.
As the ECU 74 knows which cylinder it is addressing, the ID chips (62, 64, 66) no longer need unique bus addresses and may be programmed with unique serial numbers for traceability. The ID chips (62, 64, 66) may even store trim data but they can all share the same bus address.
Referring to the arrangement of
The boost/battery circuit 76 comprises an arrangement of diodes and transistors (D14, Q4 and Q20) that may be configured to supply either a boost voltage for use during a pull-in phase or battery voltage for use during a hold phase.
In particular it is noted that injector voltage may be supplied from the battery (VBAT) via diode D14 and transistor Q4 or from a Boost voltage (V_BOOST) via transistor Q20 and transistor Q4. The boost voltage (which is in the region of 50V) is normally applied during the pull-in phase of the injector and is typically never turned on for longer than 1 ms. After the pull-in phase the hold current is supplied from VBAT. During normal injections, one of the low-side switches Q1-Q3 will be turned on according to the cylinder firing sequence.
In the embodiment of
a shows one example of a latch circuit in accordance with embodiments of the present invention.
Referring to
To enable all of the latches (68, 70, 72), a ‘long’ Boost pulse may be applied to the injector high-sides with Q1-Q3 low-side switches off. Taking the example of the first injector 50, the boost voltage must be greater than the breakdown voltage of the Zener diode D23 (typically 30V) and long enough to allow the delay capacitor C22 to charge. If these conditions are met, Q21 will turn on and latch with Q22. This enables the parasitic supply for the ID chip 62 through Q21. The delay capacitor C22 also ensures that the latch remains latched when the DC bias is pulled low briefly during a data communication session. Similar processes occur in the second and third injectors 52, 54 which results in the second electronic latch 70 and ID chip 64 to latch/switch on and also the third electronic latch 72 and ID chip 66 to latch/switch on.
After the special Boost voltage pulse has been applied, all 3 injector latches (68, 70, 72) are enabled and therefore all ID chips (62, 64, 66) are connected to the ECU 74. In order for the ECU to initiate a communications session with one of these ID chips it is therefore necessary to disable two of the latches so that only one injector ID chip is enabled.
Referring still to
If the ECU 74 wishes to communicate with the ID chip 62 on the first injector 50 then by applying brief pulses to the injector coils (58, 60) that the ECU 74 does not wish to communicate with (using the high-side and low-side switches together), the resultant inductive kick from the injector coils (58, 60) will disable the latches (70, 72) on those injectors (52, 54). In this way the ECU 74 will ascertain which injector latch 68 remains enabled by a process of elimination and can then carry out communication with the selected ID chip 62.
The
This method does not require a long boost pulse but relies instead on the rising voltage at power-up and is suitable in all applications whether boost or no boost voltage is present. This latch type is referred to as type B. It is noted that the injector drive circuit 77 of
Operation of the electronic latch means 68 is described below in relation to injector 50 and ID chip 62. It is to be appreciated that the same latch arrangement and the same mode of operation may be used for latches 70 and 72.
In
When the injector and electronic latch means are in the powered down state, the delay capacitors C22 and C23 are fully discharged. When power is turned on (at, for example, engine start up), DC bias voltage is applied to the Hi-side line 51b which also appears on the Lo-side line 51a via the injector coil 56.
A voltage appears transiently on the base of Q22 via R32 and diode D24 until capacitor C23 charges via R31 and turns on Q24 shorting the anode of D24 to ground. The transient voltage on the base of Q22 will turn it on and pull the base of Q21 low via R28 and R23. This turns on Q21 which latches Q22 on via R25. The timing delays introduced by C23 and C22 are such that Q21 and Q22 latch on first before Q24 turns on.
After power up, Q24 remains on continuously due to the DC bias on the Hi-side line thus ensuring that the latch is only turned on during power up.
An output is taken from Q21 to power the ID chip 62 via D5 and Q6 (shown in
The latch 68 may be turned off by sending a drive pulse to the injector coil 56. This requires the Hi-side switch Q4 and Lo-side switch Q1 to be turned on together for a short time. The resulting voltage difference appearing across the injector coil 56 is detected by Q23 turning on via R29 and R30. When Q23 turns on, the capacitor C22 is discharged via R27 and D2. This turns off Q21 and Q22 and removes the power from the ID chip 62. Following the drive pulse therefore the latch 68 has moved from the first state to the second state.
The scheme described above in relation to
In the case of a brand new engine it is desirable to cycle around all the injectors before starting the engine in order to read the injector IDs for the first time.
In order to reset the latches, power must be removed to discharge the capacitors in the latch circuits. This may be accomplished by a “key-off-on” cycle but conveniently the low-side switches could be switched on for a time sufficiently long to discharge the latch capacitors. (The low-side switches short the bias voltage to ground effectively removing the power from the latch circuits).
Preferably, it is proposed only to interrogate the injectors on a cold engine since it is unlikely that the engine would still be warm after an injector change.
Alternative methods of disabling the latches are shown in
The alternative method in
The alternative method in
In the various latch mechanisms described above, once one ID chip has been selected the ECU may communicate with the chip via the appropriate bi-directional level translator (Q5, Q7, or Q15) and the responses from the ID chip may be detected by the comparator U4 (84) as detailed above.
As noted above in relation to
As a result of Step 100, all three latches are enabled thereby connecting the three ID chips to the ECU.
In Step 102, an inductive kick is applied to two out of the three injector arrangements by turning off the high and low side switches for two of the three injector arrangements. As a result of Step 102, two of the three latches are disabled thereby leaving one ID chip in communication with the ECU.
In Step 104, the ECU initiates a communications session with the enabled ID chip. The bi-directional level translator of the enabled injector arrangement (i.e. Q5, Q7 or Q9) is used to step down the bias voltage to the level required by the ID chip. The translator also steps up the voltage level of the response signals sent from the ID chip for onward transmission to the ECU. It is noted that the ECU may send a series of voltage pulses in order to send messages to the ID chip. The ID chip may respond with its identity or additionally with the trim data associated with its injector (Step 106). Once the communication session with the selected ID chip has ended the ECU may initiate a communication session with another ID chip and in this manner may address each ID chip in turn.
It is noted that the arrangement of
It will be understood that the embodiments described above are given by way of example only and are not intended to limit the invention, the scope of which is defined in the appended claims. It will also be understood that the embodiments described may be used individually or in combination.
In particular, the drive circuits, electronic latch circuits and general arrangements shown in
Number | Date | Country | Kind |
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09176946 | Nov 2009 | EP | regional |
Filing Document | Filing Date | Country | Kind | 371c Date |
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PCT/EP2010/068155 | 11/24/2010 | WO | 00 | 6/26/2012 |
Publishing Document | Publishing Date | Country | Kind |
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WO2011/064270 | 6/3/2011 | WO | A |
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