Claims
- 1. For use with a processor-controlled digital communication device adapted to process digitally encoded audio signals transported over a time division multiplex (TDM) communication path for assembly in accordance with a communication protocol, so that said audio signals may be transmitted over a digital communication link to a destination device, a method comprising the steps of:
(a) storing a prescribed quantity of said digitally encoded audio signals; and (b) coupling said prescribed quantity of digitally encoded audio signals to a signal waveform analysis operator.
- 2. The method according to claim 1, wherein step (a) further includes storing time stamp information representative of the time of occurrence of said prescribed quantity of digitally encoded audio signals relative to a prescribed time base, and step (b) further includes coupling said time stamp information to signal waveform analysis operator, so that said prescribed quantity of digitally encoded audio signals may be associated said time stamp information therefor by said signal waveform analysis operator.
- 3. The method according to claim 2, wherein said step (b) includes providing an output representation of said prescribed quantity of audio signals relative to timing information of said prescribed time base.
- 4. The method according to claim 1, wherein said processor-controlled digital communication device is operative to perform echo cancellation and compression of said digitally encoded audio signals as received from said TDM communication path, and to couple compressed, echo cancellation-processed audio signals over said TDM communication path to a host processor of said processor-controlled digital communication device, said host processor storing said prescribed quantity of digitally encoded audio signals in accordance with step (a), and coupling said prescribed quantity of digitally encoded audio signals to said signal waveform analysis operator in accordance with step (b).
- 5. The method according to claim 1, wherein said processor-controlled digital communication device comprises an integrated access device.
- 6. The method according to claim 1, wherein said echo cancellation comprises ITU G.168 echo cancellation and said compression comprises ITU G.726 adaptive differential pulse code modulation (ADPCM) compression.
- 7. The method according to claim 1, wherein said signal waveform analysis operator is operative to perform one of time and frequency domain analysis.
- 8. The method according to claim 1, wherein step (a) further includes storing a predetermined quantity of signaling events as supplied to said processor-controlled digital communication device by way of said digital communication link from said destination device, and step (b) comprises coupling said predetermined quantity of signaling events to said signal waveform analysis operator.
- 9. The method according to claim 8, wherein step (a) further includes storing time stamp information representative of the time of occurrence of said predetermined quantity of signaling events relative to said prescribed time base, and step (b) further includes coupling said time stamp information to signal waveform analysis operator, so that said predetermined quantity of signaling events may be associated said time stamp information therefor by said signal waveform analysis operator.
- 10. The method according to claim 9, wherein said step (b) includes providing an output representation of said predetermined quantity of signaling events relative to timing information of said prescribed time base.
- 11. A signal processing mechanism adapted for use with a processor-controlled digital communication device adapted to process digitally encoded audio signals transported over a time division multiplex (TDM) communication path for assembly in accordance with a communication protocol, so that said audio signals may be transmitted over a digital communication link to a destination device, said signal processing arrangement comprising:
a memory which is operative to store a prescribed quantity of said digitally encoded audio signals; and a stored signal transport path which is operative to couple said prescribed quantity of digitally encoded audio signals to a signal waveform analysis operator.
- 12. The signal processing mechanism according to claim 11, wherein said memory is operative to store time stamp information representative of the time of occurrence of said prescribed quantity of digitally encoded audio signals relative to a prescribed time base, and said signal transport path is operative to couple said time stamp information to signal waveform analysis operator, so that said prescribed quantity of digitally encoded audio signals may be associated said time stamp information therefor by said signal waveform analysis operator.
- 13. The signal processing mechanism according to claim 12, wherein said signal waveform analysis operator is operative to provide an output representation of said prescribed quantity of audio signals relative to timing information of said prescribed time base.
- 14. The signal processing mechanism according to claim 11, wherein said processor-controlled digital communication device is operative to perform echo cancellation and compression of said digitally encoded audio signals as received from said TDM communication path, and to couple compressed, echo cancellation-processed audio signals over said TDM communication path to a host processor of said processor-controlled digital communication device, said host processor being coupled with said memory storing said prescribed quantity of digitally encoded audio signals, and coupling said prescribed quantity of digitally encoded audio signals to said signal transport path for delivery to said signal waveform analysis operator.
- 15. The signal processing mechanism according to claim 11, wherein said signal waveform analysis operator is operative to perform one of time and frequency domain analysis.
- 16. The signal processing mechanism according to claim 11, wherein said memory is operative to store a predetermined quantity of signaling events as supplied to said processor-controlled digital communication device by way of said digital communication link from said destination device, and said signal transport path is operative to couple said predetermined quantity of signaling events to said signal waveform analysis operator.
- 17. The signal processing mechanism according to claim 16, wherein said memory is operative to store time stamp information representative of the time of occurrence of said predetermined quantity of signaling events relative to said prescribed time base, and said signal transport path is operative to couple said time stamp information to signal waveform analysis operator, so that said predetermined quantity of signaling events may be associated said time stamp information therefor by said signal waveform analysis operator.
- 18. The signal processing operator according to claim 17, wherein said signal waveform analysis operator is operative to provide an output representation of said predetermined quantity of signaling events relative to timing information of said prescribed time base.
CROSS-REFERENCE TO RELATED APPLICATION
[0001] The present application is a continuation-in-part of co-pending U.S. application Ser. No. 10/095,375, filed Mar. 12, 2002, by A. Ghobrial et al, entitled: “Echo Canceler and Compression Operators Cascaded in Time Division Multiplex Voice Communication Path of Integrated Access Device for Decreasing Latency and Processor Overhead” (hereinafter referred to as the '375 application), assigned to the assignee of the present application and the disclosure of which is incorporated herein.
Continuation in Parts (1)
|
Number |
Date |
Country |
Parent |
10095375 |
Mar 2002 |
US |
Child |
10337101 |
Jan 2003 |
US |