Claims
- 1. A full-color LED display system comprising:a screen module for displaying a multicolor image on a screen in which a multitude of first-color LEDs, second-color LEDs and third-color LEDs are orderly arrayed; and a data-sending module which is connected with the screen module via data-sending means, and which gives a control signal as well as image data, the image data being an assembly of gradation data for each colors of each pixels on the screen; on the screen module, there are installed: first-color gradation-control circuits, second-color gradation-control circuits and third-color gradation-control circuits respectively for each pixel on the screen for pulse-lighting the LEDs; data-transferring shift registers for giving the gradation data to the respective first-color gradation-control circuits, second-color gradation-control circuits and third-color gradation-control circuits; and one or a plurality of data-distributing circuits for distributing the gradation data given from the data-sending module to the data-transferring shift registers; the first-color gradation-control circuit, the second-color gradation-control circuit and the third-color gradation-control circuit comprise: an n-bit counter for counting high-speed pulse trains given from the data-sending module; a register for latching the gradation data given from the data-transferring shift register; a digital comparator for comparing magnitude between an n-bit count value from the n-bit counter and the gradation data latched to the register; and a constant-current driver for turning ON and OFF a current-passing to the LED according to a binary output or the digital comparator; the data-sending module comprises: a frame memory for temporarily storing image data to be displayed by the screen module; means for reading out the image data from the frame memory, and successively sending, to the screen module, the image data in a predetermined pixel order; first-color high-speed pulse-train generating means, second-color high-speed pulse-train generating means, and third-color high-speed pulse-train generating means for generating high-speed pulse trains to be given to the respective first-color gradation-control circuit, second-color gradation-control circuit and third-color gradation-control circuit; and means for sending, towards the screen module, the respective high-speed pulse trains for the respective first color, second color and third color; in the screen module, the gradation data for each colors of each pixels successively given from the data-sending module is respectively fed to the register in the gradation-control circuit for the corresponding color in the corresponding pixel via the data-transferring shift register and the data-distributing circuit; and the first-color high-speed pulse trains, the second-color high-speed pulse trains and the third-color high-speed pulse trains, given from the data-sending module, are respectively fed as a count input to the n-bit counter in the gradation-control circuit of the corresponding color; and the high-speed pulse-train generating means for the first color, the second color and the third color in the data-sending module repetitively generate, with a constant period, high-speed pulse trains of 2n pieces or a number closely therebelow, of which pulse intervals vary with time according to a varying characteristic having been set; and comprise: a waveform memory storing digital data in which the pulse trains are expressed as a static binary waveform pattern; and memory-data-reading means for repetitively generating, with a constant period, the high-speed pulse trains by read-accessing the waveform memory at a predetermined speed and in a predetermined order, and outputting, in series, the digital data of the binary waveform pattern.
- 2. A fullcolor LED display system according to claim 1, characterized in that:the first-color high-speed pulse-train generating means, the second-color high-speed pulse-train generating means, and the third-color high-speed pulse-train generating means are replaced by a single-system high-speed pulse-train generating means which is shared among process systems for tho first color, second color and third color; and the data-sending module sends the single-system high-speed pulse train towards the screen module.
- 3. A fullcolor LED display system comprising:a screen module for displaying a multicolor image on a screen in which a multitude of first-color LEDs, second-color LEDs and third-color LEDs are orderly arrayed; and a data-sending module which is connected with the screen module via data-sending means, and which gives a control signal as well as image data, the image data being an assembly of gradation data for each colors of each pixels on the screen: on the screen module, there are installed: one or a plurality of color-select circuits for selecting LEDs of one color among a set of first-color LED(s), second-color LED(s) and third-color LED(s) forming a same pixel on the screen; gradation-control circuits which are allotted respectively to each set of first-color LED(s), second-color LED(s) and third-color LED(s) forming a same pixel on the screen, for pulse-lighting the LED(s) with color selected by the color-select circuit; data-transferring shift registers for giving the gradation data to the gradation-control circuits; and one or a plurality of data-distributing circuits for distributing the gradation data given from the data-sending module to the data-transferring shift registers; the gradation-control circuit comprises: an n-bit counter for counting high-speed pulse trains given from the data-sending module; a register for latching the gradation data given from the data-transferring shift register; a digital comparator for comparing magnitude between an n-bit count value from the n-bit counter and the gradation data latched to a register; and a constant-current driver for turning ON and OFF a current-passing to the LED according to a binary output of the digital comparator; the first-color LED(s), the second-color LED(s) and the third-color LED(S) of the same pixel are connected in parallel to the constant-current driver via the select circuit; the data-sending module comprises: a frame memory for temporarily storing image data to be displayed by the screen module; means for orderly reading out first-color gradation data, second-color gradation data and third-color gradation data within the image data from the frame memory, and successively sending, to the screen module, the data in a predetermined pixel order; high-speed pulse-train generating means for generating high-speed pulse trains to be given to the gradation-control circuit; and means for sending the high-speed pulse trains towards the screen module; in the screen module: the gradation data, which is for each colors for each pixels given from the data-sending module, is fed to the register in the gradation-control circuit for the corresponding pixel via the data-transferring shift register and the data-distributing circuit; and the high-speed pulse trains, given from the data-sending module, are fed as a count input to the n-bit counter in the gradation-control circuit; the screen module comprises means for controlling the color-select circuit in synchronism with the image data given from the data-sending module, and lighting and activating the first-color LEDs according to the first-color gradation data in a first-color activating period, and lighting and activating the second-color LEDs according to the second color gradation data in a second-color activating period, and lighting and activating the third-color LEDs according to the third-color gradation data in a third-color activating period, divided-time intervals of the first-color activating period, the second-color activating period and the third-color activating period are set to be a short time to an extent in which human sight cannot recognize that the three colors are lighted with a time difference; the high-speed pulse-train generating means is means for orderly generating, with a constant period, high-speed pulse trains of 2n pieces or a number closely therebelow, of which pulse intervals vary with time according to a varying characteristic having been separately set for each color, and repeating this, in the respective first-color activating period, the second-color activating period and the third-color activating period; and comprises: a waveform memory storing digital data in which the pulse trains are expressed as a static binary waveform pattern; and memory-data-reading means for repetitively generating, with a constant period, the high-speed pulse trains by read-accessing the waveform memory at a predetermined speed and in a predetermined order, and outputting, in series, the digital data of the binary waveform pattern.
- 4. A fullcolor LED display system according to claim 1, characterized in that a structure of the high-speed pulse-train generating means in the data-sending module is replaced by function-arithmetic-operation means for repetitively generating, with a constant period, the high-speed pulse trains by conducting, at high speed, a function-arithmetic operation according to a program in which a time, until a succeeding pulse Pi+1 is output after a pulse Pi has been output, is expressed as a function of i.
- 5. A fullcolor LED display system according to claim 4, characterized in that the data-sending module comprises characteristic-varying means for changing the varying characteristic of the high-speed pulse trains by changing the function having been programmed to the function-arithmetic-operation means.
- 6. A fullcolor LED display system according to claim 1, characterized in that, as for a group of the LEDS with a same color in a plurality of pixels adjacently arranged on the screen, a group of the gradation-control circuits for the respective LEDS is integrated into one integrated circuit; and in the group of gradation-control circuits, one n-bit counter is shared amount the respective gradation-control circuits.
Priority Claims (2)
Number |
Date |
Country |
Kind |
11/79663 |
Mar 1999 |
JP |
|
11/88234 |
Mar 1999 |
JP |
|
CROSS REFERENCE TO RELATED APPLICATIONS
Applicants claim priority under 35 U.S.C. §119 of Japanese Application Nos. 11/79663, filed on Mar. 24, 1999 and 11/88234, filed on Mar. 30, 1999. Applicants also claim priority under 35 U.S.C. §120 of PCT/JP00/01832, filed ON Mar. 24, 2000. The international application under PCT article 21(2) was not published in English.
PCT Information
Filing Document |
Filing Date |
Country |
Kind |
PCT/JP00/01832 |
|
WO |
00 |
Publishing Document |
Publishing Date |
Country |
Kind |
WO00/57397 |
9/28/2000 |
WO |
A |
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