FuSe/Collaborative Research: Heterogeneous Integration in Power Electronics for High-Performance Computing (HIPE-HPC)

Information

  • NSF Award
  • 2329063
Owner
  • Award Id
    2329063
  • Award Effective Date
    10/1/2023 - 8 months ago
  • Award Expiration Date
    9/30/2026 - 2 years from now
  • Award Amount
    $ 325,403.00
  • Award Instrument
    Continuing Grant

FuSe/Collaborative Research: Heterogeneous Integration in Power Electronics for High-Performance Computing (HIPE-HPC)

The energy utilized for computing is more than 2 percent of global energy consumption, and a substantial fraction of it is wasted in the final stages of power delivery to microprocessors. Hence, efficiency improvement and size reduction (to overcome space limitations) are the main objectives for the next generation of power delivery solutions for high-performance computing. These require switches and inductors that can support higher voltages, currents, and frequencies with lower losses. Silicon (Si) complementary metal-oxide semiconductor (CMOS) technology can provide a high level of integration and control, but Si CMOS switches have higher switching losses. Wide-bandgap semiconductor materials enable better switches, but they cannot be easily integrated with the Si CMOS process. High-performance power delivery solutions also require compact integrated inductors that can support higher power, higher frequencies for miniaturization, and lower core losses. This Future of Semiconductors (FuSe) project uses co-designing and heterogeneous integration of wide-bandgap semiconductor devices and on-chip ferrite inductors with CMOS technology and a new power conversion architecture to develop next-generation integrated power delivery systems for high-performance computing. The project will have a significant scientific and societal impact by contributing to the technological foundations of highly efficient backside integrated power delivery systems for high-performance computing and enhancing US competitiveness in semiconductor manufacturing. The project will also strengthen the education of graduate and undergraduate students on essential topics of semiconductors, magnetics, power electronics, integrated circuits, high-performance computing, among other core technologies. An extensive workforce development program is also planned to attract students to the fields related to this project and to educate people already working in the industry with an emphasis on underrepresented groups. Outcome evaluation of the project’s research, education, and workforce development activities will be carried out using internal and external surveys for qualitative and quantitative data.<br/><br/>The 3D heterogeneous integration of power electronics for high-performance computing will be realized by leveraging an interposer having integrated magnetic inductors with new spin spray deposited ferrites, advanced high-voltage GaN switches, a novel single-stage point-of-load power converter architecture, and integrated high-voltage constant-frequency phase-shift control circuits in CMOS. Spin spray deposition of ferrites enables integrated thick ferrite films on-chip with a high relative permeability of ~3000 from aqueous solutions with readily tailored compositions at low temperatures of ~90C for integrated inductors and transformers on Si, printed circuit board, or other substrates for integrated power electronics. The high-voltage enhancement-mode GaN devices will utilize 3D sculptured field management to achieve record power figure-of-merits. The single-stage point-of-load conversion architecture can maintain zero-voltage and near-zero current switching across wide voltage and power ranges and enables high power density with high and flat efficiencies. Co-design of the power conversion architecture, CMOS integrated-circuits-based control, high-performance GaN switches, interposer with integrated magnetic components, and magnetic materials will help achieve compact and highly efficient integrated backside point-of-load power electronics for high-performance computing. This convergent co-design will be conducted by a qualified team with complementary expertise, ranging from wide-bandgap semiconductor switches, magnetic materials and integrated magnetic components, CMOS control circuits, and power conversion architectures. This activity will also result in new co-design methodologies leveraging circuit simulation and multi-physics analysis, and design tools.<br/><br/>This award reflects NSF's statutory mission and has been deemed worthy of support through evaluation using the Foundation's intellectual merit and broader impacts review criteria.

  • Program Officer
    Prem Chahalpchahal@nsf.gov7032927264
  • Min Amd Letter Date
    9/13/2023 - 8 months ago
  • Max Amd Letter Date
    9/13/2023 - 8 months ago
  • ARRA Amount

Institutions

  • Name
    Cornell University
  • City
    ITHACA
  • State
    NY
  • Country
    United States
  • Address
    341 PINE TREE RD
  • Postal Code
    148502820
  • Phone Number
    6072555014

Investigators

  • First Name
    Huili (Grace)
  • Last Name
    Xing
  • Email Address
    grace.xing@cornell.edu
  • Start Date
    9/13/2023 12:00:00 AM
  • First Name
    Khurram
  • Last Name
    Afridi
  • Email Address
    afridi@cornell.edu
  • Start Date
    9/13/2023 12:00:00 AM

Program Element

  • Text
    FuSe-Future of Semiconductors

Program Reference

  • Text
    Microelectronics and Semiconductors