GALVANIC POROUS SILOCON COMPOSITES FOR NANOENERGETICS AND MONOLITHICALLY INTEGRATED IGNITOR

Abstract

Porous silicon (PS) films composed of pores with diameters less than 3 nm are fabricated using a galvanic etching approach that does not require an external power supply. A highly reactive, nanoenergetic composite is then created by impregnating the nanoscale pores with the strong oxidizer, sodium perchlorate (NaClO4). The combustion propagation velocity of the energetic composite is measured using microfabricated diagnostic devices in conjunction with high-speed optical imaging up to 930,000 frames per second. Combustion velocities averaging 3,050 m/s are observed for PS films with specific areas of ˜840 m2/g and porosities of about 65-67%. Galvanic etching may also be used to fabricate other porous silicon morphologies and also strong oxidizers other than NaClO4 could be used to create a nanoenergetic porous silicon composite.

Description

BACKGROUND

1. Technical Field

The invention herein generally relates to a method of making a nanoenergetic device with an integrated ignitor based on porous silicon formed by a galvanic cell.

2. Description of the Related Art

Porous silicon (PS) is a widely studied material with applications for fuel cells, solar cells, and biology. The large specific surface area resulting from the nanometer scale pores within the PS structure yields a highly reactive material that is especially susceptible to oxidation. In addition to thermal oxidation in air and O₂, it is known that PS is capable of rapid oxidation and possible explosion with liquid O₂ nitric acid, sulfur, and strong oxidizing salts. This capability places PS alongside other nanoenergetic material systems where the small scale of the Si crystallite domains and large surface areas allow for an oxidation reaction that proceeds through the material at velocities (i.e. the flame propagation velocity) in the km/s range.

Recently, nanoenergetic materials have received attention for their rapid energy release rates, their use as additives in conventional energetic materials, and their possible use in Microsystems based applications. By using a galvanic etching mechanism to fabricate porous silicon, an energetic performance has been achieved comparable to that of traditional energetic materials.

A significant advantage of PS over other nanothermite materials composed of mixtures of fuel and oxidizer powders is its monolithic integration with a Si substrate, therefore making it compatible with Microsystems processing techniques. However, the conventional formation of PS requires the etching of Si with hydrofluoric (HF) acid based electrolyte in a custom Teflon etch cell using an external power supply, an approach not well suited for batch processing. Additionally, the conventional technique is very destructive to metal films on the substrate, greatly limiting the processing options for integration with electronics and MEMS. A commonly owned and pending patent application Ser. No. 12/535,141 filed on Aug. 4, 2009, presented a workaround to the aggressive nature of the etch and devices were made with this method, but it was a difficult process to practice. The disclosure of this patent application is hereby incorporated by reference.

In prior work, an electrochemical method was used to generate porous silicon for energetic applications. See patent application Ser. No. 12/535,141. However, in the present invention, a galvanic etching mechanism is used to generate porous silicon. With this method, a noble metal, such as gold or platinum is directly deposited on a silicon wafer and is in electrical contact with the silicon. When immersed in a hydrofluoric acid electrolyte, a current is generated between the silicon and a noble metal, and silicon etching occurs. With this method, an ignitor made of a stack of chrome/platinum/gold metal deposited by thin film deposition can be patterned onto a silicon substrate prior to porous silicon formation. Since the galvanic etch rate is much slower near gold than platinum, the silicon etch near the exposed gold of the ignitor wire is not very aggressive and the wire is undamaged during etching. On the contrary, in the electrochemical etching technique, the ignitor wire was shown to occasionally fail as the porous silicon would crack. Additionally, longer etching times were required with the electrochemical method to generate an appropriate amount of porous silicon material. Longer etch times lead to more exposure of the metal ignitor to hydrofluoric acid, which also degrades the wire.

SUMMARY

In view of the foregoing, an embodiment herein provides a process for making a nanoenergetic device with an integrated ignitor based on porous silicon formed by a galvanic cell.

The process includes using a series of ignitor and monitor wires made up of a stack of chrome/platinum/noble metal deposited by thin film deposition on a silicon substrate prior to forming the porous silicon. These wires are then immersed in a HF electrolyte and a current generated between the silicon and a noble metal to facilitate silicon etching.

These and other aspects of the embodiments herein will be better appreciated and understood when considered in conjunction with the following description and the accompanying drawings. It should be understood, however, that the following descriptions, while indicating preferred embodiments and numerous specific details thereof, are given by way of illustration and not of limitation. Many changes and modifications may be made within the scope of the embodiments herein without departing from the spirit thereof, and the embodiments herein include all such modifications.

BRIEF DESCRIPTION OF THE DRAWINGS

The embodiments herein will be better understood from the following detailed description with reference to the drawings, in which:

FIG. 1 is a flow chart of the fabrication process of the nanoenergetic device;

FIG. 2A is an illustration of a nanoenergetic device with a PS layer integrated with resistive Au wires and FIG. 2B is a close-up illustration of an Au igniter wire;

FIGS. 3A, B and C are images in profile of an on-chip nanoenergetic device—(a) prior to ignition, (b) 61 μs after ignition and (c) top view of a remnant of a single velocity wire after the combustion reaction;

FIG. 4A is an illustration of a galvanic etching mechanism used for on-chip PS formation and FIG. 4B is a SEM cross section of a galvanic PS layer bordering on a Si₃N₄ mask; and

FIG. 5A shows a velocity analysis of the PS—NaClO₄ reaction and FIG. 5B shows selected frames from high speed video analysis.

DETAILED DESCRIPTION OF PREFERRED EMBODIMENTS

The embodiments herein and the various features and advantageous details thereof are explained more fully with reference to the non-limiting embodiments that are illustrated in the accompanying drawings and detailed in the following description. Descriptions of well-known components and processing techniques are omitted so as to not unnecessarily obscure the embodiments herein. The examples used herein are intended merely to facilitate an understanding of ways in which the embodiments herein may be practiced and to further enable those of skill in the art to practice the embodiments herein. Accordingly, the examples should not be construed as limiting the scope of the embodiments herein.

Before describing the embodiments herein in detail, it is to be understood that the terminology used herein is for the purpose of describing particular embodiments only, and is not intended to be limiting.

The present invention includes a galvanic etching technique for formation of PS films that is more amenable to batch processing, does not require a custom etch cell or an external power supply, and is much less aggressive to metal films on the substrate. This method has previously been reported for creating porous silicon, though not for energetic purposes, which require significantly thicker layers than other applications of porous silicon. See Splinter, A.; Sturmann, J.; Benecke, W. Sens. Actuators, A 2001, 92, (1-3), 394-399 and Ashruf, C. M. A.; French, P. J.; Bressers, P.; Kelly, J. J. Sens. Actuators, A 1999, 74, (1-3), 118-122.

Significant improvements to the technique have been found in etch rate and layer thickness, and produced Microsystems integrated PS films with superior properties for nanoenergetics when PS is reacted with sodium perchlorate (NaClO₄). Flexibility of the technique has been found by using an on-chip method for determination of the flame velocity of the reaction that agrees well with high speed video taken of the reaction. The development of an on-chip diagnostic device for velocity measurement provides a complementary measurement to high speed video analysis. See Bhattacharya, S.; Gao, Y. F.; Apperson, S.; Subramaniam, S.; Shende, R.; Gangopadhyay, S.; Talantsev, E. J. Energ. Mater. 2006, 24, (1), 1-15. The method is low-cost relative to the expense of high speed video imagery (a high speed camera can cost >$100,000) and the data is generally much faster to analyze.

Here, resistive wires are patterned across a strip of PS such that a voltage placed across the wire is used to monitor the progression of the energetic reaction between PS and NaClO₄ although other strong oxidizer molecules could be used.

FIG. 1 is a flow chart of the fabrication process of the nanoenergetic device having a PS layer integrated with a series of resistive wires. The process contains six steps: 101 coat the silicon wafer with LPCVD Si₃N₄; 102 remove Si₃N₄ from the coated wafer; 103 deposit noble metal on side of wafer where Si₃N₄ has been removed, 104 galvanic etch to create PS; 105 deposit ignitor wire on PS; 106 impregnate PS with strong oxidixer; and 107 apply voltage to ignitor wire.

FIG. 2A shows a PS layer 12 integrated with resistive wires 1-8 for velocity testing. The fabrication is similar to previous work for PS energetic integration with Microsystems with a couple of important differences. See Currano, L. J.; Churaman, W. A. J. Microelectromech. 2009, 18, (4), 799-807. The differences in the present invention include the depositing of the ignitor and monitor wires prior to porous silicon etching, which eliminates damage to the porous silicon layer caused by photolithography used to create the ignitor and controller wires.

Briefly, the invention begins with a 1-20 Ω-cm doped Si wafer that has 600 nm of low-pressure chemical vapor (LPCVD) Si₃N₄ to serve as an etch mask. However, various other doping levels can be used. It should be noted the doping level affects the pore size and nature or the energetic reaction. The wafer can be either N- or P-type. A reactive ion etch removes S₃N₄ from one side of the wafer, referred to as the “backside” to expose Si where Pt is deposited by physical vapor deposition to function as the cathode during the galvanic etch. On the “frontside,” Si₃N₄ is selectively removed to expose areas of silicon where PS will be generated. “Bridges” of Si₃N₄ remain, which will form the base layer of the resistive wires used in monitoring the velocity.

FIG. 2A describes an illustration of a microfabricated nanoenergetic device with integrated Au wires 1 through 8, spaced 5 mm apart for velocity measurement along the length of the PS—NaClO₄ composite layer 12. But devices were also made with 2.5 mm and 10 mm spacing for each of the wires on the chip. These wires serve as resistors that can be monitored by a high speed oscilloscope (Tektronix DPO 3054) during the explosive reaction. Wire 1, the ignitor wire, is narrower than the controller wires 2-8. Each Au resistive wire is patterned on top of a Si₃N₄/chrome (Cr)/platinum (Pt) stack where the Si₃N₄ prevents delamination during PS formation and the Cr/Pt serves as an adhesion layer.

In commonly owned patent application Ser. No. 12/535,141 is described forming the porous silicon layer and then protecting it before deposition of the metal wires, as the wires are quickly peeled off the substrate pattern before the porous etch. Igniter wire 1 on the nanoenergetic device, as shown in FIG. 2A, initiates the PS—NaClO₄ reaction and tapers to a 25 μm wide strip including 3 μm of Cr, Pt, Au stack that overhangs the 19 μm wide Si₃N₄ to be in direct contact with the Si. The components in the stack have thicknesses of 20, 100 and 380 nm, respectively.

FIG. 2B shows a close-up illustration of the igniter wire. The remaining controller wires 2-8 are similar to the igniter wire, however they taper to a 50 μm wide strip. The length of the chips thus ranges from 1.75 cm to 7 cm. The array of controller wires 2-8 is described in commonly owned and pending patent application Ser. No. 13/308,631 filed on Dec. 1, 2011 and are shown here to highlight the utility of the galvanic etching mechanism. The disclosure of this patent application is hereby incorporated by reference.

FIG. 3A shows an image in profile of the on-chip nanoenergetic device prior to combustion. FIG. 3B shows an image taken 61 μS after the initiation of the flame created by the reaction of the PS—NaClO₄ composite layer. A deviation in the applied voltage across a wire indicates the time at which the flame front of the reaction passed. FIG. 3C shows a top-view of a remnant of a single velocity wire after the combustion reaction. As FIG. 3C clearly shows, the Au wires across the PS strip are completely removed by the explosive reaction when it passes. A high speed camera (Photron Fastcam SA5) captured the nearly 4 cm high flame as it propagated down the length of the device during PS—NaClO₄ combustion.

Experimental

For on-chip PS formation, a sputtered 170 nm thick Pt layer on the backside of the chip serves as the cathode during galvanic etching. Prior to sputtering Pt, the Si is sputter etched to remove any native oxide. For the Pt to adhere to the substrate, a rapid thermal anneal at 350° C. for 2 minutes is performed to partially convert the layer to platinum silicide. Upon immersing the entire lithographically patterned device in a HF based electrolyte, the oxidizing agent (H₂O₂) is reduced at the backside Pt cathode according to equation 1 and holes are injected into the Si substrate, as illustrated in FIG. 4A.

H₂O₂+2H⁺+2e⁻→2H₂O  (1)

FIG. 4A illustrates the galvanic etching mechanism used for on-chip PS formation and FIG. 4B discloses SEM cross section of the galvanic PS layer bordering the Si₃N₄ mask.

The circuit is completed as F⁻ oxidizes Si at the anode and H⁺ migrates to the cathode, where H⁺ and F⁻ arise from HF. The galvanic current is limited by the ratio of the cathode to anode surface areas and may be impacted by the electrode geometries which modify the etch rate and uniformity. The surface area ratio (SAR) of Pt to Si used here is approximately 5 and the exposed Si on the top of the substrate is centered with respect to the backside Pt layer. Notably, the etch rate is approximately 4.5 times higher than previous work using a 1:1 SAR. With the conditions applied here, excellent etch depth uniformity is obtained that varies only slightly from chip to chip. Higher or lower SARs can be used depending on the desired etch rate.

In order to fabricate PS with dramatically different porosities but similar thicknesses and pore sizes, as given in Table 1, two electrolyte compositions of 3:1 and 20:1 (vol:vol) of 49% HF in water and ethanol are used. The ethanol acts as a surfactant that enables wetting of the Si during etching. Other solution concentrations can be used to further tune the surface area, porosity, and pore size, as desired.

TABLE 1
PS Properties for 3:1 and 20:1 PS
Electrolyte	Thickness	Pore Size	Porosity	Surface Area
(HF:EtOH)	(μm)	(nm)	(%)	(m2/g)
20:1	~65-95	2.4-2.5	65-67	830-850
3:1	~65-95	2.8-2.9	79-83	890-910

In both cases, 2.4% by volume of the etching solution is composed of 30% hydrogen peroxide (H₂O₂) in water. Other H₂O₂ concentrations can be used to further adjust the etch rate, stability, and uniformity, but this value worked well for our experiments. The solutions are mildly stirred with a magnetic stir bar and a 10 minute etch time is used. As the scanning electron microscope (SEM) image in FIG. 3B shows, undercutting of the Si₃N₄ mask does occur as previously reported for both electrochemical and galvanic corrosion. While the image in FIG. 3B results from a 20:1 PS specimen, the PS thickness is similar for the 3:1 PS specimen as is expected since etch rate is primarily a function of H₂O₂ concentration and the ratio of exposed platinum to exposed silicon, and independent of HF concentration. However, the use of higher HF concentrations leads to a decrease in both porosity and pore size, and subsequently to a higher surface area.

Results of Energetic Testing

FIG. 5A shows a velocity on-chip analysis with the dotted lines indicating the time at which the voltage drops of the PS—NaClO₄ reaction (20:1 PS) composed of an oscilloscope readout and high speed camera images taken at 930,000 frames/s. FIG. 5B shows, respectively, from a 20:1 nanoenergetic PS specimen. The uppermost image in FIG. 5B is a top-view optical image used to reference the position of the flame front on the chip. The time stamps on the left of FIG. 5B indicate the elapsed time from the triggering signal. The velocities listed on the right side of the figure are computed as the distance to the flame front measured from the first visible flame front at 11.8 μs divided by the elapsed time from 11.8 μs.

As determined from the high speed camera analysis, this representative specimen shown in FIG. 5B displays an average velocity of 3,140 m/s from start to finish, and initiates near 1700 m/s. In FIG. 5A, velocity from wires 3 to 8 were monitored by the oscilloscope with a spacing between each wire of 5 mm. Thus, wires 3 and 5 were spaced by 10 mm and wires 5 and 8 by 15 mm. Each wire had 27 V placed across it initially, but the wire readouts are offset in FIG. 5A such that all the wires can easily be compared. Wires 3 and 8 show gradual negative slopes in the voltage prior to the sharp downward spike. This effect on multiple samples was observed and may be the result of initial heating or partial damage to the wire before the wire is completely destroyed. The image at 15.1 μs shows that the leading flame is very near the wire, while at 16.1 μs, the white circle indicates a small flame is well past the wire. Therefore, the oscilloscope reading of 15.5 μs for the initial decrease in voltage aligns well with the high speed camera images. The measured velocity from wires 3 to 8 using the oscilloscope data is 3170 m/s. Between wires 3 and 5, the velocity is 3220 m/s and between wires 5 and 8, the velocity is 3140 m/s.

The average reaction rates observed here are greater than 3000 m/s for the 20:1 galvanically-produced PS specimens and are dramatically faster than previously observed with conventional electrochemical etch procedures. Table 2 provides the average and maximum velocities measured for the 3:1 and 20:1 galvanic PS. The average velocity from the beginning to the end of the chip for at least three different PS—NaClO₄ measurements is reported from high speed video and oscilloscope data.

TABLE 2
Flame Propagation Velocities for 3:1 and 20:1 PS
	H.S. Video	Oscilloscope
Electrolyte	Velocity	Velocity
(HF:EtOH)	(Avg, +/−)	(Avg, +/−)
20:1	3050, 230	3100, 230
3:1	2170, 120	2080, 160

In summary, a galvanic etching approach was used to fabricate PS without the need of a power supply or custom etch cell. This method allows for batch fabrication of PS. Through conventional Microsystems lithography, galvanic PS is integrated with resistor wires that enable an on-chip flame propagation velocity measurement of PS—NaClO₄ combustion. High speed video analysis confirms that the on-chip technique can be used to determine the reaction velocity. The average velocity of PS—NaClO₄ was 2170 and 3050 m/s for PS with surface areas of ˜900 m²/g and ˜840 m²/g, respectively, and 65-67 and 79-83% porosities, respectively. A combination of higher surface area and lower porosity yields a near ideal oxidizer:fuel ratio, and is thought to give rise to the extremely fast velocities observed above 3000 m/s. By using different wafer types and resistivities, electrolyte compositions, and SARs, other PS morphologies are capable of being developed with this technique and can be used to tune to the reaction performance of the PS nanoenergetic composites.

The foregoing description of the specific embodiments will so fully reveal the general nature of the embodiments herein that others an by applying current knowledge, readily modify and/or adapt for various applications such specific embodiments without departing from the generic concept, and, therefore, such adaptations and modifications should and are intended to be comprehended within the meaning and range of equivalents of the disclosed embodiments. It is to be understood that the phraseology or terminology employed herein is for the purpose of description and not of limitation. Therefore, while the embodiments herein have been described in terms of preferred embodiments, those skilled in the art will recognize that the embodiments herein can be practiced with modification within the spirit and scope of the appended claims.

Claims

1. A method of making a nanoenergetic device with an integrated ignitor based on porous silicon formed by a galvanic cell comprising the steps of: coating a silicon wafer with low pressure LPCVD Si3N4;using standard microfabrication to remove a region of Si3N4 on the silicon wafer to expose Si where either PS will be generated or a platinum cathode will be deposited;depositing noble metal on side of wafer where Si3N4 has been removed;using galvanic etching to create a strip of PS having nanoscale pores;depositing on said strip of PS an ignitor wire made up of a chrome/platinum/noble metal stack;impregnating said strip of PS with a strong oxidizer; andapplying a voltage across said ignitor wire to heat the ignitor and ignite the PS.

2. The method of claim 1, wherein a series of additional monitor wires are deposited on the strip of PS.

3. The method of claim 1, wherein the combustion process is monitored by a high speed oscilloscope or video.

4. The method of claim 1, wherein the galvanic etching step uses an electrolyte composition of HF in water and ethanol.

5. The method of claim 4, wherein the electrolyte composition is HF in water and ethanol.

6. The method of claim 4, wherein the galvanic etching step uses a solution of H2O2 in water.

7. The method of claim 1, wherein the strong oxidizer is NaClO4.

8. The method of claim 1, wherein the noble metal is gold.

9. The method of claim 1, wherein the method is a batch process.

10. A nanoenergetic device with an integrated ignitor made up of a chrome/platinum/noble metal stack on PS formed by a galvanic cell.

11. A nanoenergetic device of claim 10, which also contains a series of monitor wires made up of a chrome/platinum/noble metal stack on PS formed by a galvanic cell.

12. A nanoenergetic device of claim 11, wherein the noble metal is gold.