Patent Grant
7753779
1. Field of the Invention
This description generally relates to the field of table gaming and, more particularly, to a system and method for communication with gaming chips.
2. Description of the Related Art
Gaming chips, or tokens, are used at various types of gaming tables as a substitute for currency. Identification of individual gaming chips is becoming important to gaming establishments, such as casinos, for a variety of reasons. For example, remote sensing systems, which identify the presence and/or characteristics of valid gaming chips, make it more difficult for individuals to use counterfeit gaming chips or gaming chips from other gaming establishments. Such systems may facilitate interaction of various casino functions, for example, accounting, tracking employee efficiency and/or awarding complimentary benefits (“comps”) to customers. Further, such systems may deter cheating at the gaming tables if bets during the game are monitored.
A recent development in the gaming industry is the tracking of individual player gaming activities by identifying and remotely monitoring movement of gaming chips. Tracking an individual player's gaming history by identifying and monitoring gaming chips allows the gaming establishment to identify and/or reward favored customers. Particularly lucky players and/or cheaters may be identified using such monitoring systems.
An exemplary system which allows remote identification of gaming chips is disclosed in French et al., U.S. Pat. No. 5,651,548, which discloses electronically-identifiable gaming chips which have been tagged with a radio frequency transmitter that transmits various information about the gaming chip, such as an individual identification number and/or the value of the chip. The gaming chip employs an electronic transmitter chip, an antenna, and an optional battery. In response to receiving an interrogation signal from a transmitter, the gaming chip communicates a radio signal to a receiving antenna. This system and method of identifying gaming chips is an application of the well known and commonly available radio frequency identification (RFID) technologies. However, the power required to transmit RFID signals from such gaming chips may be an issue because of the relatively large communication distances involved. Also, anti-collision techniques are required to prevent signal collision from two or more gaming chips simultaneously attempting to communicate with RF signals.
Accordingly, it is desirable to be able to facilitate communication with gaming chips using less power and without signal collision.
In one aspect, a radio frequency (RF) gaming chip communication system includes an embodiment for communicating information with gaming chips. The embodiment comprises a memory operable to store chip information, a first antenna communicatively coupled to the memory and operable to receive a first RF signal that comprises at least previous stack information, and a second antenna operable to communicate a second RF signal that comprises the previous stack information and the chip information, where in response to the second antenna communicating the second RF signal, the first antenna is further operable to communicate an RF acknowledgement signal to the communication system that transmitted the first RF signal.
In another aspect, an embodiment may be summarized as a method for communicating information with gaming chips, comprising receiving a first RF signal that comprises previous stack information with a first antenna positioned at least proximate to a first side of a first gaming chip, combining chip information with the previous stack information to determine current stack information, transmitting a second RF signal that comprises the current stack information with a second antenna positioned at least proximate to a second side of the gaming chip, and transmitting a first RF acknowledgement signal to the communication system that transmitted the first RF signal.
In another aspect, an embodiment may be summarized as an RF gaming chip communication system, comprising a plurality of gaming chips arranged in a stack of gaming chips with a first side of each gaming chip adjacent to a second side of a next gaming chip. Each gaming chip comprises a memory operable to store chip information; a first antenna and transceiver positioned in proximity to the first side of the gaming chip and communicatively coupled to the memory, operable to respond to a first RF signal communicated by an adjacent gaming chip in the stack, wherein the first RF signal comprises previous stack information, and wherein the first antenna and transceiver are further operable to communicate the previous stack information to the memory; a second antenna and transceiver positioned in proximity to the second side of the gaming chip and communicatively coupled to the memory, and operable to transmit a second RF signal comprising current stack information, wherein the current stack information corresponds to the previous stack information and the chip information. The RF gaming chip communication system further comprises an interrogator antenna and transceiver operable to initially communicate an interrogation RF signal to the plurality of gaming chips that are arranged in a stack, wherein the gaming chip in the stack closest to the interrogator antenna and transceiver is responsive to the interrogation RF signal, and wherein other gaming chips of the stack are not responsive to the interrogation RF signal.
In another aspect, an embodiment may be summarized as a method for communicating information with gaming chips, comprising transmitting a first RF signal to a stack of gaming chips having a bottom gaming chip and at least a second gaming chip adjacent to the bottom gaming chip, and wherein the bottom gaming chip is responsive to the first RF signal and the second gaming chip is not responsive to the first RF signal; transmitting a second RF signal from the bottom gaming chip in response to the first RF signal, wherein the second RF signal comprises information corresponding to the bottom gaming chip; and transmitting a third RF signal from the second gaming chip in response to the second RF signal, wherein the third RF signal comprises information corresponding to the bottom gaming chip and the second gaming chip, and wherein the bottom gaming chip is not responsive to the third RF signal.
In the drawings, identical reference numbers identify similar elements or acts. The sizes and relative positions of elements in the drawings are not necessarily drawn to scale. For example, the shapes of various elements and angles are not drawn to scale and some of these elements are arbitrarily enlarged and positioned to improve drawing legibility. Further, the particular shapes of the elements, as drawn, are not intended to convey any information regarding the actual shape of the particular elements and have been solely selected for ease of recognition in the drawings.
In the following description, certain specific details are set forth in order to provide a thorough understanding of various embodiments of the invention. However, one skilled in the art will understand that the invention may be practiced without these details. In other instances, well-known structures associated with computers, computer networks, communications interfaces, sensors and/or transducers, mechanical drive trains, and/or optical readers may not be shown or described in detail to avoid unnecessarily obscuring the description.
Unless the context requires otherwise, throughout the specification and claims which follow, the word “comprise” and variations thereof, such as, “comprises” and “comprising” are to be construed in an open, inclusive sense, that is as “including, but not limited to.”
Reference throughout this specification to “one embodiment” or “an embodiment” means that a particular feature, structure, or characteristic described in connection with the embodiment is included in at least one embodiment. Thus, the appearances of the phrases “in one embodiment” or “in an embodiment” in various places throughout this specification are not necessarily all referring to the same embodiment. Furthermore, the particular features, structures, or characteristics may be combined in any suitable manner in one or more embodiments.
The headings provided herein are for convenience only and do not interpret the scope or meaning of the claimed invention.
This description generally relates to various types of gaming environments that employ gaming chips or tokens as a currency medium. Other devices or systems associated with gaming, such as those used to automate, enhance, monitor, and/or detect some aspect of gaming establishment management or operation, may interface or otherwise communicate with the gaming chip communication system. Further, the gaming chip communication system itself may be used as a sub-element in such devices or systems.
For purposes of clarity and brevity, the gaming chip communication system described and illustrated herein may reference certain games such as blackjack. However, it is understood and appreciated that the gaming chip communication system is generally applicable to a variety of casino-type games, gaming tables, and/or operations. Further, the gaming chip communication system may be generally applicable to other recreational games that employ game chips, tokens, or the like. In addition, it is understood that the gaming chip communication system may be capable of identifying other token-like objects that do not necessarily correspond to a standard or conventional gaming chip, for example chips that are larger or smaller, shaped differently, and/or made from something other than traditional gaming chip materials.
Brief Overview of the Gaming Chip Identification System
The illustrated exemplary embodiment of gaming communication system 100 is illustrated in the context of a table game such as blackjack. Accordingly, two players 102a and 102b are playing a blackjack game dealt by dealer 104 onto gaming table 106. Each player 102a, 102b is positioned in front of a portion of the gaming table 106 that has illustrated thereon a plurality of betting areas 108 and card play areas 110.
The gaming chip communication system 100 comprises a means to communicate with gaming chips 200, a communication unit 112, and a processing system 114. Communication unit 112 and processing system 114 communicate with each other via network 116. Processing system 114 may include various user interface means, such as a keyboard 118, a display 120 or the like.
Generally, the betting area 108 is a marked portion of the gaming table 106 where players 102a and/or 102b may place their respective gaming chips 200 and/or money that is used for the bet or wager of the current game. The betting areas 108 are marked such that bets within the marked betting areas 108 are understood as being the bets for the current game. Gaming chips 200 or currency outside of betting area 108 are understood as not being part of the bet for the current game. Accordingly, the stacks 112a of gaming chips 200 in front of player 102a and within the betting area 108 are understood to be his current bet, and the stack 112b of gaming chips 200 in front of player 102b and within the betting area 108 are understood to be his current bet. Stacks 122 are understood not to be bet in the current game.
The dealer 104 retrieves cards 124 from a card shoe 126 or the like, and then deals the retrieved cards 124 into the respective card play areas 110a, 110b for the players 102a, 102b. Gaming chips 200 may be stored in a chip tray 128 so that gaming chips 200 may be conveniently retrieved for payout of winning bets and storage of gaming chips 200 taken after losing bets.
As will be described in greater detail hereinbelow, gaming chips 200 in the stacks 122a, 122b are in proximity to one or more interrogator antennas 406 (
In the embodiment illustrated in
Summarizing, RF communications between adjacent gaming chips 200 in a common stack 112 occurs without signal collision. Furthermore, even when a plurality of stacks 112 of gaming chips 200 are adjacent to each other in the same betting area 108, only adjacent gaming chips 200 in a common stack 112 communicate with each other, thereby avoiding signal collision with RF signals generated by other gaming chips 200 in adjacent stacks. The communication process used by various embodiments of the gaming chip communication system 100 which enables chip-to-chip communication without signal collision is described in greater detail hereinbelow.
Gaming Table Communication System
Seven groups of betting areas 108 and card play areas 110 are identified on the gaming table cover 302 which covers the playing area of the gaming table 106. As noted above, bets for the current game are made by placing one or more gaming chips 200 onto a betting area 108 (
In immediate proximity to each betting area 108 are a plurality of antennas 402, described in greater detail below. The antennas 402 may lie underneath the cover 302 in one embodiment. In other embodiments, the group of antennas 402 may be embedded in the gaming table 106, may be embedded within the table cover 302, or may be part of an indicia, such as a label or the like, which identifies a betting area 108 on the gaming table cover 302.
One of the antennas 402 is a power transmission antenna 404. Power transmission antenna 404 is coupled to a transmitter, referred to as the power transmitter (PT) for convenience. The power transmitter PT transmits an electromagnetic signal upward above the betting area 108 to the gaming chips 200. The power density of the RF signal remains sufficient, at least for a distance equal to the maximum height of a stack 112 of gaming chips 200, so that each gaming chip 200 in a stack 112 is operable to convert a portion of the transmitted electromagnetic signal into an amount of electrical energy that is sufficient to power the components of the gaming chip 200. When one or more stacks 112 of gaming chips 200 are placed in a betting area 108, each of the gaming chips 200 of each stack 112 will receive sufficient electromagnetic energy for their power requirements.
Each group of antennas 402 further includes at least one interrogator antenna 406. For convenience, three interrogator antennas 406 are illustrated in each of the groups of antennas 402. A transceiver (TR) is coupled to each interrogator antenna 406 in the illustrated embodiment of
The relative area encompassed by the three illustrated interrogator antennas 406 of an antenna group 402 corresponds to the size of a betting area 108. That is, if one or more stacks 112 of gaming chips 200 is placed in a betting area 108, the bottom gaming chip 200 of each stack 112 will be close enough to at least one of the interrogator antenna 406 to receive at least one interrogation signal.
For convenience, the power transmitter TP and the transceivers TS are illustrated as separate components aggregated in a common unit 408. The common unit 408 may be a single fabricated integrated circuit chip, a common enclosure where the power transmitter TP and the transceivers TS reside, or a suitable rack or shelf system where a power transmitter TP and a plurality of transceivers TS may be conveniently coupled to their respective antennas.
Since each gaming table 106 is likely to have a plurality of individual betting areas 108 and/or other areas of interest where an antenna group 402 is located, a communication unit 112 may be optionally used to process communications received from the transceivers TR. Communication unit 112 may then communicate with processing system 114.
Gaming Chip RF Tag
The transceivers 502a, 502b, processing system 510, and memory 512 are communicatively coupled to each other via communication bus 514. In alternative embodiments of a gaming chip 200, the above-described components may be communicatively coupled in a different manner than illustrated in
Memory 512 includes logic 516 for performing the various information processing and communication operations described herein. Memory 512 also includes a data region 518 for storing information of interest, such as, but not limited to, the value of the chip 200 and/or a serial number or other identifier which uniquely identifies the gaming chip 200. Other information of interest may be stored in the data region 518, such as, but not limited to, manufacture information, use history, etc.
As noted above, the power transmission antenna 404 (
Also illustrated in
In alternative embodiments, signal strength may be determinable such that the first transceiver 502a and first antenna 504a respond to the interrogation signal, while the second transceiver 502b and antenna 504b do not respond to the RF interrogation signal. That is, although the second transceiver 502b and antenna 504b do “respond” to the received signal in that a received signal is communicated from the second transceiver 502b and antenna 504b, the processing system 510 and/or logic 516 is operable to recognize that the signal detected by the second transceiver 502b and antenna 504b should not be responded to. For the purposes of this disclosure and the claims, in such embodiments, the second transceiver 502b and antenna 504b are said to “not respond” to the received signal for convenience.
In other embodiments, the received signal may be sufficiently weak that the signal cannot be reliably discerned by the second transceiver 502b and antenna 504b, or other signal processing system. The differences in detected signal strength between the first transceiver 502a and antenna 504a and the second transceiver 502b and antenna 504b arise in part due to free space signal strength degradation and/or in part due to signal attenuation caused by the chip material (if the chip material has signal attenuating characteristics). For purposes of this disclosure and claims, although the second transceiver 502b and antenna 504b do “respond” to the received signal in that a received signal is communicated from the second transceiver 502b and antenna 504b, a transceiver and/or antenna is “not responsive” if the strength of a received signal is so low that information in the signal is not meaningfully or accurately discernable by the processing system 510 and/or by logic 516.
During a table game where a gaming chip 200 is used for betting, the gaming chip is presumed to be laying flat on the surface of the betting area 108. Thus, the first transceiver 502a and antenna 504a are illustrated on the bottom portion of the gaming chip 200 in proximity to the interrogator antenna 406 such that the second transceiver 502b and antenna 504b are not responsive to the RF interrogation signal. It is understood that if the horizontal orientation of the gaming chip 200 is reversed, the second transceiver 502b and antenna 504b would be on the “bottom” portion of the gaming chip 200 in proximity to the interrogator antenna 406 such that the first transceiver 502a and antenna 504a will not be responsive to the RF interrogation signal. In either orientation, the transceiver and antenna closest to the interrogator antenna 406 is responsive to the RF interrogation signal. The transceiver and antenna farthest from the interrogator antenna 406 (corresponding to distance D2) are not responsive to the RF interrogation signal.
Chip-to-Chip Communication Protocol
At some point during the game, such as before the start of a current game and/or after the period for player betting has ended, it may be desirable to determine information about the gaming chips 200a-200c in the betting area 108. For example, it may be desirable to determine the total value of the gaming chips 200 in the first stack 602 and/or second stack 604, determine the value of all gaming chips 200 that may be within the betting area 108, or determine other information of interest such as serial numbers or the like of the gaming chips 200a-200c. It is appreciated that the gaming chip communication system 100, prior to the process of determining information about the gaming chips 200 in the betting are 108, will likely have no a priori knowledge of the information (such as value or identification information). That is, there could be any number of gaming chips 200 and/or number of chip stacks in the betting area 108. (Alternatively, the information could already be known from a prior determination and the current determination of information could be used for validation purposes.)
The chip-to-chip communication process using a signal protocol is now described in detail. An initial interrogation signal (a first RF signal) is transmitted from interrogator antennas 406a, 406b in response to some predetermined condition, such as, but not limited to, conclusion of a betting period or the like. The predetermined condition may be based upon some automatic device, or may be based upon some manual action by the dealer or other authorized person.
As noted above, due to free space loss and/or signal attenuation caused by the gaming chip material, a gaming chip transceiver 502 and antenna 504 may be responsive to an interrogation signal out to at least the distance D1, but not as far as the distance D2. This distance is denoted as DB1 (first broadcast distance) in
Also of note, since the distance D8 is greater that the distance DB1, the transceiver 502a and antenna 504a of gaming chip 200d would not be responsive to the interrogation signal from interrogator antenna 406a. Similarly, the transceiver 502a and antenna 504a of gaming chip 200a would not be responsive to the interrogation signal from interrogator antenna 406b. That is, because the distance at which a transceiver 502 and antenna 504 are responsive to an interrogation signal is limited, a plurality of interrogator antennas 406 may be used to provide sufficient signal coverage area for the betting area 108 and/or another area of interest on the betting table 106.
Continuing with the exemplary chip-to-chip communication process, the first transceiver 502a and antenna 504a of the first (or bottom) gaming chip 200a responds to the initial interrogation signal (the first RF signal). After the interrogating signal is received, the first transceiver 502a (
Associated with the request for information is at least one parameter that corresponds to, or is indicative of, the value of any gaming chips 200 below the current gaming chip that is receiving the request for information. For convenience, this value or parameter is referred to as the received stack value. Initially, gaming chip 200a is the first chip of the stack 602 such that the received stack value is zero or absent.
Upon receiving the request for information from the first transceiver 502a, the processing system 510 retrieves a value associated with the gaming chip 200a from data region 518 and adds the retrieved value to the received stack value to determine a new current stack value (now equal to the value of gaming chip 200a since it is the first gaming chip in stack 602).
Processing system 510 then generates and communicates a current stack value signal (corresponding to a current stack value, which is now equal to the value of gaming chip 200a) to the second transceiver 502b of gaming chip 200a. The second transceiver 502b of gaming chip 200a causes the antenna 504b to communicate a second RF signal. The second RF signal comprises a request for information from the next gaming chip in the stack 602.
This second RF signal is also a relatively low power signal. The transceiver 502a and antenna 504a of the gaming chip 200b are at a distance D3 from the antenna 504b of gaming chip 200a. Due to free space loss and/or signal attenuation from the gaming chip material, the first transceiver 502a and antenna 504a of the second gaming chip 200b are responsive to the transmitted second RF signal.
Because the transceiver 502b and second antenna 504b of the second gaming chip 200b are at a distance a distance D4 from the antenna 504b of gaming chip 200a, the transceiver 502b and second antenna 504b of the second gaming chip 200b are not responsive to the transmitted second RF signal. For convenience, this distance may be generally represented by the distance DB2 (second broadcast distance). Similarly, the transceivers 502a and 502b, and the antenna 504a and 504b, of the second gaming chip 200b are not responsive to the transmitted second RF signal because the exceed the second broadcast distance DB2 from the antenna 504b of gaming chip 200a. Accordingly, only the second gaming chip 200b is responsive to the second RF signal transmitted by the first gaming chip 200a.
In response to the transceiver 502a and antenna 504a of the second gaming chip 200b responding to the second RF signal transmitted by the gaming chip 200a, the first transceiver 502a (
Processing system 510 of the second gaming chip 200b generates and communicates the current stack value signal (corresponding to a current stack value now equal to the total value of gaming chips 200a and 200b) to the second transceiver 502b of the second gaming chip 200b. The second transceiver 502b of gaming chip 200a causes its respective antenna 504b to communicate a third RF signal, such as another interrogation signal or the like. This third RF signal includes at least the current stack value and corresponds to an information request that is to be received by the third gaming chip 200c of stack 602.
This third RF signal is also a relatively low power signal. The transceiver 502a and antenna 504a of the gaming chip 200c are at a distance D5 from the antenna 504b of gaming chip 200b. Accordingly, the first transceiver 502a and antenna 504a of the third gaming chip 200c are responsive to the transmitted third RF signal. The transceiver 502b and second antenna 504b of the third gaming chip 200c are not responsive to the transmitted third RF signal. For convenience, the distance may be generally represented by the distance DB3 (third broadcast distance). Accordingly, only the third gaming chip 200c is responsive to the third RF signal transmitted by the second gaming chip 200c. Other antennas in different gaming chips 200 are not responsive to the third RF signal. More particularly, the first gaming chip 200a is not responsive to the transmitted third RF signal.
In response to the transceiver 502a and antenna 504a of the third gaming chip 200c responding to the third RF signal transmitted by the gaming chip 200b, the first transceiver 502a (
Processing system 510 of the third gaming chip 200c generates and communicates a signal corresponding to the current stack value (now equal to the total value of gaming chips 200a, 200b, and 200c) to the second transceiver 502b of the third gaming chip 200c. The second transceiver 502b of gaming chip 200c causes its respective antenna 504b to communicate a fourth RF signal. This fourth RF signal includes at least the current stack value and corresponds to an information request signal that is to be received by the next adjacent gaming chip of stack 602.
However, the third gaming chip 200c is the last (top) gaming chip in the stack 602. Accordingly, the total value of the gaming chips in stack 602 has been determined. Discussed below is an acknowledgement protocol that ultimately lets the last gaming chip in a stack determine that there are no other chips to communicate to, and that causes that last gaming chip to communicate the current total value back to an interrogator antenna 406.
As an illustrative example, let chip 200a have a one dollar ($1) denomination, chip 200b have a five dollar ($5) denomination, and chip 200c have a ten dollar ($10) denomination. Initially, with respect to the interrogation signal, the current stack value is absent or equal to zero. After the first gaming chip 200a, the current stack value is $1. After the second gaming chip 200b, the current stack value is $6 ($1+$5). After the third gaming chip 200c, the current stack value is $16 ($1+$5+$10). As described in greater detail hereinbelow, the final stack value will be $16.
Acknowledgement Protocol
As discussed above, the processing system 510 of each gaming chip 200a-200c adds its respective value to the received stack value to determine a current stack value. Then, the processing system 510 generates and communicates the current value signal to its respective second transceiver 502b. The second antenna 504b communicates a next RF signal that is to be received by the next adjacent gaming chip 200.
The processing system 510 also generates and communicates an acknowledgement signal to its respective first transceiver 502a. This acknowledgement signal indicates to the previous gaming chip 200 that the previous gaming chip 200 is not the last (top) gaming chip in the stack. Accordingly, when an acknowledgement signal is received, that receiving gaming chip 200 determines that it has completed its role in the chip-to-chip communication process.
Returning to
Returning now to the bottom chip 200a in the stack 602, upon receipt of the acknowledgement signal from gaming chip 200a by the interrogator antenna 406a, a signal is communicated back to communication unit 112 by the transceiver TR such that the gaming chip communication system 100 at least knows that one or more gaming chips 200 are present in the betting area 108 associated with the antenna 406a. Such information is useful for data validating purposes. In some embodiments, this received acknowledgement signal may be ignored.
Similarly, after determining the current stack value by the second gaming chip 200b, its respective processing system 510 generates and communicates an acknowledgement signal to its first transceiver 502a and first antenna 504a (which previously responded to the first RF signal transmitted by the first gaming chip 200a). This second acknowledgement signal from the second gaming chip 200b is communicated to the second antenna 504b of the first gaming chip 200a.
Upon receipt of the acknowledgement signal from the second gaming chip 200b, a signal is communicated back to processing system 510 by transceiver 502b such that the first gaming chip 200a at least knows that another gaming chip 200 is stacked on top of it. That is, gaming chip 200a determines the presence of gaming chip 200b in its respective stack 602. Gaming chip 200a takes no further action during the remaining portion of the chip-to-chip communication process.
In a similar manner, the second gaming chip 200b receives an acknowledgement signal from the third gaming chip 200c. Since gaming chip 200b determines that it is not the last gaming chip of the stack 602, gaming chip 200b takes no further action.
However, in this illustrative example, the third gaming chip 200c is the last chip in stack 602. After transmitting the above-described fourth RF signal from its second antenna 504b, gaming chip 200c waits for some predetermined period of time for an acknowledgement signal. Since there is no gaming chip on top of the third gaming chip 200c (it is the top-most gaming chip in stack 602), the awaited acknowledgement signal will never be detected because there is no gaming chip to initiate the awaited acknowledgement signal. Accordingly, the third gaming chip 200c determines that it is the last gaming chip, or topmost gaming chip, in stack 602 in this illustrated example.
Logic 516, or another suitable timing means, times a predetermined period of time. If no acknowledgement signal is received upon the expiration of the time period, processing system 510 determines that it is the last gaming chip 200 in stack 602. Thus, the current stack value, here equal to the total value of gaming chips 200a, 200b, and 200c, corresponds to the total value of gaming chips in stack 602. This information is now communicated back down to the interrogator antenna 406a, or to another suitable antenna, depending upon the embodiment. For convenience, this signal communicated from the top-most gaming chip in a stack is referred to as the “final value signal.”
In other embodiments of the gaming chip communication system 100, the final value signal is passed back down the stack of gaming chips 200. Thus, in the illustrative example of
In one embodiment, one or both of the transceivers 502a or 502b is configured to transmit a relatively high strength RF final value signal that is detectable by the interrogator antenna 406a. In the illustrative example of
Overlapping Chip-to-Chip Communications
In the above described embodiments, chip-to-chip communications were generally limited between the closest antennas of adjacent gaming chips 200. For example, the second transceiver 502b and antenna 504b of the first gaming chip 200a was limited to communicating with the first transceiver 502a and antenna 504a of the second gaming chip 200b. Thus, initial orientation of gaming chips 200 in a stack did not affect the above-described chip-to-chip communications. However, in some embodiments, a communicated RF signal may be received by both the first transceiver 502a and antenna 504a, and the transceiver 502b and second antenna 504b of an adjacent gaming chip 200. Similarly, in some embodiments, the initial interrogation signal (first RF signal) may be detectable by both the first transceiver 502a and antenna 504a, and by the second transceiver 502b and antenna 504b of the first gaming chip 200 in a stack.
For example, in some embodiments, the relative size of the interrogator antenna 406, and/or position of the interrogator antenna 406, may be such that the first (bottom) gaming chip 200 of two or more stacks receives the initial interrogation signal from only one of the interrogator antennas 406. The logic 516 (
Similarly, the first gaming chip 200 of two or more stacks may receive multiple interrogation signals from a plurality of different interrogator antenna 406. The logic 516 (
In some alternative embodiments, the second RF signal transmitted by the first gaming chip 200a may also be detectable by the second transceiver 502b and antenna 504b of the second gaming chip 200b (for example, the case where DB2 is at least equal to D4). However, the logic 516 (
In such an embodiment, to avoid miscommunications and/or signal collisions, the third gaming chip 200c should not be responsive to the second RF signal transmitted by the first gaming chip 200a. So long as only an adjacent gaming chip 200 is responsive to the RF signal communicated from the adjacent gaming chip, the above-described chip-to-chip communications employed by the various embodiments of the gaming chip communication system 100 will operate as intended.
Alternative Communication Formats
In the various above-described embodiments, a current total stack value was determined by each of the processing systems 510 by adding the value of its respective gaming chip 200 to the received stack value. Alternatively, other information protocols or formats may be used to communication information about gaming chips 200 in a stack.
Returning to
As an illustrative example, let chip 200a have a one dollar ($1) denomination, chip 200b have a five dollar ($5) denomination, and chip 200c have a ten dollar ($10) denomination. Initially, with respect to the interrogation signal, the current stack value is absent or equal to zero. After the first gaming chip 200a, the current stack value is $1. After the second gaming chip 200b, the current stack value is the string of values $1, $5. After the third gaming chip 200c, the current stack value is the string of values $1, $5, $10. Accordingly, the processing system 114 or another suitable processing system could determine the value of the stack to be $16. Alternatively, serial numbers or other suitable gaming chip identifiers could be linked or otherwise associated such that processing system 114 or another suitable processing system could determine the value of the stack to be $16. All such variations are intended to be within the scope of this disclosure.
As noted above, gaming chips 200 may be stored in a chip tray 128 (
The illustrated portion of the chip tray 128 comprises a plurality of chip stack-trays 702, a plurality of interrogator antennas 704, at least one power transmission antenna 706, at least one power transmitter TP, and a plurality of transceivers TS. The term “stack-tray” used herein denotes a routed or formed portion of the chip tray 128 that is configured to hold a stack of chips.
The power transmitter TP and the transceivers TS are illustrated as separate components aggregated in a common unit 408, which is communicatively coupled to the above-described communication unit 112 (
Chip stack-tray 702b illustrates three gaming chips 200a-200c residing therein. The interrogator antenna 704 transmits the above-described interrogation signal to the gaming chip 200a to initiate the above-described chip-to-chip communication processes.
Accordingly, a plurality of gaming chips 200, which are commonly stored in chip stack-tray 702, communicate with each other such that the above-described RF signals are communicated from one gaming chip to the next until the last gaming chip 200 in chip stack-tray 702 is reached. (In the illustrative example of
For brevity, only a portion of a chip tray 128 is illustrated in
For convenience, each of the chip stack-trays 702 was illustrated as having its own power transmission antenna 706. Alternatively, power transmission antennas 706 may be located in other convenient locations, such as between chip stack-trays such that a power transmission antenna 706 provides power to gaming chips 200 residing in two adjacent chip stack-trays 702. Or, a larger power transmission antenna 706 might be used to provide power to gaming chips 200 residing in a plurality of chip stack-trays 702.
Other embodiments of the gaming chips 200, and the various embodiments of the communication systems and/or protocol described herein, are understood to be equally adaptable to a gaming chip tray 128. However, for brevity, the various possible alternatives are not described in detail herein. All such variations are intended to be within the scope of this disclosure.
Gaming chips 800 employ the above-described acknowledgement protocol so that preceding adjacent chips can determine that there are adjacent gaming chips to communicate with, or so that the last gaming chip 800 of a stack can determine that it is the last gaming chip 800. However, in contrast to the above-described gaming chip 200 embodiments employing two antennas and transceivers, the gaming chip 800 embodiments employing the single communication antenna 804 and the single transceiver 806, which are operable to respond to RF signals from a lower gaming chip 800, are operable to transmit another RF signal to the next gaming chip 800 in a stack after the current stack value is determined by that gaming chip 800, and are operable to transmit the above-described acknowledgment signal back to the lower gaming chip 800. An illustrative example is provided below to describe the chip-to-chip communications used by embodiments of the gaming chip 800.
An initial interrogation signal (a first RF signal) is transmitted from interrogator antenna 406 in response to some predetermined condition, such as, but not limited to, conclusion of a betting period or the like. As noted above, the transceiver TR transmits a relatively low power interrogation signal. Due to free space loss and/or signal attenuation from the gaming chip material, a gaming chip 200 must be within at least the distance D1, but not as far as the distance D2, for that gaming chip 200 to be responsive to an interrogation signal. Accordingly, the antenna 804 and transceiver 806 of gaming chip 800a respond to an interrogation signal from interrogator antenna 406.
The first (or bottom) gaming chip 800a, upon responding to the initial interrogation signal, initiates the chip-to-chip communication process. The antenna 804 and transceiver 806 respond to the initial interrogation signal (the first RF signal). Then, the transceiver in transceiver 806 (
Processing system 510 generates and communicates the current stack value information (corresponding to a current stack value now equal to the value of gaming chip 800a) to the transceiver 806 of gaming chip 800a, which causes its respective antenna 804 to communicate a second RF signal.
This second RF signal is also a relatively low power signal. The second gaming chip 800b is responsive to the transmitted second RF signal. The maximum distance of detectability of the second RF signal is less than distance D4 such that the second antenna 504b of the second gaming chip 200b does not respond to the transmitted second RF signal.
In response to the antenna 804 and transceiver 806 of the second gaming chip 800b responding to the second RF signal transmitted by the gaming chip 800a, the transceiver in the transceiver 806 (
This third RF signal is also a relatively low power signal such that the antenna 804 and transceiver 806 of the third gaming chip 800c are responsive to the transmitted third RF signal. Other gaming chips 800 that are above the third gaming chip 800c would not be responsive to the third RF signal due to free space loss and/or signal attenuation from the gaming chip material.
Additionally, the first gaming chip 800a would receive the transmitted third RF signal. Information in the third RF signal would be included to indicate to the first gaming chip 800a that the second gaming chip 800b has received the previously-transmitted second RF signal. Accordingly, the first gaming chip 800a determines that it is not the last gaming chip 800 of the stack 902. Thus, the third RF signal received by the first gaming chip 800a corresponds to the above-described acknowledgement signal.
When the antenna 804 and transceiver 806 of the third gaming chip 800c responds to the third RF signal transmitted by the gaming chip 800b, the transceiver in the transceiver 806 (
However, the third gaming chip 800c is to last (top) gaming chip in the stack 902. Accordingly, the total value of the gaming chips in stack 902 has been determined. Since the third gaming chip 800c does not detect a subsequent RF signal (that would otherwise be transmitted by a gaming chip above it), the third gaming chip 800c determines that it is the last gaming chip 800 of the stack 902 after some elapsed period of time. Accordingly, the last gaming chip 800c communicates the current total value back to an interrogator antenna 406 or another suitable antenna in any of the manners described herein.
Also, as illustrated in
In some embodiments, communication unit 112 (
With respect to
Preferably, the first transceiver 502a, second transceiver 502b, power conversion element 506, processing system 510, and memory 512 are fabricated together on a common integrated circuit (IC) chip. In other embodiments, one or more of the components may be fabricated separately and communicatively coupled to other components using any suitable means.
The antennas 504a, 504b, and 508 were illustrated as external to the RF tag 202. For example, one or more of the antennas 504a, 504b, and 508 could be separately fabricated and attached to the gaming chip 200, such as on a label or the like. Alternatively, one or more of the antennas 504a, 504b, and 508 could be included as part of the RF tag 202, such as a component of an IC circuit.
In the above-described embodiments, the processing system 510 (
In other embodiments, a state machine or the like may perform the stack value calculations. Or, information from the interrogation signal may be stored directly into the memory 512 by an antenna and/or by an intermediary device (that is not a transceiver). In other embodiments, an equation or other representation may be modified by each gaming chip such that solution of the equation results in a determination of the value of the gaming chips in the stack.
In yet other embodiments, the above-described transceivers 502a and/or 502b may be implemented as a separate receiver and a separate transmitter. Or, one receiver and one transmitter may be coupled to both of the antennas. A switch means or the like would be operably to switch to the appropriate antenna, or communicate signals with the appropriate antenna, such that the above-described chip-to-chip communication signals are selectively received and transmitted.
In some embodiments, directional antennas may be used for the above-described antennas 406, 504 and/or 704. Directional antennas direct communicated signals in a direction of interest and accordingly. Orienting the direction of communicated signals would reduce the probability of signal collisions between gaming chips of adjacent stacks. For example, if directional antennas 504 in a gaming chip 200 are oriented to radiate communicated signals in a direction perpendicular to the face of a gaming chip 200, the communicated signals would be more directed to the adjacent gaming chip 200 in its stack. Here, the first directional antenna 504a would be operable to receive the first RF signal and/or interrogation signal when the signal is aligned in a direction substantially perpendicular to a face of the gaming chip 200, and a second directional antenna 504b would be operable to communicate the second RF signal in a direction substantially perpendicular to the opposing face of the gaming chip 200. Thus, the directional antenna would transmit communication signals where the strength of signal portions radiating out to gaming chips in adjacent stacks would be reduced. All such modifications and variations are intended to be included herein within the scope of this disclosure.
In alternative embodiments, communicated signals may be of any suitable portion of the electromagnetic spectrum. For example, communication signals may be in the microwave or radar ranges of the electromagnetic frequency spectrum. Such signals are also referred to herein as RF signals for brevity and convenience. All such modifications and variations are intended to be included herein within the scope of this disclosure.
In some embodiments, the interrogator antenna 406 and its associated transceiver TR may be used to provide electrical power to the gaming chips 200 of a stack. For example, some aspect of the electromagnetic signal communicated to the gaming chips by the interrogator antenna 406 may be different from an interrogation signal, such as frequency and/or signal strength (amplitude). The antenna 508 could receive the communicated energy and convert it to electrical energy as described above. In yet other embodiments, one or both of the antennas 504a and/or 504b could receive the transmitted electromagnetic signal and convert it into electrical power. All such modifications and variations are intended to be included herein within the scope of this disclosure.
The process illustrated in
The process illustrated in
The process illustrated in
Blocks 1214, 1216, 1218, and 1220, described below, are repeated for each of the remaining gaming chips in the stack. Chip information of the current adjacent gaming chip is added to the chip information of the preceding gaming chip to determine current stack information at block 1214. The current stack information is transmitted from the second antenna and transceiver of the current gaming chip to the first antenna and transceiver of a next adjacent gaming chip in the stack at block 1216. An acknowledgement signal is transmitted from the first antenna and transceiver of the current gaming chip in the stack to the previous gaming chip at block 1218. A determination is made whether the current gaming chip is the last gaming chip in the stack at block 1220. Upon determination that the current gaming chip is the last gaming chip in the stack, the process proceeds to block 1222. Final stack information is transmitted from the last gaming chip in the stack at block 1222, wherein the final stack information is received by the interrogation antenna and transceiver, and wherein the final stack information corresponds to the current stack information determined by the last gaming chip. The process ends at block 1224.
The preferred embodiment of the gaming chip communication system 100 may be implemented as firmware, software, or other computer-readable medium executed by a digital signal processor. However, the preferred embodiment of the gaming chip communication system 100, and/or alternative embodiments, may be implemented as hardware, or a combination of hardware and firmware. When implemented as hardware, the gaming chip communication system 100 can be constructed of any of the commonly employed technologies as are well known in the art. Any such implementations of the gaming chip communication system 100 are intended to be within the scope of this disclosure.
The various embodiments described above can be combined to provide further embodiments. Aspects of the present systems and methods can be modified, if necessary, to provide yet further embodiments.
These and other changes can be made to the present systems and methods in light of the above-detailed description. In general, in the following claims, the terms used should not be construed to limit the invention to the specific embodiments disclosed in the specification and the claims, but should be construed to include all power systems and methods that read in accordance with the claims. Accordingly, the invention is not limited by the disclosure, but instead its scope is to be determined entirely by the following claims.
This application claims the benefit under 35 U.S.C. §119(e) of U.S. Provisional Patent Application Ser. No. 60/814,664 filed Jun. 16, 2006.
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