This application claims priority to Chinese Patent Application No. 202210735769.2, filed Jun. 27, 2022, the entire disclosure of which is incorporated herein by reference.
The present application relates to the display technology field, in particular to a gate drive circuit, a gate driving method and a display device.
With the continuous improvement of the refresh rate and resolution of the display screen, the charging time of the panel is gradually shortened. Among the schemes to improve the charging rate and prevent wrong impact, the commonly used schemes are to add two-way VGH (high-level) and two-way VGL (low-level). This method requires a single two-way VGH and a single two-way VGL, resulting in a total of four separate circuits, and each separate circuit needs to be equipped with a separate energy storage element, which has high cost.
There are provided a gate drive circuit, a gate driving method and a display panel according to embodiments of the present application. The technical solution is as below:
According to a first aspect of the present application, there is provided a gate drive circuit including:
According to a second aspect of the present application, there is provided a gate driving method applied to any one of the gate drive circuits as described above. The method includes:
According to a third aspect of the present application, there is provided a display device including: a display panel having a display area provided with sub-pixels arranged in an array; and the gate drive circuit according to any one described above including a first shutdown circuit, a second shutdown circuit, a first startup circuit and a second startup circuit and disposed in a non-display area of the display panel, wherein output terminals of the first shutdown circuit, the second shutdown circuit, the first startup circuit and the second startup circuit are connected to the sub-pixels.
It should be understood that the above general description and the following detailed description are exemplary only and are not intended to limit the present application.
The above and other objects features and advantages of the present application will become more apparent by describing exemplary embodiments thereof in detail with reference to the accompanying drawings.
Although the present application can readily be embodied in different forms of embodiment, however, only some of the specific embodiments are shown in the drawings and will be described in detail in the description, while it is understood that the description is to be regarded as an exemplary illustration of the principles of the present application and is not intended to limit the present application to those described herein.
Thus, one feature pointed out in the description is intended to illustrate one of the features of one embodiment of the present application and is not intended to imply that each embodiment of the present application must have the illustrated feature. In addition, it should be noted that many features are described in the description. Although certain features may be combined to illustrate a possible system design, these features may also be used for other unspecified combinations. Therefore, unless otherwise stated, the illustrated combinations are not intended to be limiting.
In the embodiments illustrated in the drawings, indications of direction (such as up, down, left, right, front and back) are used to explain that the structure and movement of the various elements of the present application are not absolute but relative. These descriptions are appropriate when these elements are in the positions shown in the drawings. If the description of the positions of the element changes, the indications of the directions change accordingly.
The exemplary embodiments will now be described more fully with reference to the accompanying drawings. However, the example embodiments can be implemented in a variety of forms and should not be construed as being limited to the examples set forth herein. Rather, these embodiments are provided so that the present application will be more comprehensive and complete, and the concept of example embodiments will be fully communicated to those skilled in the art. The accompanying drawings are only schematic illustrations of the present application and are not necessarily drawn to scale. Like reference numerals in the figures denote identical or similar parts and thus repetitive descriptions thereof will be omitted.
The preferred embodiment of the present application is further elaborated below in conjunction with the accompanying drawings of the description.
Embodiment 1 of the present application provides a gate drive circuit, which, as shown in
The second terminal of the first switch unit M1 is connected to a voltage supply terminal VDD, a second terminal of the second switch unit M2 is grounded, and the energy storage element 16 switches between a charging state and a discharging state based on a control signal responded to by a control terminal G of the first switch unit M1 and the control terminal G of the second switch unit M2.
The input terminals of the first shutdown circuit 12 and the second shutdown circuit 13 are connected to the first node S1, and the output terminals Vout of the first shutdown circuit 12 and the second shutdown circuit 13 are connected to the sub-pixels. The control terminal G of the first shutdown circuit 12 responds to the first shutdown control signal when the energy storage element 16 is in the discharging state so that the output terminal Vout of the first shutdown circuit 12 outputs a first shutdown signal to the sub-pixel. The control terminal G of the second shutdown circuit 13 responds to the second shutdown control signal when the energy storage element 16 is in the discharging state so that the output terminal Vout of the second shutdown circuit 13 outputs the second shutdown signal to the sub-pixels. The first shutdown control signal and the second shutdown control signal are sequentially output, and the first shutdown signal and the second shutdown signal have different magnitudes.
The input terminals of the first startup circuit 14 and the second startup circuit 15 are connected to the second node S2, and the output terminals Vout of the first startup circuit 14 and the second startup circuit 15 are connected to the sub-pixels. The control terminal G of the first startup circuit 14 responds to the first startup control signal when the energy storage element 16 is in the discharging state so that its output terminal Vout outputs the first startup signal to the sub-pixel. The control terminal G of the second startup circuit 15 responds to the second startup control signal when the energy storage element 16 is in the discharging state, so that the output terminal Vout of the second startup circuit 15 outputs the second startup signal to the sub-pixel. The first startup control signal and the second startup control signal to be sequentially output, and the first startup signal and the second startup signal have different magnitudes.
The magnitudes of the first shutdown signal the second shutdown signal are different so that when the thin film transistor is turned off, the gate voltage can be first reduced to a smaller VGL voltage and then maintained at a larger VGL voltage, thereby effectively saving the fall time. The magnitudes of the first startup signal and the second startup signal are different so that when the thin film transistor is turned on, the gate startup voltage of the thin film transistor is firstly generated with an over drive, that is, a larger VGH voltage is firstly generated to reduce the rise time, and then reduced to a smaller VGH voltage during normal operation, thereby achieving the technical effect of improving the charging rate and preventing wrong impact. Moreover, using a common energy storage element can reduce the cost of the circuit on this basis.
Illustratively, the first shutdown signal and the second shutdown signal are both low-level signals, the first shutdown signal is outputted before the second shutdown signal, and the value of the first shutdown signal is smaller than the value of the second shutdown signal. The first startup signal and the second startup signal are both high-level signals, the second startup signal is outputted before the first startup signal, and the value of the second startup signal is larger than the value of the first startup signal, thereby achieving the technical effect of improving the charging rate and preventing wrong impact.
In addition, compared with the way of generating VGH and VGL through the charge pump circuit, the scheme adopted in the embodiment of the present application can avoid the problems of poor voltage stabilizing ability and weak load carrying capability of the capacitor when the output current of the charge pump is large, and the drive ability of the embodiment of the present application is stronger.
By way of example, as shown in
A first terminal of the charging capacitor C1 is connected to a voltage supply terminal VDD, and a second terminal of the charging capacitor C1 is grounded. When the energy storage element 16 is in the charging state and the discharging state, the control terminal G of the second switch unit M2 is enabled in response to the second switch startup signal. When the energy storage element 16 is in the charging state, the control terminal G of the first switch unit M1 is turned on in response to the first switch startup signal. When the energy storage element 16 is in the discharging state, the control terminal G of the first switch unit M1 is turned off in response to the first switching shutdown signal.
The input terminal of the third switch unit M3 is connected to the first node S1, the output terminal of the third switch unit M3 is connected to the first terminal of the first diode D1, the second terminal of the first diode D1 and the first terminal of the first capacitor C2 are both connected to the output terminal of the first shutdown circuit 12, and the second terminal of the first capacitor C2 is grounded. When the energy storage element 16 is in the charging state and the discharging state, the control terminal G of the third switch unit M3 is turned on in response to the third switch startup signal. The input terminal of the third switch unit M3 serves as the input terminal of the first shutdown circuit 12.
The input terminal of the fourth switch unit M4 is connected to the first node S1, the output terminal of the fourth switch unit M4 is connected to the first terminal of the second diode D2, the second terminal of the second diode D2 and the first terminal of the second capacitor C3 are both connected to the output terminal of the second shutdown circuit 13, and the second terminal of the second capacitor C3 is grounded. When the energy storage element 16 is in the charging state and the discharging state, the control terminal G of the fourth switch unit M4 is turned on in response to the fourth switch startup signal. The input terminal of the fourth switch unit M4 serves as the input terminal of the second shutdown circuit 13.
The input terminal of the fifth switch unit M5 is connected to the second node S2, the output terminal of the fifth switch unit M5 and the first terminal of the third capacitor C4 are both connected to the output terminal of the first startup circuit 14, and the second terminal of the third capacitor C4 is grounded. The control terminal G of the fifth switch unit M5 is turned off in response to the second switch shutdown signal when the energy storage element 16 is in the charging state, and the control terminal G of the fifth switch unit M5 is turned on in response to the fifth switch startup signal when the energy storage element 16 is in the discharging state. The input terminal of the fifth switch unit M5 serves as the input terminal of the first startup circuit 14.
The input terminal of the sixth switch unit M6 is connected to the second node S2, the output terminal of the sixth switch unit M6 and the first terminal of the fourth capacitor C5 are both connected to the output terminal of the second startup circuit 15, and the second terminal of the fourth capacitor C5 is grounded. The control terminal G of the sixth switch unit M6 is turned off in response to the third switch-shutdown signal when the energy storage element 16 is in the charging state, and the control terminal G of the sixth switch unit M6 is turned on in response to the sixth switch-startup signal when the energy storage element 16 is in a discharging state. The input terminal of the sixth switch unit M6 serves as the input terminal of the second startup circuit 15.
Further, with reference to
The switch units are controlled to be turned on or turned off by a plurality of signals, so that the energy storage element can switch between the charging state and the discharging state, so that two-way VGH and two-way VGL are respectively formed in each stage, and the cost of the circuit is reduced.
The first switch startup signal and the second switch startup signal are both high-level signals, and the first switch shutdown signal is a low-level signal.
Further, both the first switch startup signal and the first switch shutdown signal are transmitted to the control terminal G of the first switch unit via the first signal line Gate1. The second switch startup signal and the second switch shutdown signal are transmitted to the control terminal G of the second switch unit via the second signal line Gate2. The third switch startup signal is transmitted to the control terminal G of the third switch unit via the third signal line Gate3. The fourth switch startup signal is transmitted to the control terminal G of the fourth switch unit via the fourth signal line Gate4. The fifth switch startup signal is transmitted to the control terminal G of the fifth switch unit via the fifth signal line Gate5. The sixth switch startup signal is transmitted to the control terminal G of the sixth switch unit via the sixth signal line Gate6.
By way of example, the energy storage element 16 is an inductor L. Only one inductor is needed to achieve two-way VGH and two-way VGL, and the cost is low.
Hereinafter, referring to
When the first switch unit M1 is turned on, the flow direction of the current is shown in
When the first switch unit M1 is turned off, the flow direction of the current is shown in
After the system works stably, the inductor L volts-seconds is conserved. When the first switch unit M1 is turned on, the voltage of the inductor L is equal to the input terminal voltage VDD. When the first switch unit M1 is turned off, the voltage of the inductor L is equal to the output terminal voltage VOUT. If T denotes period, TON denotes turn-on time, TOFF denotes turn-off time, and D denotes duty cycle, then it can be obtained based on the volt-second balance:
VDD*TON=VOUT*TOFF;
VDD*D*T=VOUT* (1−D)*T;
VOUT=[(D/(1−D)]*VDD;
D=VOUT/(VOUT+VDD);
A second shutdown signal can be obtained by using a similar principle. By adjusting the duty cycle D, a first shutdown signal VGL1 and a second shutdown signal VGL2 of different magnitudes can be obtained.
The duty cycle can be adjusted by changing a ratio of the turn-on time of the first switch unit M1. For example, in three time periods, the first switch unit M1 is turned on for only one time period, the first switch unit M1 is turned off for the other two time periods. Assuming that the duration of three time periods is equal, the duty cycle is ⅓, while in two time periods, the first switch unit M1 is turned on in one time period and the first switch unit M1 is turned off in the other time period. Assuming that the duration of the two time periods is equal, the duty cycle is ½, and the voltage can be further adjusted by adjusting the duty cycle. Hereinafter, the principle of generating the first startup signal VGH1 will be explained with reference to
When the first switch unit M1 is turned on, the current flow direction is shown in
When the first switch unit M1 is turned off, the current flow direction is as shown in
The inductor L charges and discharges the same time when the switch is on and off, based on the volt-second conservation, as follows: VOUT=VDD/(1−D).
The second startup signal can be obtained by adopting a similar principle, and the first startup signal VGH1 and the second startup signal VGH2 with different magnitudes can be obtained by adjusting the duty cycle.
By way of example, the control terminals G of the first switch unit M1, the second switch unit M2, the first shutdown circuit 12, the second shutdown circuit 13, the first startup circuit 14, and the second startup circuit 15 are all connected to the same control chip. By integrating the above components or circuits and connecting them with the same control chip, the integration level is higher than the mode in which two separate VGL circuits and two separate VGH circuits are respectively arranged and controlled by four control chips respectively.
In this embodiment, the gate drive circuit includes two shutdown circuits and two startup circuits integrated together, and is connected with the charging circuit, and the energy storage element of the charging circuit is switched between the charging state and the discharging state based on the control signal, so that two shutdown circuits and two startup circuits can be charged by using a common energy storage element, then the two shutdown circuits respectively output a first shutdown signal and a second shutdown signal with different magnitudes, and the two startup circuits respectively output first startup signals and second startup signals with different magnitudes. Compared with the way of adopting four separate circuits respectively, the present application can share the energy storage element without providing the energy storage elements respectively for the four separate circuits, thereby eliminating the energy storage elements, which reduces the cost of the gate drive circuit, and has higher integration level, a simple structure and small occupied space.
Referring to
Illustratively, in the second time period, the third switch unit of the first shutdown circuit is turned on with the third switching startup signal. In the fourth time period, the fourth switch unit of the second shutdown circuit is turned on with the fourth switch startup signal. In the eighth time period, the sixth switch unit of the second startup circuit is turned on with the sixth switch startup signal. In the tenth time period, the fifth switch unit of the first startup circuit is turned on with fifth switch startup signal.
Referring to
As shown in
In a time period T6, the first signal line outputs a high-level signal, the first switch unit is turned on, the inductor is connected to the power supply terminal. In a time period T7, the second signal line outputs a high-level signal, the second switch unit is turned on to charge the inductor, and the inductor is in a charging state at this time. In a time period of T8, the second signal line outputs a low-level signal, the second switch unit is turned off, and the sixth signal line outputs a high-level signal, the sixth switch unit is turned on, and the inductor is in the discharging state to form a boost and generate a second startup signal VGH2 voltage signal. In a time period T9, the second signal line outputs a high-level signal, the second switch unit is turned on, and the sixth switch unit is turned off to charge the inductor. In a time period T10, the second signal line outputs a low-level signal, the second switch unit is turned off, the fifth signal line outputs a high-level signal, the fifth switch unit is turned on, and the inductor is in the discharging state to form a boost loop and generate a first startup signal VGH1.
In this way, two-way VGL and two-way VGH are formed, and only one inductor is needed in this circuit, so that the circuit cost can be saved, and the driving ability is stronger than that of charge pump circuit.
Referring to
Further, the non-display area 33 may include a GOA (Gate on Array) circuit.
By arranging the gate drive circuit in the display device, the cost of the display device can be reduced. In addition, the gate drive circuit is simple in structure and occupies a small space, which is beneficial to achieving a narrow frame of the display device, so as to improve the aesthetic taste of the display device.
Other embodiments of the present application will be apparent to those skilled in the art upon consideration of the description and practice of the present application disclosed herein. The present application is intended to encompass any variation, use, or adaptation of the present application that follows the general principles of the present application and includes commonly known or customary technical means in the art that are not disclosed herein. The description and embodiments are considered exemplary only, and the true scope and spirit of the present application is indicated by the following claims.
In the content of the description, illustration of the reference terms “an embodiment,” means that specific features, structures, materials, or characteristics described in connection with the embodiment are encompassed in at least one embodiment or example of the present application. In the description, the schematic formulation of the above terms need not be directed to the same embodiments. Further, the specific features, structures, materials or characteristics described may be combined in a suitable manner in any one or more embodiments. Further, without contradicting one another, those skilled in the art may connect and combine different embodiments described in the description and features of different embodiments.
Number | Date | Country | Kind |
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202210735769.2 | Jun 2022 | CN | national |