Patent Application
20250070773
The present invention relates to soft-switching power electronics devices which utilize IGCTs as a semiconductor switch. Particularly, the present invention relates to gate units for gate commutated thyristors that are particularly suited for soft-switching applications.
Integrated-gate commutated thyristors (IGCT) are thyristor-based semiconductor switching devices that integrate a gate commutated thyristor (GCT) and a gate unit for controlling the switching of the GCT in a single switching module.
In high-power medium-voltage applications, IGCTs have proven to achieve remarkable efficiencies and high-power density. Furthermore, these power switches proved to be robust and reliable, and come with typically very high voltage and current ratings, making them suitable for MW level power conversion. Typically, these devices have very low conduction losses, being another reason for their use in high power applications. However, IGCTs have high switching losses which effectively limits their efficiency and the applicable switching frequencies. Typically, IGCT devices are switched with frequencies below 1 kHz in industrial converters, which are in most cases AC-DC hard-switched rectifiers or inverters. Consequently, state of the art gate units are designed for hard-switched low frequency operation.
Power stages of gate units for hard-switching applications are exemplarily known from H. Gruening et al., “6 kV 5 kA RCGCT with advanced gate drive unit,” Proceedings of the 13th International Symposium on Power Semiconductor Devices & ICs. IPSD '01 (IEEE Cat. No. 01CH37216), 2001, pp. 133-136, and L. Xie et al., “The design of IGCT Gate-Unit equipped in the three-level NPC converter,” 2011 International Conference on Electrical Machines and Systems, 2011, pp. 1-6, wherein the gate units has separate stages such as a turn-on and retrigger stage, a turn-off stage, a positive gate voltage backporch channel stage and a negative gate voltage backporch channel stage.
To reduce the GCT switching losses, soft-switching can be applied. Soft-switching implies additional measures and can be generally realized as zero-current switching (ZCS) or zero-voltage switching (ZVS). In the ZCS operation, the device's current (anode-cathode-current) is close to zero immediately before and after the switching instant happens. In contrast, in the ZVS operation, the device's blocking voltage (anode-cathode-voltage) is close to zero immediately before and after the switching instant happens. Since the switching loss of a device is roughly proportional to the product of the conducting current and blocking voltage, both ZVS and ZCS enable very low switching losses for the device.
It is an object of the present invention to provide an improved gate unit for a gate-commutated thyristor (GCT) with a reduced circuitry and switching losses.
This object is achieved by the gate unit for a gate-commutated thyristor according to claim 1 and the integrated gate-commutated thyristor and the converter system according to the further independent claims.
Further embodiments are indicated in the dependent subclaims.
According to a first aspect, a gate unit for controlling a gate commutated thyristor is provided, comprising:
As described before, the gate unit and the IGCT will be used in applications where they can be operated in a zero-current switching or zero-voltage switching operation mode.
Particularly, IGCTs can be applied in applications, such as an LLC resonant converter with a zero-voltage switching during turn-on or a series resonant converter with a zero-current switching during turn-on.
Basically, for accomplishing switching, particularly for hard-switching, gate units for IGCTs are generally designed to implement the following functions which are conventionally implemented in separate hardware stages:
According to an embodiment, the gate control unit may be configured to operate switching of the gate commutated thyristor in soft-switching mode, particularly in a zero voltage switching mode or a zero current switching mode.
Although some integration is possible most of these functions are implemented by dedicated power stages due to the power requirements. As a result, the gate unit is relatively complex, which affects its size that poses practical restrictions on the mechanical construction of the IGCT stack and increases the overall cost.
On the other hand, in the considered soft-switching applications, the IGCT is either non-conducting after the turn on (in ZVS operation), or the current builds up very slowly after the turn on (in ZCS operation). Moreover, in the typical resonant ZVS operation, the current rate of rise (current slope) is also limited when the retrigger pulse is required. As a consequence, there is significantly more time for the thyristor cells of the IGCT to open uniformly and thus, both the turn-on pulse and the retrigger pulse can be reduced in magnitude. This reduction in peak current ratings reduces power flow during switching and, therefore, directly reduces the cost of these power stages.
Because of these reduced requirements implied in the soft-switching applications, there is a possibility to integrate above functions of turn-on pulse generation, positive gate-voltage-backporch operation, negative-gate-voltage backporch operation, and retrigger pulse generation into a single power stage.
Furthermore, a turn-off stage may be provided configured to apply the negative supply potential to selectively turn off the GCT. The result of such integration lies in a lower number of components resulting in a reduced size and lower costs of the gate unit. This has a substantial positive effect on the reliability of the system as a whole.
The central idea of the invention is to integrate the turn-on function, the retrigger function, the positive-gate-voltage backporch function, and the negative-gate-voltage backporch function into a single power stage. This is possible because in the applications with ZVS or ZCS turn on, the current slope di/dt of the anode current after turning on (or retrigger pulse generation) is very low. Hence, the thyristor cells within the GCT have significantly more time to open uniformly without causing hot-spotting problems (a nonuniform distribution of current in the wafer, potentially leading to a GCT failure). As a consequence, the turn-on and retrigger pulses can be reduced in magnitude. This opens the possibility for the simplification of the gate unit.
The power stage may comprise a transistor-switched voltage selector, such as a T-type NPC stage, e.g. formed by four MOSFETs, whose output is coupled with a single nonlinear saturable inductor. The power stage may be controlled by a gate control unit and may be operated to accomplish functions of the conventional turn-on stage, the retrigger stage, the positive-gate-voltage backporch stage and the negative-gate-voltage backporch stage. capable of connecting a high supply voltage potential, a middle supply voltage potential and a low supply voltage potential in a controlled manner. The output of the transistor-switched voltage selector is coupled via the nonlinear inductor with a gate terminal of the GCT. The transistor-switched voltage selector can be used to have complete control over the turn-on states by adjusting the voltage drop over the nonlinear inductor.
The inductor is configured as a nonlinear inductor which may actively be driven into saturation or operated in saturation. At low currents the inductor is not yet saturated and provides an inductance for backporch operation modes which is sufficiently high so that the current ripple is reasonably low while maintaining reasonably low switching frequencies. During high currents, the inductor should saturate and, therefore, decrease its inductance to enable higher current slopes di/dt of the turn-on and retrigger pulses.
This nonlinear characteristic also decreases the energy which can be stored in the inductor during the turn-on and the retrigger pulse generation. Therefore, the inductor size can be made smaller and the pulse loading of the high-supply voltage bus is lower. In contrast to using multiple inductors for current pulse shaping as known from prior art, the use of a single nonlinear saturable inductor simplifies the topology of the gate unit significantly. The power stage is capable to support the combined operation modes, such as turn-on, positive voltage backporch operation, negative gate voltage backporch operation and retrigger operation as follows:
It may be provided that the nonlinearity of the nonlinear inductor is selected so that the low inductance for the turn-on pulse generation has a value at least 50% lower than the high inductance during the backporch operation. While the high inductance value might be a clear requirement to achieve ripple sufficiently low, the low value of inductance can be selected slightly more freely.
It may be provided that the gate unit comprises a communication channel output to interlink with a control input of another gate unit wherein the gate control unit is configured to propagate a control signal received via the control input through the communication channel output, wherein the control signal includes switching commands for the gate commutated thyristors.
Moreover, the gate unit may comprise a communication channel output to interlink with a control input of another gate unit wherein the gate control unit is configured to propagate an control signal received via the control input through the communication channel output, wherein the control signal includes an error signal indicating the occurrence of an error in one of the gate units wherein the gate control unit is further configured to halt operation of the gate unit once an error signal has been received.
According to a further aspect, an integrated gate commutated thyristor (IGCT) comprising a gate commutated thyristor and the above gate unit is provided.
According to a further aspect, a converter stage for use in a converter system is provided, comprising a number of integrated gate commutated thyristors each including a gate commutated thyristor and the above gate unit, wherein one of the gate units is coupled with a central controller to receive the control signal and at least a part of the other gate units are respectively coupled via its communication channel output with the control input of a further one of the other gate units, so that the control signal is available in all gate units.
Embodiments are described in more detail in conjunction with the accompanying drawings, in which:
The gate units 22 are controlled by a central controller 5 for converter operation by commanding switching on or switching off of each of the GCTs. Switching on and off of the GCTs 21 is handled by the corresponding gate units 22.
The inverter stage 2 is made of two separate inverter series connections of GCTs 21 which are coupled with the resonant tank 4 via their middle nodes. The resonant tank 4 comprises a series connection of a first capacitor 41 and a first inductance 42 at a first of the middle nodes wherein a second inductance 43 connects the series connection with a second of the middle nodes of the inverter stage 2. Furthermore, the resonant tank 4 is coupled with the rectifier 3, e.g. implemented as a passive diode rectifier with diodes 31.
The central controller 5 is capable of operating the LLC resonant converter 1 in a zero-voltage switching or zero-current switching mode to improve the efficiency of converter 1. In the following, it is assumed that converter 1 is configured to be operated in the zero-voltage switching mode or zero-current switching mode, as in these operation modes, the value of the current slope di/dt of the anode current after turn-on pulse is relatively low. For the implementation of the zero-voltage switching mode or the zero-current switching mode appropriate voltage and/or current measurement units for measuring cathode-anode voltage/current are implemented in the IGCT formed by the respective GCT 21 and gate unit 22.
The gate unit 22 uses a power supply 24 which generally provides three supply voltage potential levels, such as a high supply potential Vpos, a middle supply potential Vmid and a negative supply potential Vneg. The power supply 24 of the gate unit may be powered by an (not shown) external medium-voltage-isolating power supply.
A power stage 25 is connected with the power supply 24 basically comprises a voltage selector 26 comprising switching transistors, such as MOSFETs, to connect one of the supply potentials Vpos, Vmid, Vneg to a selector output node N. The selector output node N is coupled with a nonlinear inductor 27 to the gate unit output G to be applied to a respective gate terminal of the GCT 21.
In detail, a first switching transistor ST is coupled between the high supply potential Vpos and the selector output node N, the middle supply potential Vmid is coupled via two switching transistors SM1, SM2 with the selector output node N, and the low supply potential Vneg is coupled via a fourth switching transistor SB with the selector output node N. The selector output node N is coupled via the nonlinear inductance 27 with the gate unit output G.
For the correct operation, measurement units for measuring the gate-to-cathode voltage polarity (e.g. by comparators) and the inductor current have to be provided.
When controlling the switching transistors, the first and second switching transistors ST, SM1 are operated complementary and the third and fourth switching transistors SM2, SB are operated complementary. Control of the switching transistors ST, SM1, SM2, SB is made by a gate control unit 23. To connect the high supply potential Vpos with the selector output node N, only the first switching transistor ST is switched on, while the others are switched off, to connect the middle supply potential Vmid with the selector output node N, the second and third switching transistors SM1, SM2 are switched on, while the others are switched off, and to connect the low supply voltage Vneg with the selector output node N, only the fourth switching transistor SB is switched on, while the other switching transistors ST, SM1, SM2 are switched off. This allows having complete control over the turn-on current at the gate unit output G, which is applied to the gate of the GCT 21.
Hence, the voltage selector 26 of the power stage has a three-level T-type NPC topology and is configured to provide three voltage levels at the selector output node N.
Furthermore, there is a turn-off stage 28 configured to turn off the GCT 21 and to keep it off by applying the negative supply potential Vneg between its gate terminal and its cathode terminal. This is made with a turn-off transistor Soff also controlled by the gate control unit 23. So, the turn-off stage 28 has the task to connect the gate terminal of the GCT 21 with the low supply potential Vneg to discard the charge from the gate terminal in order to turn off the GCT 21. During the turn-off process, the inductor current ion is completely commutated into gate unit 22 for the GCT 21 to restore its blocking capability. Therefore, the low supply potential Vneg is buffered by a sufficiently high capacitance Coff.
The control method applied by the gate control unit 23 is as follows:
The voltage selector 26 of the power stage has a three-level T-type NPC topology and is configured to provide three voltage levels at the selector output node N, thereby avoiding an operation state where a low gate voltage vg of the backporch operation has to be formed by a close to 50-percent duty cycle operation which would in turn require a relatively high switching frequency to keep the gate current ig ripple low. The gate control unit 23 controls the operation of the GCT 21 basically based on a comparator value of the gate voltage vg and the measurement of the power stage 25 current e.g. based on a shunt and a current sense amplifier.
By applying the high supply potential Vpos to the selector output node N, a voltage drop over the nonlinear inductor 27 is generated. This is made for a delay time of several microseconds to build up an inductor current ion in nonlinear inductor 27. After the turn-on delay, the turn-off stage is finally deactivated, and the inductor current ion is rapidly commutated into the gate terminal generating the turn-on pulse. After that, the middle supply voltage Vmid is applied to decrease the gate current ig to its backporch value when the gate voltage vg is measured positive. When the gate voltage vg is measured negative, the low supply voltage is applied to ensure that the gate current decreases after the initial pulse as this can be understood as a sign that the antiparallel diode of the gate-commutated thyristor is conducting. After the gate current ig has reached the desired backporch current value, the backporch operation state is activated depending on the polarity of the gate voltage vg.
When the nonlinear inductor 27 has a nonlinearity to have an inductance sufficiently high during the backporch operation to ensure that an acceptable low current ripple can be achieved at a switching frequency appropriately low and that the inductance is sufficiently low to ensure a fast ramp-up of the gate current ig to generate and propagate the high slope current at turn-on pulse generation and retrigger pulse generation. As these conditions are associated with different current regimes of the inductor current, the nonlinear saturable inductor is used that decreases its inductance with increasing currents.
An exemplary characteristics of the nonlinear inductor is shown in
Preferably, the nonlinearity is selected so that the low inductance for the turn-on pulse generation has a value at least 50% lower than the high inductance during the backporch operation.
With reference to
As shown in
The advantage of this approach is that central controller 5 does not require to possess many fiber optic inputs to get an error state from every single gate unit 22 to disable the application. Moreover, the length of the utilized optical fiber could be shorter, considering that the fiber optic interconnections are only within the IGCT stack.
Furthermore, as shown in
Since the turn-on and turn-off need to happen in all IGCTs at the same time, it is recommended to wait for a certain amount of time in each device to compensate for the propagation delays due to communication transmitters and receivers (e.g. 30 ns in first device, 20 ns in second and 10 ns in third, assuming the propagation delay of 10 ns per gate unit). The particular waiting time for each IGCT can either be configured manually or it can be programmed to happen automatically during converter power up. This could be implemented by propagating the number via the interlink chain, which would be increased in each gate unit. This would provide sufficient information on how much time has to be waited in the particular IGCT.
| Number | Date | Country | Kind |
|---|---|---|---|
| 21205354.0 | Oct 2021 | EP | regional |
| Filing Document | Filing Date | Country | Kind |
|---|---|---|---|
| PCT/EP2022/079995 | 10/26/2022 | WO |
