The present disclosure relates to video and image coding and decoding.
Digital video accounts for the largest bandwidth use on the internet and other digital communication networks. As the number of connected user devices capable of receiving and displaying video increases, it is expected that the bandwidth demand for digital video usage will continue to grow.
The present disclosure discloses video coding tools that, in one example aspect, improve coding efficiency of current coding tools related to ultimate motion vector expression or generalized bi-prediction.
In one example aspect, a method of video processing is disclosed. The method includes determining, for a conversion between a current video block of a video and a coded representation of the video, a mode of operation of an ultimate motion vector expression (UMVE) mode; and performing the conversion based on the determining, wherein the current video block is coded with a merge mode and motion vector differences in an UMVE mode that comprises a motion vector expression that includes a starting point of motion information, a motion magnitude and a motion direction for the current video block, and wherein one or more fields in the coded representation correspond to the mode of operation, and wherein the one or more fields include: an UMVE enable field whose value indicates whether the UMVE mode is enabled or disabled for the current video block, or a modified affine mode enable field that indicates whether an affine merge mode modified based on the UMVE mode is enabled or disabled for the current video block.
In another example aspect, a method of video processing is disclosed. The method includes determining, for a conversion between a current video block of a video and a coded representation of the video, a mode of operation of an ultimate motion vector expression (UMVE) mode; and performing the conversion based on the determining, wherein the current video block is coded with a merge mode and motion vector differences in an UMVE mode that comprises a motion vector expression that includes a starting point of motion information, a motion magnitude and a motion direction for the current video block, and wherein one or more fields in the coded representation correspond to the mode of operation, and wherein the one or more fields include: a list size field that indicates a size of a base candidate list used by the UMVE mode, or a table field that signals a distance table or a direction table for the UMVE mode.
In another example aspect, a method of video processing is disclosed. The method includes performing a conversion between a current video block of a video and a coded representation of the video using an ultimate motion vector expression (UMVE) coding tool, wherein the UMVE coding tool represents a motion vector expression that includes a starting point of motion information, a motion magnitude and a motion direction for the current video block, and wherein at least one of a distance table or a direction table depends on a picture order count (POC) of two reference pictures or a POC of a current picture that includes the current video block, or a quantization parameter (QP) used for coding the current video block, a current slice, or the current picture.
In another example aspect, a method of video processing is disclosed. The method includes determining, for a conversion between a current video block of a video and a coded representation of the video, a mode of operation of an affine ultimate motion vector expression (UMVE) mode; and performing the conversion based on the determining, wherein the current video block is coded with an affine merge mode and motion vector differences in the affine UMVE mode that includes a starting point of motion information, a motion magnitude and a motion direction for the current video block, and wherein one or more fields in the coded representation correspond to the mode of operation, and wherein the one or more fields include: a list size field that indicates a size of a base affine merge candidate list for an affine merge mode with prediction offsets that is used by the UMVE mode, or a table field that signals a distance table or a direction table for the affine merge mode with prediction offset.
In another example aspect, a method of video processing is disclosed. The method includes determining to signal multiple motion vector differences in an ultimate motion vector expression (UMVE) coding tool for a conversion between a current video block of a video and a coded representation of the video; and performing the conversion based on the determining, wherein, using the UMVE coding tool, a motion vector expression that includes a starting point, N motion vector differences represented by N motion magnitudes and N motion directions of the current video block is used during the conversion, N being an integer equal to or greater than two.
In another example aspect, a method of video processing is disclosed. The method includes determining, for a conversion between a current video block of a video and a coded representation of the video, that a rule is applicable to the conversion due to the current video block using a current picture referencing (CPR) coding tool and an ultimate motion vector expression (UMVE) coding tool; and performing the conversion according to the rule, wherein the rule disallows use of one or more coding distances for the conversion, wherein the CPR coding tool uses a current picture as a reference picture, and wherein the UMVE coding tool uses a motion vector expression that includes a starting point, a motion magnitude and a motion direction for the current video block.
In another example aspect, a method of video processing is disclosed. The method includes determining, during a conversion between a current video block of a video and a coded representation of the video, to perform refinement of a motion vector difference (MVD) value for the current video block upon determining that the current video block uses an ultimate motion vector expression (UMVE) coding tool that represents a motion vector expression that includes a starting point, a motion magnitude and a motion direction for the current video block; and performing the conversion based on the determining.
In another example aspect, a method of video processing is disclosed. The method includes determining, for a conversion between a current video block of a video and a coded representation of the video, to use a first ultimate motion vector expression (UMVE) parameter set from multiple UMVE parameter sets upon determining that the current video block uses an UMVE coding tool that represents a motion vector expression that includes a starting point, a motion magnitude and a motion direction for the current video block; and performing the conversion based on the determining, wherein an indication of at least one of the multiple UMVE parameter sets is signaled or predefined for the current video block.
In another example aspect, a method of video processing is disclosed. The method includes selecting a UMVE parameter set for a conversion between a current video block of a video and a coded representation of the video, upon determining that the current video block uses an ultimate motion vector expression (UMVE) coding tool that represents a motion vector expression that includes a starting point, a motion magnitude and a motion direction for the current video block, wherein the selected UMVE parameter set is changed across different video blocks, different reference picture lists, different reference pictures, different tiles, different slices, different pictures, or different temporal layers.
In another example aspect, a method of video processing is disclosed. The method includes performing a conversion between a current video block of a video and a coded representation of the video using an ultimate motion vector expression (UMVE) coding tool that represents a motion vector expression that includes a starting point, a motion magnitude and a motion direction for the current video block, wherein an adaptive motion vector resolution (AMVR) scheme is used to signal distance tables used by the UMVE coding tool.
In another example aspect, a method of video processing is disclosed. The method includes determining, for a conversion between a current video block of a video and a coded representation of the video, a mode of operation of a generalized bi-prediction (GBi) coding tool in which a prediction of the current video block uses a final predictor corresponding to a non-uniformly weighted sum of predictors from two reference lists; and performing the conversion based on the determining, wherein a field in the coded representation corresponds to the mode of operation and a value of the field indicates whether the GBi coding tool is enabled or disabled for the current video block.
In another example aspect, a method of video processing is disclosed. The method includes performing a conversion between a current video block of a video and a coded representation of the video, based on a rule that controls a parameter of a GBi coding tool in which a prediction of the current video block uses a final predictor corresponding to a non-uniformly weighted sum of predictors from two reference lists, wherein the rule specifies that a weighting factor set used by the GBi coding tool is based on i) a temporal layer of a picture including the current video block, ii) a picture quantization parameter of the picture, or iii) a quantization parameter of the current video block.
In another example aspect, a method of video processing is disclosed. The method includes determining, for a conversion between a current video block of a video and a coded representation of the video, to use a weight that is unequal to one for an uni-prediction mode; and performing the conversion based on the determining, wherein a prediction of the current video block uses a final predictor corresponding to predictors scaled by the weight, and wherein a weighting factor set is selected at a block level or a coding unit level.
In another example aspect, a method of video processing is disclosed. The method includes performing a conversion between a current video block of a video and a coded representation of the video, based on a rule that controls a parameter of a GBi coding tool in which a prediction of the current video block uses a final predictor corresponding to a non-uniformly weighted sum of predictors from two reference lists, wherein the rule specifies to select or derive a weighting factor for the GBi coding tool based on neighboring pixels of the current video block and corresponding reference neighboring pixels identified by motion vectors or integer part of the motion vectors of the current video block.
In another example aspect, a method of video processing is disclosed. The method includes performing a conversion between a current video block of a video and a coded representation of the video, based on a rule that controls a parameter of a GBi coding tool in which a prediction of the current video block uses a final predictor corresponding to a non-uniformly weighted sum of predictors from two reference lists, wherein the rule specifies to reorder weighting factors for the GBi coding tool based on neighboring pixels of the current video block and corresponding reference neighboring pixels identified by motion vectors or integer part of the motion vectors of the current video block.
In another example aspect, a method of video processing is disclosed. The method includes performing a conversion between a current video block of a video and a coded representation of the video, based on a rule that controls a parameter of a GBi coding tool in which a prediction of the current video block uses a final predictor corresponding to a non-uniformly weighted sum of predictors from two reference lists, wherein a rule specifies to use local illumination compensation (LIC) parameters associated with the current video block for determining a weighting factor for the GBi coding tool, and wherein the LIC parameters are derived to use a linear model of illumination changes in the current block during the conversion.
In yet another representative aspect, the above-described method is embodied in the form of processor-executable code and stored in a computer-readable program medium.
In yet another representative aspect, a device that is configured or operable to perform the above-described method is disclosed. The device may include a processor that is programmed to implement this method.
In another example aspect, the above-described method may be implemented by a video encoder apparatus or a video decoder apparatus that comprises a processor. These, and other, aspects are further described in the present disclosure.
The present disclosure provides various embodiments that can be used by a decoder of video bitstreams to improve the quality of decompressed or decoded digital video. Furthermore, a video encoder may also implement these embodiments during the process of encoding in order to reconstruct decoded frames used for further encoding.
Section headings are used in the present disclosure for ease of understanding and do not limit the embodiments to the corresponding sections. As such, embodiments from one section can be combined with embodiments from other sections.
The present disclosure is related to video coding technologies. Specifically, it is related to motion compensation in video coding. It may be applied to the existing video coding standard like High Efficiency Video Coding (HEVC), or the standard (Versatile Video Coding (VVC)) to be finalized. It may be also applicable to future video coding standards or video codec.
Video coding standards have evolved primarily through the development of the well-known International Telecommunication Union (ITU) Telecommunication Standardization Sector (ITU-T) and International Organization for Standardization (ISO)/International Electrotechnical Commission (IEC) standards. The ITU-T produced H.261 and H.263, ISO/IEC produced Moving Picture Experts Group (MPEG)-1 and MPEG-4 Visual, and the two organizations jointly produced the H.262/MPEG-2 Video and H.264/MPEG-4 Advanced Video Coding (AVC) and H.265/HEVC standards. Since H.262, the video coding standards are based on the hybrid video coding structure wherein temporal prediction plus transform coding are utilized. To explore the future video coding technologies beyond HEVC, Joint Video Exploration Team (JVET) was founded by Video Coding Experts Group (VCEG) and MPEG jointly in 2015. Since then, many new methods have been adopted by JVET and put into the reference software named Joint Exploration Model (JEM). In April 2018, the Joint Video Expert Team (JVET) between VCEG (Q6/16) and ISO/IEC JTC1 SC29/WG11 (MPEG) was created to work on the VVC standard targeting a 50% bitrate reduction compared to HEVC.
A recent version of VVC draft, i.e., Versatile Video Coding (Draft 2) could be found at: http://phenix.it-sudparis.eu/jvet/doc_end_user/documents/11_Ljubljana/wg11/JVET-K1001-v7.zip
A recent reference software of VVC test model (VTM), could be found at: https://vcgit.hhi.fraunhofer.de/jvet/VVCSoftware_VTM/tag s/VTM-2.1
In HEVC, only a translation motion model is applied for motion compensation prediction (MCP). While in the real world, there are many kinds of motion, e.g., zoom in/out, rotation, perspective motions and the other irregular motions. In the JEM, a simplified affine transform motion compensation prediction is applied. As shown
The motion vector field (MVF) of a block is described by the following equation:
Where (v0x, v0y) is motion vector (MV) of the top-left corner control point, and (v1x, v1y) is motion vector of the top-right corner control point.
In order to further simplify the motion compensation prediction, sub-block based affine transform prediction is applied. The sub-block size M×N is derived as in Equation 2, where MvPre is the motion vector fraction accuracy ( 1/16 in JEM), (v2x, v2y) is motion vector of the bottom-left control point, calculated according to Equation 1.
After derived by Equation 2, M and N should be adjusted downward if necessary to make it a divisor of w and h, respectively.
To derive motion vector of each M×N sub-block, the motion vector of the center sample of each sub-block, as shown in
After MCP, the high accuracy motion vector of each sub-block is rounded and saved as the same accuracy as the normal motion vector.
In the JEM, there are two affine motion modes: AF_INTER mode and AF_MERGE mode. For coding units (CUs) with both width and height larger than 8, AF_INTER mode can be applied. An affine flag in CU level is signalled in the bitstream to indicate whether AF_INTER mode is used. In this mode, a candidate list with motion vector pair {(v0, v1)|v0={vA, vB, vc}, v1={vD,vE}} is constructed using the neighbor blocks. As shown in
In AF_INTER mode, when 4/6 parameter affine model is used, ⅔ control points are required, and therefore ⅔ MVD needs to be coded for these control points, as shown in
mv0=
mv1=
mv2=
Wherein
In affine mode, MV of 2 or 3 control points needs to be determined jointly. Directly searching the multiple MVs jointly is computationally complex. A fast affine ME algorithm is proposed and is adopted into VTM/Benchmark Set (BMS).
The fast affine ME algorithm is described for the 4-parameter affine model, and the idea can be extended to 6-parameter affine model.
Replace (a−1) with a′, then the motion vector can be rewritten as:
Suppose motion vectors of the two controls points (0, 0) and (0, w) are known, from Equation (5) affine parameters can be derived,
The motion vectors can be rewritten in vector form as:
P=(x, y) is the pixel position.
At encoder, MVD of AF_INTER are derived iteratively. Denote MVi(P) as the MV derived in the ith iteration for position P and denote dMVCi as the delta updated for MVC in the ith iteration. Then in the (i+1)th iteration,
Denote Picref as the reference picture and denote Piccur as the current picture and denote Q=P+MVi(P). Suppose MSE is used as the matching criterion, then the following can be minimized:
Suppose (dMVCi)T is small enough, Picref(Q+A(P)*(dMVCi)T) can be rewritten approximately as follows with a first order Taylor expansion.
Picref(Q+A(P)*(dMVCi)T)≈Picref(Q)+Picref′(Q)*A(P)*(dMVCi)T) (12)
Wherein
Denote Ei+1(P)=Piccur(P)−Picref(Q),
dMVCi can be derived by setting the derivative of the error function to zero. Then can then calculate delta MV of the control points (0, 0) and (0, w) according to A(P)*(dMVCi)T,
dMV(0,0)h=dMVCi[0] (14)
dMV(0,w)h=dMVCi[1]*w+dMVCi[2] (15)
dMV(0,0)v=dMVCi[2] (16)
dMV(0,w)v=−dMVCi[3]*w+dMVCi[2] (17)
Suppose such MVD derivation process is iterated by n times, then the final MVD is calculated as follows,
ƒdMV(0,0)h=Σi=0n-1dMVCi[0] (18)
ƒdMV(0,w)h=Σi=0n-1dMVCi[1]*w+Σi=0n-1dMVCi[0] (19)
ƒdMV(0,0)v=Σi=0n1dMVCi[2] (20)
ƒdMV(0,w)v=Σi=0n-1−dMVCi[3]*w+Σi=0n-1dMVCi[2] (21)
With JVET-K0337, i.e., predicting delta MV of control point (0, w), denoted by mvd1 from delta MV of control point (0, 0), denoted by mvd0, now actually only (=Σi=0n-1dMVCi[1]*w, −Σi=0n-1−dMVCi[3]*w) is encoded for mvd1.
When a CU is applied in AF_MERGE mode, it gets the first block coded with affine mode from the valid neighbor reconstructed blocks. The selection order for the candidate block is from left, above, above right, left bottom, to above left as shown in
After the CPMV of the current CU v0 and v1 are derived, according to the simplified affine motion model Equation 1, the MVF of the current CU is generated. In order to identify whether the current CU is coded with AF_MERGE mode, an affine flag is signalled in the bitstream when there is at least one neighbor block is coded in affine mode.
In JVET-L0366, which was planned to be adopted into VTM 3.0, an affine merge candidate list is constructed with following steps:
Inherited affine candidate means that the candidate is derived from the affine motion model of its valid neighbor affine coded block. In the common base, as shown in
After a candidate is derived, full pruning process is performed to check whether same candidate has been inserted into the list. If a same candidate exists, the derived candidate is discarded.
If the number of candidates in affine merge candidate list is less than MaxNumAffineCand (set to 5 in this contribution), constructed affine candidates are inserted into the candidate list. Constructed affine candidate means the candidate is constructed by combining the neighbor motion information of each control point.
The motion information for the control points is derived first from the specified spatial neighbors and temporal neighbor shown in
The coordinates of CP1, CP2, CP3 and CP4 is (0, 0), (W, 0), (H, 0) and (W, H), respectively, where W and H are the width and height of current block.
The motion information of each control point is obtained according to the following priority order:
For CP1, the checking priority is B2->B3->A2. B2 is used if it is available. Otherwise, if B2 is available, B3 is used. If both B2 and B3 are unavailable, A2 is used. If all the three candidates are unavailable, the motion information of CP1 cannot be obtained.
For CP2, the checking priority is B1->B0.
For CP3, the checking priority is A1->A0.
For CP4, T is used.
Second, the combinations of controls points are used to construct an affine merge candidate.
Motion information of three control points are needed to construct a 6-parameter affine candidate. The three control points can be selected from one of the following four combinations ({CP1, CP2, CP4}, {CP1, CP2, CP3}, {CP2, CP3, CP4}, {CP1, CP3, CP4}). Combinations {CP1, CP2, CP3 }, {CP2, CP3, CP4}, {CP1, CP3, CP4} will be converted to a 6-parameter motion model represented by top-left, top-right, and bottom-left control points.
Motion information of two control points are needed to construct a 4-parameter affine candidate. The two control points can be selected from one of the following six combinations ({CP1, CP4}, {CP2, CP3 }, {CP1, CP2}, {CP2, CP4}, {CP1, CP3}, {CP3, CP4}). Combinations {CP1, CP4}, {CP2, CP3}, {CP2, CP4}, {CP1, CP3}, {CP3, CP4} will be converted to a 4-parameter motion model represented by top-left and top-right control points.
The combinations of constructed affine candidates are inserted into to candidate list as following order:
For reference list X (X being 0 or 1) of a combination, the reference index with highest usage ratio in the control points is selected as the reference index of list X, and motion vectors point to difference reference picture will be scaled.
After a candidate is derived, full pruning process is performed to check whether same candidate has been inserted into the list. If a same candidate exists, the derived candidate is discarded.
If the number of candidates in affine merge candidate list is less than 5, zero motion vectors with zero reference indices are insert into the candidate list, until the list is full.
UMVE is extended to affine merge mode, which may be referred to as UMVE affine mode hereafter. The proposed method selects the first available affine merge candidate as a base predictor. Then it applies a motion vector offset to each control point's motion vector value from the base predictor. If there is no affine merge candidate available, this proposed method will not be used.
The selected base predictor's inter prediction direction, and the reference index of each direction is used without change.
In the current implementation, the current block's affine model is assumed to be a 4-parameter model, only 2 control points need to be derived. Thus, only the first 2 control points of the base predictor will be used as control point predictors.
For each control point, a zero_MVD flag is used to indicate whether the control point of current block has the same MV value as the corresponding control point predictor. If zero_MVD flag is true, there is no other signaling needed for the control point. Otherwise, a distance index and an offset direction index is signaled for the control point.
A distance offset table with size of 5 is used as shown in the table below. Distance index is signaled to indicate which distance offset to use. The mapping of distance index and distance offset values is shown in
The direction index can represent four directions as shown below, where only x or y direction may have an MV difference, but not in both directions.
If the inter prediction is uni-directional, the signaled distance offset is applied on the offset direction for each control point predictor. Results will be the MV value of each control point.
For example, when the base predictor is uni-directional, and the motion vector values of a control point is MVP (vpx, vpy). When distance offset and direction index are signaled, the motion vectors of current block's corresponding control points will be calculated as below. MV(vx, vy)=MVP(vpx, vpy)+MV(x-dir-factor*distance-offset, y-dir-factor*distance-offset)
If the inter prediction is bi-directional, the signaled distance offset is applied on the signaled offset direction for control point predictor's L0 motion vector, and the same distance offset with opposite direction is applied for control point predictor's L1 motion vector. Results will be the MV values of each control point, on each inter prediction direction.
For example, when base predictor is uni-directional, and the motion vector values of a control point on L0 is MVPL0 (v0px, v0py), and the motion vector of that control point on L1 is MVPL1(v1px, v1py). When distance offset and direction index are signaled, the motion vectors of current block's corresponding control points will be calculated as below.
MVPL0(v0x, v0y)=MVPL0(v0px, v0py)+MV(x-dir-factor*distance-offset, y-dir-factor*distance-offset)
MVPL1(v0x, v0y)=MVPL1(v0px, v0py)+MV(x-dir-factor*distance-offset, y-dir-factor*distance-offset)
Ultimate motion vector expression (UMVE) is presented. UMVE is used for either skip or merge modes with a proposed motion vector expression method.
UMVE re-uses merge candidate as same as those included in the regular merge candidate list in VVC. Among the merge candidates, a base candidate can be selected, and is further expanded by the proposed motion vector expression method.
UMVE provides a new motion vector difference (MVD) representation method, in which a starting point, a motion magnitude and a motion direction are used to represent a MVD.
Some embodiments use a merge candidate list as it is. But only candidates which are default merge type (MRG_TYPE_DEFAULT_N) are considered for UMVE's expansion.
The base candidate index defines the starting point. Base candidate index indicates the best candidate among candidates in the list as follows.
If the number of base candidate is equal to 1, Base candidate IDX is not signaled.
The distance index is motion magnitude information. Distance index indicates the pre-defined distance from the starting point information. Pre-defined distance is as follows:
The direction index represents the direction of the MVD relative to the starting point. The direction index can represent of the four directions as shown below.
The UMVE flag is signalled after sending a skip flag or merge flag. If skip or merge flag is true, UMVE flag is parsed. If UMVE flag is equal to 1, UMVE syntaxes are parsed. But, if not 1, AFFINE flag is parsed. If AFFINE flag is equal to 1, that is AFFINE mode; if AFFINE flag is not equal to 1, skip/merge index is parsed for VTM's skip/merge mode.
An additional line buffer due to UMVE candidates is not needed because a skip/merge candidate of software is directly used as a base candidate. Using input UMVE index, the supplement of MV is decided prior to motion compensation. There is no need to hold long line buffer for this.
In current common test condition, either the first or the second merge candidate in the merge candidate list could be selected as the base candidate.
UMVE is also known as merge with MVD (MMVD).
In conventional bi-prediction, the predictors from L0 and L1 are averaged to generate the final predictor using the equal weight 0.5. The predictor generation formula is shown as in Equation (3)
P
TraditionalBiPred=(PL0+PL1+RoundingOffset)>>shiftNum, (1)
In Equation (3), PTraditionalBiPred is the final predictor for the conventional bi-prediction, PL0 and PL1 are predictors from L0 and L1, respectively, and RoundingOffset and shiftNum are used to normalize the final predictor.
Generalized Bi-prediction (GBi) is proposed to allow applying different weights to predictors from L0 and L1. GBi is also referred to as “Bi-prediction with CU-level weights (BCW).” The predictor generation is shown in Equation (4).
P
GBi=((1−w1)*PL0+w1*PL1+RoundingOffsetGBi)>>shiftNumGBi, (2)
In Equation (4), PGBi is the final predictor of GBi. (1−w1) and w1 are the selected GBi weights applied to the predictors of L0 and L1, respectively. RoundingOffsetGBi and shiftNumGBi are used to normalize the final predictor in GBi.
The supported weights of w1 is {−¼, ⅜, ½, ⅝, 5/4}. One equal-weight set and four unequal-weight sets are supported. For the equal-weight case, the process to generate the final predictor is exactly the same as that in the conventional bi-prediction mode. For the true bi-prediction cases in random access (RA) condition, the number of candidate weight sets is reduced to three.
For advanced motion vector prediction (AMVP) mode, the weight selection in GBi is explicitly signaled at CU-level if this CU is coded by bi-prediction. For merge mode, the weight selection is inherited from the merge candidate. In this proposal, GBi supports decoder-side motion vector refinement (DMVR) to generate the weighted average of template as well as the final predictor for BMS-1.0.
Local Illumination Compensation (LIC) is based on a linear model for illumination changes, using a scaling factor a and an offset b. And it is enabled or disabled adaptively for each inter-mode coded coding unit (CU).
When LIC applies for a CU, a least square error method is employed to derive the parameters a and b by using the neighboring samples of the current CU and their corresponding reference samples. More specifically, as illustrated in
When a CU is coded with merge mode, the LIC flag is copied from neighboring blocks, in a way similar to motion information copy in merge mode; otherwise, an LIC flag is signalled for the CU to indicate whether LIC applies or not.
When LIC is enabled for a picture, additional CU level RD check is needed to determine whether LIC is applied or not for a CU. When LIC is enabled for a CU, mean-removed sum of absolute difference (MR-SAD) and mean-removed sum of absolute Hadamard-transformed difference (MR-SATD) are used, instead of SAD and SATD, for integer pel motion search and fractional pel motion search, respectively.
To reduce the encoding complexity, the following encoding scheme is applied in the JEM.
In this approach, the current (partially) decoded picture is considered as a reference picture. This current picture is put in the last position of reference picture list 0. Therefore, for a slice using the current picture as the only reference picture, its slice type is considered as a P slice. The bitstream syntax in this approach follows the same syntax structure for inter coding while the decoding process is unified with inter coding. The only outstanding difference is that the block vector (which is the motion vector pointing to the current picture) always uses integer-pel resolution.
Changes from block level CPR_flag approach are:
The encoder performs RD check for blocks with either width or height no larger than 16. For non-merge mode, the block vector search is performed using hash-based search first. If there is no valid candidate found from hash search, block matching based local search will be performed.
In the hash-based search, hash key matching (32-bit cyclic redundancy check (CRC)) between the current block and a reference block is extended to all allowed block sizes. The hash key calculation for every position in current picture is based on 4×4 blocks. For the current block of a larger size, a hash key matching to a reference block happens when all its 4×4 blocks match the hash keys in the corresponding reference locations. If multiple reference blocks are found to match the current block with the same hash key, the block vector costs of each candidates are calculated and the one with minimum cost is selected.
In block matching search, the search range is set to be 64 pixels to the left and on top of current block, and the search range is restricted to be within the current coding tree unit (CTU).
There are some potential problems:
Hereinafter, inter pictures that can only use the current picture as the reference picture are referred to as CPR-only inter pictures. The list below should be considered as examples to explain general concepts. The examples should not be interpreted in a narrow way. Furthermore, these embodiments can be combined in any manner.
This section shows some embodiments for the improved UMVE design.
In this embodiment, a flag of whether distance is allowed is signaled. The changes compared to the latest VVC specification are highlighted in bold italics.
sps_UMsVE_enabled_flag equal to 0 specifies that the UMVE (MMVD) is disabled.
sps_UMVE_enabled_flag equal to 1 specifies that the UMVE is enabled.
sps_disable_fractional_distance equal to 0 specifies that fractional pixel distance of the UMVE (MMVD) is enabled. sps_disable_fractional_distance equal to 1 specifies that fractional pixel distance of the UMVE is disabled.
Alternatively, sps_disable_fractional_distance may be replaced by sps_enable_fractional_distance. Alternatively, sps_disable_fractional_distance may be directly coded.
Alternatively, sps_UMVE_enabled_flag, sps_disable_fractional_distance may be further signalled in picture header/PPS/slice header/tile group header/region/CTU rows/groups of CTUs/CTU.
mmvd_distance_idx[ x0][y0] specifies the index used to derive MmvdDistance[0][y0] as specified in Table 7-7 for sps_disable_fractional_distance equal to 0 and Table 7-x for sps_disable_fractional_distance equal to 1. The array indices x0, y0 specify the location (x0, y0) of the top-left luma sample of the considered coding block relative to the top-left luma sample of the picture.
In this embodiment, indications of distance tables is signaled. The changes compared to the latest VVC specification are highlighted in bold italics.
u(1)
u(M)
sps_num_ladf_intervals_minus2
sps_ladf_lowest_interval_qp_offset
pps_pic_parameter_set_id
pps_seq_parameter_set_id
deblocking_filter_override_enabled_flag
pps_deblocking_filter_disabled_flag
pps_beta_offset_div2
pps_tc_offset_div2
sps_UMVE_enabled_flag equal to 0 specifies that the UMVE (MMVD) is disabled. sps_UMVE_enabled_flag equal to 1 specifies that the UMVE is enabled.
sps_distance_tables equal to L specifies that (L+1) distance tables of the UMVE (MMVD) are defined.
index_distance_table equal to L specifies that L-th distance tables of the UMVE (MMVD) is used.
In one example, M is set to 2.
Alternatively, sps_distance_tables may be directly coded.
Alternatively, sps_UMVE_enabled_flag, sps_distance_tables, index_distance_table, may be further signalled in picture header/PPS/slice header/tile group header/region/CTU rows/groups of CTUs/CTU.
Alternatively, furthermore, when one base merge candidate is CPR, a different distance table may be utilized from those defined as above.
Alternatively, the direction table may be signaled/pre-defined.
In this embodiment, a flag of whether fractional distance is allowed is signaled. The changes compared to the latest VVC specification are highlighted in bold italics.
sps_seq_parameter_set_id
chroma_format_idc
u(1)
u(1)
sps_num_ladf_intervals_minus2
sps_ladf_lowest_interval_qp_offset
sps_UMVE_enabled_flag equal to 0 specifies that the UMVE (MMVD) is disabled.
sps_UMVE_enabled_flag equal to 1 specifies that the UMVE is enabled.
sps_disable_fractional_distance equal to 0 specifies that fractional pixel distance of the UMVE (MMVD) is enabled. sps_disable_fractional_distance equal to 1 specifies that fractional pixel distance of the UMVE is disabled.
Alternatively, sps_disable_fractional_distance may be replaced by sps_enable_fractional_distance. Alternatively, sps_disable_fractional_distance may be directly coded.
Alternatively, sps_UMVE_enabled_flag, sps_disable_fractional_distance may be further signalled in picture header/PPS/slice header/tile group header/region/CTU rows/groups of CTUs/CTU.
mmvd_distance_idx[ x0][y0] specifies the index used to derive MmvdDistance[x0][y0] as specified in Table 7-7 for sps_disable_fractional_distance equal to 0 and Table 7-x for sps_disable_fractional_distance equal to 1. The array indices x0, y0 specify the location (x0, y0) of the top-left luma sample of the considered coding block relative to the top-left luma sample of the picture.
u(1)
enable_MMVD_distance_scale_flag equal to 1 indicates scaling is applied to the default distance table. enable_MMVD_distance_scale_flag equal to 0 indicates the default distance table is utilized.
In one example, M is set to 2. Alternatively, the left shift may be replaced by right shift.
The syntax change is described as follows, and the newly added parts are highlighted in bold italics.
sps_gbi_enabled_flag
sps_mh_intra_enabled_flag
sps
_fracmmvd_enabled_flag
u(1)
sps_triangle_enabled_flag
sps_ladf_enabled_flag
sps_num_ladf_intervals_minus2
sps_ladf_lowest_interval_qp_offset
sps_ladf_qp_offset[i ]
sps_ladf_delta_threshold_minus1[i ]
five_minus_max_num_subblock_merge_cand
if( sps
_fracmmvd_enabled_flag )
tile
_group_fracmmvd_flag
sps_fracmmvd_enabled_flag equal to 1 specifies that tile_group_fracmmvd_flag is present in the tile group header syntax table for B picture and P picture. sps_fracmmvd_enabled_flag equal to 0 specifies that tile_group_fracmmvd_flag is not present in the tile group header syntax table for B picture and P picture.
tile_group_fracmmvd_flag equal to 1 specifies that merge mode with motion vector difference in fractional-pel precision is enabled in the current tile group. tile_group_fracmmvd_flag equal to 0 specifies that merge mode with motion vector difference in fractional-pel precision is disabled in the current tile group. When not present, the value of tile_group_fracmmvd_flag is inferred to be 1.
mmvd_distance_idx[ x0][y0] specifies the index used to derive MmvdDistance[x0][y0] as specified in Table 7-9. The array indices x0, y0 specify the location (x0, y0) of the top-left luma sample of the considered coding block relative to the top-left luma sample of the picture.
The syntax change is described as follows, and the newly added parts are highlighted in bold italics.
sps_gbi_enabled_flag
sps_mh_intra_enabled_flag
sps
_fracmmvd_disabled_flag
u(1)
sps_triangle_enabled_flag
sps_ladf_enabled_flag
sps_num_ladf_intervals_minus2
sps_ladf_lowest_interval_qp_offset
sps_ladf_qp_offset[i ]
sps_ladf_delta_threshold_minus1[i ]
tile_group_temporal_mvp_enabled_flag
five_minus_max_num_subblock_merge_cand
tile
_group_fracmmvd_disabled_flag
sps_racmmvd_disabled_flag equal to 1 specifies that disabling merge mode with motion vector difference in fractional-pel precision is applied. sps_fracmmvd_disabled_flag equal to 0 specifies that disabling merge mode with motion vector difference in fractional-pel precision is not applied.
tile_group_fracmmvd_disabled_flag equal to 1 specifies that merge mode with motion vector difference in fractional-pel precision is disabled in the current tile group. tile_group_fracmmvd_disabled_flag equal to 0 specifies that merge mode with motion vector difference in fractional-pel precision is enabled in the current tile group. When not present, the value of tile_group_fracmmvd_disabled_flag is inferred to be 0.
mmvd_distance_idx[x0][y0] specifies the index used to derive MmvdDistance[x0][y0] as specified in Table 7-9. The array indices x0, y0 specify the location (x0, y0) of the top-left luma sample of the considered coding block relative to the top-left luma sample of the picture.
The syntax change is described as follows, and the newly added parts are highlighted in bold italics.
sps_gbi_enabled_flag
sps_mh_intra_enabled_flag
sps
_fracmmvd_disabled_flag
u(1)
sps_triangle_enabled_flag
sps_ladf_enabled_flag
sps_num_ladf_intervals_minus2
sps_ladf_lowest_interval_qp_offset
sps_ladf_qp_offset[ i ]
sps_ladf_delta_threshold_minus1[ i ]
tile_group_temporal_mvp_enabled_flag
five_minus_max_num_subblock_merge_cand
if( sps
_fracmmvd_disabled_flag )
tile
_group_fracmmvd_flag
sps_fracmmvd_disabled_flag equal to 1 specifies that disabling merge mode with motion vector difference in fractional-pel precision is applied. sps_fracmmvd_disabled_flag equal to 0 specifies that disabling merge mode with motion vector difference in fractional-pel precision is not applied.
tile_group_fracmmvd_flag equal to 1 specifies that merge mode with motion vector difference in fractional-pel precision is enabled in the current tile group. tile_group_fracmmvd_flag equal to 0 specifies that merge mode with motion vector difference in fractional-pel precision is disabled in the current tile group. When not present, the value of tile_group_fracmmvd_flag is inferred to be 1.
mmvd_distance_idx[x0][y0] specifies the index used to derive MmvdDistance[x0][y0] as specified in Table 7-9. The array indices x0, y0 specify the location (x0, y0) of the top-left luma sample of the considered coding block relative to the top-left luma sample of the picture.
It should be noted for all embodiments, the related syntax may be put to other video data units (e.g., SPS/VPS/PPS/Picture header/slice header/tile group header etc. al).
The system 3100 may include a coding component 3104 that may implement the various coding or encoding methods described in the present disclosure. The coding component 3104 may reduce the average bitrate of video from the input 3102 to the output of the coding component 3104 to produce a coded representation of the video. The coding techniques are therefore sometimes called video compression or video transcoding techniques. The output of the coding component 3104 may be either stored, or transmitted via a communication connected, as represented by the component 3106. The stored or communicated bitstream (or coded) representation of the video received at the input 3102 may be used by the component 3108 for generating pixel values or displayable video that is sent to a display interface 3110. The process of generating user-viewable video from the bitstream representation is sometimes called video decompression. Furthermore, while certain video processing operations are referred to as “coding” operations or tools, it will be appreciated that the coding tools or operations are used at an encoder and corresponding decoding tools or operations that reverse the results of the coding will be performed by a decoder.
Examples of a peripheral bus interface or a display interface may include universal serial bus (USB) or high definition multimedia interface (HDMI) or DisplayPort, and so on. Examples of storage interfaces include serial advanced technology attachment (SATA), peripheral component interconnect (PCI), integrated drive electronics (IDE) interface, and the like. The embodiments described in the present disclosure may be embodied in various electronic devices such as mobile phones, laptops, smartphones or other devices that are capable of performing digital data processing and/or video display.
In some embodiments, the video coding methods may be implemented using an apparatus that is implemented on a hardware platform as described with respect to
In the present disclosure, the term “video processing” may refer to video encoding, video decoding, video compression or video decompression. For example, video compression algorithms may be applied during conversion from pixel representation of a video to a corresponding bitstream representation or vice versa. The bitstream representation of a current video block may, for example, correspond to bits that are either co-located or spread in different places within the bitstream, as is defined by the syntax. For example, a macroblock may be encoded in terms of transformed and coded error residual values and also using bits in headers and other fields in the bitstream.
It will be appreciated that several embodiments have been disclosed that will benefit video encoder and decoder embodiments incorporated within video processing devices such as smartphones, laptops, desktops, and similar devices by allowing the use of virtual motion candidates that are constructed based on various rules disclosed in the present disclosure.
Various embodiments may be described using the following clause-based format.
The first set of clauses describes certain features and aspects of the disclosed embodiments listed in the previous section, including, for example, item 1.
The second set of clauses describes certain features and aspects of the disclosed embodiments listed in the previous section, including, for example, items 2, 4, and 9.
The third set of clauses describes certain features and aspects of the disclosed embodiments listed in the previous section, including, for example, items 3 and 7.
The fourth set of clauses describes certain features and aspects of the disclosed embodiments listed in the previous section, including, for example, items 8, 10, 11, 12, 13, 14. 15, and 16.
The fifth set of clauses describes certain features and aspects of the disclosed embodiments listed in the previous section, including, for example, items 18-25.
The disclosed and other solutions, examples, embodiments, modules and the functional operations described in this disclosure can be implemented in digital electronic circuitry, or in computer software, firmware, or hardware, including the structures disclosed in this disclosure and their structural equivalents, or in combinations of one or more of them. The disclosed and other embodiments can be implemented as one or more computer program products, i.e., one or more modules of computer program instructions encoded on a computer readable medium for execution by, or to control the operation of, data processing apparatus. The computer readable medium can be a machine-readable storage device, a machine-readable storage substrate, a memory device, a composition of matter effecting a machine-readable propagated signal, or a combination of one or more them. The term “data processing apparatus” encompasses all apparatus, devices, and machines for processing data, including by way of example a programmable processor, a computer, or multiple processors or computers. The apparatus can include, in addition to hardware, code that creates an execution environment for the computer program in question, e.g., code that constitutes processor firmware, a protocol stack, a database management system, an operating system, or a combination of one or more of them. A propagated signal is an artificially generated signal, e.g., a machine-generated electrical, optical, or electromagnetic signal, that is generated to encode information for transmission to suitable receiver apparatus.
A computer program (also known as a program, software, software application, script, or code) can be written in any form of programming language, including compiled or interpreted languages, and it can be deployed in any form, including as a stand-alone program or as a module, component, subroutine, or other unit suitable for use in a computing environment. A computer program does not necessarily correspond to a file in a file system. A program can be stored in a portion of a file that holds other programs or data (e.g., one or more scripts stored in a markup language document), in a single file dedicated to the program in question, or in multiple coordinated files (e.g., files that store one or more modules, sub programs, or portions of code). A computer program can be deployed to be executed on one computer or on multiple computers that are located at one site or distributed across multiple sites and interconnected by a communication network.
The processes and logic flows described in this disclosure can be performed by one or more programmable processors executing one or more computer programs to perform functions by operating on input data and generating output. The processes and logic flows can also be performed by, and apparatus can also be implemented as, special purpose logic circuitry, e.g., a field-programmable gate array (FPGA) or an application-specific integrated circuit (ASIC).
Processors suitable for the execution of a computer program include, by way of example, both general and special purpose microprocessors, and any one or more processors of any kind of digital computer. Generally, a processor will receive instructions and data from a read only memory or a random-access memory or both. The essential elements of a computer are a processor for performing instructions and one or more memory devices for storing instructions and data. Generally, a computer will also include, or be operatively coupled to receive data from or transfer data to, or both, one or more mass storage devices for storing data, e.g., magnetic, magneto optical disks, or optical disks. However, a computer need not have such devices. Computer readable media suitable for storing computer program instructions and data include all forms of non-volatile memory, media and memory devices, including by way of example semiconductor memory devices, e.g., erasable programmable read-only memory (EPROM), electrically erasable programmable read-only memory (EEPROM), and flash memory devices; magnetic disks, e.g., internal hard disks or removable disks; magneto optical disks; and compact disc, read-only memory (CD ROM) and digital versatile disc, read-only memory (DVD-ROM) disks. The processor and the memory can be supplemented by, or incorporated in, special purpose logic circuitry.
While the present disclosure contains many specifics, these should not be construed as limitations on the scope of any subject matter or of what may be claimed, but rather as descriptions of features that may be specific to particular embodiments of the present disclosure. Certain features that are described in the present disclosure in the context of separate embodiments can also be implemented in combination in a single embodiment. Conversely, various features that are described in the context of a single embodiment can also be implemented in multiple embodiments separately or in any suitable subcombination. Moreover, although features may be described above as acting in certain combinations and even initially claimed as such, one or more features from a claimed combination can in some cases be excised from the combination, and the claimed combination may be directed to a subcombination or variation of a subcombination.
Similarly, while operations are depicted in the drawings in a particular order, this should not be understood as requiring that such operations be performed in the particular order shown or in sequential order, or that all illustrated operations be performed, to achieve desirable results. Moreover, the separation of various system components in the embodiments described in the present disclosure should not be understood as requiring such separation in all embodiments.
Only a few implementations and examples are described and other implementations, enhancements and variations can be made based on what is described and illustrated in the present disclosure.
Number | Date | Country | Kind |
---|---|---|---|
PCT/CN2018/116067 | Nov 2018 | WO | international |
PCT/CN2018/122626 | Dec 2018 | WO | international |
PCT/CN2018/125417 | Dec 2018 | WO | international |
PCT/CN2019/072814 | Jan 2019 | WO | international |
This application is a continuation of U.S. application Ser. No. 17/316,300, filed on May 10, 2021, which is a continuation of International Application No. PCT/CN2019/119217, filed on Nov. 18, 2019, which claims the priority to and benefits of International Patent Application No. PCT/CN2018/116067, filed on Nov. 17, 2018, International Patent Application No. PCT/CN2018/122626, filed on Dec. 21, 2018, International Patent Application No. PCT/CN2018/125417, filed on Dec. 29, 2018 and International Patent Application No. PCT/CN2019/072814, filed on Jan. 23, 2019. All the aforementioned patent applications are hereby incorporated by reference in their entireties.
Number | Date | Country | |
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Parent | 17316300 | May 2021 | US |
Child | 18516620 | US | |
Parent | PCT/CN2019/119217 | Nov 2019 | US |
Child | 17316300 | US |