TREA

Generalized flash memory and method thereof

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Information

  • Patent Application
  • 20080005449
  • Publication Number
    20080005449
  • Date Filed
    July 03, 2006
    18 years ago
  • Date Published
    January 03, 2008
    17 years ago
Information
Abstract
The invention presents a flash memory with a generalized interface for facilitating to develop multi-type flash memories and a method thereof. Meanwhile the generalized flash memory includes a physical memory for storing data; a logical controller connected with the physical memory for providing an identify function of the physical memory and communicating with an external system in an unified format; and a buffer register connected with the logical controller, wherein the logical controller and the buffer register map the physical memory to an entire continuous memory space, thereby facilitating to develop multi-type flash memories.
Description

BRIEF DESCRIPTION OF THE DRAWINGS


FIG. 1 illustrates block diagram of a flash memory based system according to the prior art;



FIG. 2 illustrates a reference diagram for explaining blocks for storing ordinary data provided in the flash memory of FIG. 1 according to the prior art;



FIG. 3 illustrates a reference diagram for explaining a log pointer table according to the prior art;



FIG. 4 illustrates a preferred embodiment of a generalized flash memory according to the present invention;



FIG. 5 illustrates a case of issuing a request from an external system to the generalized flash memory of to the present invention;



FIG. 6 illustrates another case of issuing a request from an external system to the generalized flash memory of to the present invention;



FIG. 7 illustrates another preferred embodiment of a generalized flash memory according to the present invention;



FIG. 8 illustrates a preferred method of a generalized flash memory according to the present invention.





DETAILED DESCRIPTION OF THE PREFERRED EMBODIMENT

The present invention discloses a flash memory with a generalized interface for facilitating to develop multi-type flash memories and a method thereof, and the objects and advantages of the present invention will become more readily apparent to those ordinarily skilled in the art after reviewing the following detailed description. The present invention needs not be limited to the following embodiment.


Please refer to FIG. 4. It illustrates a preferred embodiment of a generalized flash memory according to the present invention. As shown in FIG. 4, the generalized flash memory includes a physical memory 41 for storing data; and a logical controller 42 connected with the physical memory 41 and mapping the physical memory 41 to an entire continuous memory space for providing an identify function of the physical memory 41 and communicating with an external system 50 in an unified format.


In practice, the logical controller 42 further includes an access interface 421 for connecting with the external system 50, wherein the access interface 421 is one selected from a group consisting of a flash memory access interface, a USB port, a COM port and a print port. In this embodiment, the logical controller 42 could further include a programmable circuit device (not shown) for storing specifications of the physical memory 41 to achieve the purpose of simulating the interface and functions of different flash memories easily. Furthermore, the logical controller further includes a wear leveling module for programming the physical memory evenly or an anti-disturbance module for preventing write disturbance and keeping the validity of data in the physical memory. According to the present invention, the physical memory 41 is mapped to an entire continuous memory space and the user from the external system 50 need not manage any block of the physical memory 41. For example, referring to FIG. 5, the logical controller 42 will manage all blocks of the physical memory 41. When a request of read/write data to a bad block 411 of the physical memory 41 is issued from the external system 50, the logical controller 42 will re-map the bad block 411 to a replace block 412 and then the request of read/write data is executed to the replace block 412, as shown in FIG. 5. In other case, when a request of write data to a programmed block 413 of the physical memory 41 is issued from the external system 50, the logical controller 42 will re-map the programmed block 413 to an available block 414 and then the request of write data is executed to the available block 414, as shown in FIG. 6. In the present invention, the mapping, from the logical blocks to the physical blocks of the physical memory, is managed by the logical controller. The user of the external system 50 won't manage one erase operation and write operations to recover the portion erased by the erase operation for executing a request to write (overwrite) data. For the user of the external system 50, the physical memory is an entire continuous and available memory space


Please refer to FIG. 7. It illustrates a preferred embodiment of a generalized flash memory according to the present invention. As shown in FIG. 7, the generalized flash memory includes a physical memory 41 for storing data; a logical controller 42 connected with the physical memory 41 for providing an identify function of the physical memory 41 and communicating with an external system 50 in an unified format; and a buffer register 43 connected with the logical controller 42, wherein the logical controller 42 and the buffer register 43 map the physical memory to an entire continuous memory space.


Similarly, the logical controller 42 further includes an access interface 421 for connecting with the external system 50, wherein the access interface 421 is one selected from a group consisting of a flash memory access interface, a USB port, a COM port and a print port. In this embodiment, the logical controller 42 could further include a programmable circuit device (not shown) for storing specifications of the physical memory 41 to achieve the purpose of simulating the interface and functions of different flash memories easily. Furthermore, the logical controller further includes a wear leveling module for programming the physical memory evenly or an anti-disturbance module for preventing write disturbance and keeping the validity of data in the physical memory. According to the above embodiment, the present invention also discloses a method of the generalized flash memory for managing the flash memory and achieving the purpose of facilitating to develop multi-type flash memories easily. Please refer to FIG. 8. It illustrates a preferred method of a generalized flash memory according to the present invention. As shown in FIG. 8, the method of generalized flash memory includes the steps of: a) providing a physical memory for storing data, as in the procedure S81; b) mapping the physical memory to an entire continuous memory space via a logical controller connected with the physical memory for providing an identify function of the physical memory and communicating with an external system in an unified format, as in the procedure S82; c) issuing a request from the external system, as in the procedure S83; and d) executing the request via the logical controller to access the entire continuous memory space of the physical memory, as in the procedure S84.


In practice, the request is a single operation for the physical memory and free of managing a block-mapping of physical memory. Preferably, the step d) further comprises step d1) of programming the physical memory evenly by a wear leveling module of the logical controller for keeping the physical memory as an entire continuous memory space, as in the procedure S841; and step d2) of keeping the validity of data in the physical memory via an anti-disturbance module of the logical controller for preventing write disturbance of the physical memory, as in the procedure S842. The present invention further discloses a logical controller with a programmable circuit device to store specifications of the physical memory for providing an identify function of the physical memory and communicating with the external system in a unified format, thereby facilitating to develop multi-type flash memories. Certainly, the physical memory can be a Random Access Memory (RAM). Moreover, the logical controller further includes an access interface for connecting with the external system; and the access interface can be one selected from a group consisting of a flash memory access interface, a USB port, a COM port and a print port.


In conclusion, the present invention provides a generalized flash memory, which provides a generalized interface for managing the flash memory, simplifies the entire structure and the managing process thereof, is capable of achieving the purpose of mapping the physical memory to an entire continuous memory space, and can rectify those drawbacks of the prior art and solve the above problems. The present invention further discloses a logical controller with a programmable circuit device to store specifications of the physical memory for providing an identify function of the physical memory and communicating with the external system in a unified format, thereby facilitating to develop multi-type flash memories. Meanwhile the prior art fail to disclose that. Accordingly, the present invention possesses many outstanding characteristics, effectively improves upon the drawbacks associated with the prior art in practice and application, produces practical and reliable products, bears novelty, and adds to economical utility value. Therefore, the present invention exhibits a great industrial value.


While the invention has been described in terms of what is presently considered to be the most practical and preferred embodiments, it is to be understood that the invention needs not be limited to the disclosed embodiment. On the contrary, it is intended to cover various modifications and similar arrangements included within the spirit and scope of the appended claims, which are to be accorded with the broadest interpretation so as to encompass all such modifications and similar structures.

Claims
  • 1. A generalized flash memory comprising: a physical memory for storing data;a logical controller connected with said physical memory for providing an identify function of said physical memory and communicating with an external system in an unified format; anda buffer register connected with said logical controller, wherein said logical controller and said buffer register map said physical memory to an entire continuous memory space.
  • 2. The generalized flash memory according to claim 1, wherein said physical memory is a Random Access Memory (RAM).
  • 3. The generalized flash memory according to claim 1, wherein said logical controller further comprises an access interface for connecting with said external system.
  • 4. The generalized flash memory according to claim 3, wherein said access interface is one selected from a group consisting of a flash memory access interface, a USB port, a COM port and a print port.
  • 5. The generalized flash memory according to claim 1, wherein said logical controller further comprises a programmable circuit device for storing specifications of said physical memory.
  • 6. The generalized flash memory according to claim 1, wherein said logical controller further comprises a wear leveling module for programming said physical memory evenly.
  • 7. The generalized flash memory according to claim 1, wherein said logical controller further comprises an anti-disturbance module for preventing write disturbance and keeping the validity of data in said physical memory.
  • 8. A generalized flash memory comprising: a physical memory for storing data; anda logical controller connected with said physical memory and mapping said physical memory to an entire continuous memory space for providing an identify function of said physical memory and communicating with an external system in an unified format.
  • 9. The generalized flash memory according to claim 8, wherein said logical controller further comprises an access interface for connecting with said external system.
  • 10. The generalized flash memory according to claim 9, wherein said access interface is one selected from a group consisting of a flash memory access interface, a USB port, a COM port and a print port.
  • 11. The generalized flash memory according to claim 8, wherein said logical controller further comprises a programmable circuit device for storing specifications of said physical memory.
  • 12. The generalized flash memory according to claim 8, wherein said logical controller further comprises a wear leveling module for programming said physical memory evenly.
  • 13. The generalized flash memory according to claim 8, wherein said logical controller further comprises an anti-disturbance module for preventing write disturbance and keeping the validity of data in said physical memory.
  • 14. A method of generalized flash memory comprising the steps of: a) providing a physical memory for storing data;b) mapping said physical memory to an entire continuous memory space via a logical controller connected with said physical memory for providing an identify function of said physical memory and communicating with an external system in an unified format;c) issuing a request from said external system; andd) executing said request via said logical controller to access said entire continuous memory space of said physical memory.
  • 15. The method according to claim 14, wherein said request is a single operation for said physical memory and free of managing a block-mapping of physical memory.
  • 16. The method according to claim 14, wherein said step d) further comprises step d1) of programming said physical memory evenly by a wear leveling module of said logical controller for keeping said physical memory as an entire continuous memory space.
  • 17. The method according to claim 14, wherein said step d) further comprises step d2) of keeping the validity of data in said physical memory via an anti-disturbance module of said logical controller for preventing write disturbance of said physical memory.
  • 18. The method according to claim 14, wherein said step b) further comprises step b1) of providing specifications of said physical memory for storage in a programmable circuit device of said logical controller.
  • 19. The method according to claim 14, wherein said physical memory is a Random Access Memory (RAM).
  • 20. The method according to claim 14, wherein said logical controller further comprises an access interface for connecting with said external system.
  • 21. The method according to claim 20, wherein said access interface is one selected from a group consisting of a flash memory access interface, a USB port, a COM port and a print port.