Alexandre E. Eichenberger and Edward S. Davidson, "Register Allocation for Predicated Code," In Proc. of the 28th Annual International Symposium on Microarchitecture, Nov. 1995. |
N.J. Walters, S.A. Mahlke, W.-M. W. Hwu and B.R. Rau, "Reverse IF-Conversion." In Proc. of the SIGPLAN '93 Conference on Programming Language Design and Implementation, pp. 290-299, Jun. 1993. |
S.A. Mahlke, D.C. Lin, W.Y. Chen, R.E. Hank and R.A. Bringmann, "Effective Compiler Support for Predicated Execution Using Hyperblock," In Proc. of the 25th Annual International Symposium on Microarchitecture, pp. 45-54, Dec. 1992. |
V. Kathail, M. Schlansker, B. Rau, "HPL PlayDoh Architecture Specification: Version 1.0," Hewlett-Packard Laboratories Technical Report, HPL-93-80, Feb. 1993. |
Eichenberger et al., "Stage Scheduling: a Technique to Reduce the Register Requirements of a Modulo Schedule," In Proc. of the 28th Annual International Symposium on Microarchitecture, pp. 338-349, Nov. 1995. |
Banerjee et al., "The Paradigm Compiler for Distributed-Memory Multicomputers," IEEE Comput. Soc., vol. 28, Issue 10, pp. 37-47, Oct. 1995. |
Gupta et al., "A Unified Framework for Optimizing Communication in Data-Parallel Programs," IEEE Trans. on Parallel & Dist. Sys., vol. 7, No. 7, pp. 689-704, Jul. 1996. |