Graphic fluorescent display device

FIELD OF THE INVENTION

The present invention relates to a graphic fluorescent display device; and, more particularly, to a graphic fluorescent display device incorporating therein a planar grid.

BACKGROUND OF THE INVENTION

FIGS. 1A

to

2

B provide schematic views for illustrating the arrangements and operation methods of anodes and grids of conventional graphic fluorescent display devices.

FIG. 1A

is a top view for showing the arrangement of the anodes and the grids, in which reference notations A

11

to A

52

represent anodes; G

1

to G

5

, the grids; A

1

and A

2

, two anode lead wires. And in

FIG. 1A

, only three rows of the anodes and five grids are described. Every second anodes in a same row are connected to a same anode lead wire. When viewed from top of the fluorescent display device, the anodes, grids and filaments (not shown) are vertically disposed in that order while maintaining certain distances therebetween. Electrons emitted from the filaments pass through the grids G

1

to G

5

and reach the anode A

11

to A

52

.

In

FIG. 1A

, the grid G

1

controls the anodes A

11

and A

12

and the gird G

2

does the anodes A

21

and A

22

. The grids G

3

to G

5

also function similarly.

FIG. 1B

is a schematic view for explaining operation scheme of the graphic fluorescent display device shown in FIG.

1

A.

For instance, in order to turn on the anode A

22

to emit light, negative voltages are respectively applied to the grids G

1

, G

3

, G

4

and G

5

and the anode lead wire A

1

, while a positive voltage is respectively applied to the grid G

2

and the anode lead wire A

2

. The electrons emitted from the filament can pass through the grid G

2

but cannot pass through the remaining grids G

1

, G

3

, G

4

and G

5

since the electrons moving toward the grid G

1

, G

3

, G

4

and G

5

are repulsed by the negative electric fields created by negative voltages applied thereto. The electrons passing through the grid G

2

can reach the anode A

22

to which positive voltage is applied but cannot reach the anode A

21

to which negative voltage is applied.

Since, however, the electrons moving toward the anode A

22

are affected by the negative electric field generated by the grid G

3

of negative potential, the electrons may not reach an edge part of the anode A

22

adjacent to the grid G

3

. As a result, there occurs the so-called eclipse phenomenon where an anode has a dark spot at the edge adjacent to a neighboring grid.

Referring to

FIG. 1C

, there is illustrated another conventional graphic fluorescent display device having anodes controlled by three anode lead wires A

1

to A

3

wherein every third anodes are connected to a same anode lead wire.

For instance, if negative voltages are applied to grids G

1

, G

3

and G

4

, while a positive voltage is applied to the grid G

2

, electrons emitted from filaments can pass through only the grid G

2

as shown in FIG.

1

C. Further, if the anode lead wires A

1

and A

3

are of positive potentials, the electrons can reach the anodes A

22

and A

32

. In this case, since the electrons moving toward the anodes A

22

and A

32

are affected by negative electric fields generated by the grids G

1

and G

3

of negative potentials, the electrons may not reach an edge part of the anode A

22

adjacent to the anode G

1

and an edge part of the anode A

32

adjacent to the anode G

3

. Therefore, such edge parts do not emit sufficient light, which results in dark streaks thereat (See, e.g., Japanese Laid-Open Publication Number JP63-35037).

Referring to

FIGS. 2A and 2B

, there are illustrated conventional operation methods employed in order to prevent the non-uniformity in the brightness of the fluorescent display device described above with reference to

FIGS. 1A

to

1

C.

In

FIGS. 2A and 2B

, there are four anode lead wires A

1

to A

4

and every fourth anodes are connected to a same anode lead wire. Each of the grids G

1

to G

5

controls two anodes.

In

FIG. 2A

, the grids G

2

and G

3

are of positive potentials and the grids G

1

, G

4

and G

5

are of negative potentials. Since the anodes A

22

and A

31

are selected to emit light, the anode lead wires A

1

and A

4

are of positive potential. In this case, since the anodes A

22

and A

31

are away from the grids G

1

and G

4

, the negative electric fields created by the grids G

1

and G

4

scarcely influence the passages of the electrons emitted from filaments to the anodes A

22

and A

31

.

The arrangement of the anodes, the grids and the anode lead wires shown in

FIG. 2B

is identical to the one shown in

FIG. 2A

, but grid selection scheme is different from that of FIG.

2

A.

In

FIG. 2B

, positive potentials are applied to the grids G

2

, G

3

and G

4

and negative potentials are applied to the grids G

1

and G

5

. Since the anodes A

31

, A

32

controlled by the grid G

3

are selected to be turned on, positive potentials are applied to the anode lead wires A

1

and A

2

. In this case, since the anodes A

31

and A

32

are away from the grids G

1

and G

5

of negative potential, the negative electric fields created by the grids G

1

and G

5

hardly influence the passages of the electrons emitted from the filaments to the anodes A

31

and A

32

. Further, the effect of the negative electric fields created by the grids G

1

and G

5

is less than that described in

FIG. 2A

(See, e.g., Japanese Laid-open Publication supra).

In

FIGS. 1A

to

1

C, the non-uniformity in the brightness due to electronic fields of neighboring grids may not be avoided. Such a non-uniformity problem can be avoided by the control schemes as shown in

FIGS. 2A and 2B

. However, the configurations of

FIGS. 2A and 2B

require one grid for every two anodes, even though the anodes are controlled by four anode lead wires. Resultantly, still a large number of grids are required, complicating the structure of a fluorescent display device with a large number of drivers of the grids. Further, a duty factor becomes lower to thereby decrease the luminance level of the device.

SUMMARY OF THE INVENTION

It is, therefore, an object of the present invention to eliminate the above-mentioned disadvantages of the prior art.

In accordance with the present invention, there is provided a fluorescent display device including:

a first substrate;

an insulating layer formed on the first substrate;

n columns or rows of m anodes, each anode having a fluorescent layer thereon;

Q anode lead wires provided for each column or row of the m anodes, every Qth anodes being connected to a same anode lead wire; and

z grids, z being a positive integer equal to or greater than m/Q but smaller than (m/Q)+1, formed on the insulating layer, each grid being arranged across the n columns of m anodes, each grid being provided with openings for each column or row of m anodes, each opening exposing a portion of the insulating layer and one anode being formed on the exposed portion of the insulating layer,

wherein the insulating layer, the anodes, the anode lead wires and grids are thin films.

BRIEF DESCRIPTION OF THE DRAWINGS

The above and other objects and features of the present invention will become apparent from the following description of preferred embodiments given in conjunction with the accompanying drawings, in which:

FIGS. 1A

to

1

C show schematic views for illustrating arrangements and operation schemes of anodes and grids of conventional graphic fluorescent displays;

FIGS. 2A and 2B

are schematic views for illustrating arrangement and operation schemes of anodes and grids of another conventional graphic fluorescent display;

FIG. 3

shows an arrangement of anodes and grids of a graphic fluorescent display device in accordance with a first preferred embodiment of the present invention;

FIGS. 4A and 4B

illustrate a partial cross sectional views of the graphic fluorescent display shown in

FIG. 3

;

FIGS. 5A and 5B

offer a partial cross sectional views of the graphic fluorescent display device shown in

FIG. 3

in accordance with second preferred embodiment of the present invention;

FIG. 6

presents a partial enlarged top view of

FIG. 5

of the graphic fluorescent display device in accordance with the second embodiment of the present invention; and

FIGS. 7A and 7B

show a cross sectional view and a top view of the graphic fluorescent display device in accordance with the third preferred embodiment of the present invention.

DETAILED DESCRIPTION OF THE PREFERRED EMBODIMENTS

FIG. 3

shows the arrangement of anodes and grids of a graphic fluorescent display device in accordance with a first preferred embodiment of the present invention.

Reference notations S

1

, A

11

to A

1

m

and An

1

to Anm, G

1

to Gz, O, Aw

1

to Aw

3

, A

1

to A

3

and Ah shown in

FIG. 1

respectively represent a first substrate formed of a glass material, anodes each having a fluorescent layer deposited thereon, thin film grids, openings formed in the grids, thin film anode lead wires, terminals of the anode lead wires and through-holes.

The anode lead wires Aw

1

to Aw

3

are provided on the first substrate S

1

, and the through-holes Ah are formed in a thin insulating layer D (

FIG. 4

) provided between the anodes and the anode lead wires. The through-holes Ah are located under the anodes A

11

to Anm, but are depicted in

FIG. 3

to schematically show electrical connections between the anodes and the anode lead wires.

The grids G

1

to Gz are provided on the insulating layer D (

FIG. 4

) formed on the first substrate S

1

and anodes A

11

to Anm are formed on the insulating layer D exposed through the openings O in the grids. The anodes A

11

to Anm are electrically connected with the anode lead wires Aw

1

to Aw

3

through the through-holes Ah in the insulating layer D.

The anodes A

11

to Anm are made of n columns each having m anodes. Anodes in each column are coupled to Q, e.g., 3 anode lead wires, and every Qth anodes are electrically connected to a same anode lead wire through a conductive material filled in through-holes therebetween.

The number of grids is z=m/Q and Q anodes from each column of anodes are allotted to each grid. If m/Q is not an integer, Z is set to be a smallest integer greater than m/Q.

In this embodiment, Q is three, and so every third anodes in each column are electrically connected to a same anode lead wire Aw

1

, Aw

2

or Aw

3

through the conductive material filled in the corresponding through-holes. The anodes in each column of anodes are allotted to and controlled by z (z=m/3) grids. For example, anodes A

11

to A

13

and anodes A

14

and A

16

in first column of anodes are respectively controlled by the grids G

1

and G

2

.

The number of column of anodes, i.e., n, the number of anodes in each column of anodes, i.e., m, the number of grids, i.e., z=m/Q and the number of anodes controlled by each grid, i.e., Q are determined depending on, e.g., the display area and the resolution.

FIGS. 4A and 4B

respectively illustrate enlarged cross sectional views taken along the lines X—X and Y—Y in

FIG. 3

respectively.

Reference notations S

1

, D, A

14

to A

44

and A

31

to A

34

, P

14

to P

44

and P

31

to P

34

, G

1

and G

2

, O, Aw

1

to Aw

3

and Ah used in

FIG. 4

respectively represent the first substrate, the insulating layer, anodes, fluorescent layers, grids, openings in the grids, anode lead wires and the through-holes filled with the conductive material.

The grids G

1

and G

2

having, for instance, rectangle shaped openings O therein, are provided on the insulating layer D. The anodes A

14

to A

44

and A

31

to A

34

respectively having fluorescent layers P

14

to P

44

and P

31

to P

34

coated thereon are disposed on the insulating layer D exposed through the openings O. The anodes A

14

to A

34

are electrically connected to the anode lead wires Aw

1

to Aw

3

through the conductive material filled in the through-holes Ah, wherein the three anode lead wires Aw

1

to Aw

3

are provided to each column of anodes. In

FIG. 4A

, the anodes A

14

, A

24

, A

34

, A

44

are connected to the anode lead wire Aw

1

for each corresponding column. In

FIG. 4B

, every third anodes, e.g., anodes A

31

, A

34

, are connected to the anode lead wire Aw

1

.

There are filaments (not shown) above the anodes A

14

to A

44

and A

31

to A

34

and electrons emitted from the filaments are controlled by the grids G

1

and G

2

to be radiated onto the selected anodes. Since surfaces of grids G

1

and G

2

facing the filaments are lower than surfaces of the fluorescent layers P

14

to P

44

and P

31

to P

34

facing the filaments, a charge-up level of exposed insulating layer D caused by the electrons emitted from the filaments is low and an eclipse phenomenon is reduced. Consequently, the non-uniformity in the brightness due to charged electrons is ameliorated.

Further, when the grids G

1

and G

2

are respectively biased by positive and negative potentials and the anode A

33

is selected to emit light, the electrons emitted towards the anode A

33

are less affected by the negative electric field created by the grid G

2

. Accordingly the light emission non-uniformity of the anode A

33

is also reduced. As illustrated in

FIGS. 1A and 1B

, the adverse effect of the negative electric fields created by the neighboring grids could not be avoided in the conventional graphic fluorescent display devices. Further, unlike the conventional fluorescent display device in

FIGS. 2A and 2B

having grids each controlling two anodes in each column of anodes even though those anodes are coupled with four anode lead wires, there is no limitation in the number of anodes for each column controlled by each grid. The number of anodes controlled by each grid can be identical to that of the anode lead wires. Therefore, the number of grids can be reduced, resulting in the increased duty factor and the luminance level. In addition, there is no need to apply positive voltages to more than one grids simultaneously, simplifying the grid driving method.

Referring to

FIGS. 5A and 5B

, there are illustrated partial cross sectional views of the graphic fluorescent display device shown in

FIG. 3

in accordance with second preferred embodiment of the present invention.

FIGS. 5A and 5B

are partial enlarged cross sectional views taken along the lines X—X and Y—Y in

FIG. 3

respectively. The arrangements of elements shown in

FIGS. 5A and 5B

are identical to those shown in

FIG. 4

excepting that there are provided recesses on the first substrate S

1

where the anodes are formed.

Reference notations used in

FIGS. 5A and 5B

are identical to those in

FIGS. 4A and 4B

. The first substrate S

1

is provided with a plurality of recesses on which the anodes A

24

, A

33

and A

34

are formed. The anode lead wires Aw

1

to Aw

3

are provided on the substrate S

1

having the recesses and then the insulating layer D is formed thereon. The anodes A

24

, A

33

and A

34

and grids G

1

and G

2

are provided on the insulating layer D simultaneously as shown in

FIGS. 5A and 5B

. The grids G

1

and G

2

have recessed portions Kg having a similar shape to that of the recesses formed in the substrate S

1

. The recessed portions Kg are substantially overlapped with the recesses formed on the first substrate S

1

. The recessed portions Kg have slanted side walls Tg and openings O formed on the bottom each of the recessed portions Kg. The anodes A

24

, A

33

and A

34

each having a fluorescent layer deposited thereon are provided on the insulating layer D exposed through the openings O formed in the grids.

In

FIGS. 5A and 5B

, since surfaces of grids G

1

and G

2

facing the filaments are lower than surfaces of the fluorescent layers P

24

, P

33

and P

34

facing the filaments, the charge-up level of the exposed insulating layer D caused by electrons emitted from the filaments becomes lower and the light emission non-uniformity problem becomes ameliorated.

However, same result can be obtained even in the case where the surfaces of grids G

1

and G

2

facing the filament are in substantially the same level as the surfaces of the fluorescent layers P

24

, P

33

and P

34

. Moreover, same result can be obtained even if the surfaces of grids G

1

and G

2

facing the filament are somewhat higher than those of the fluorescent layers P

24

, P

33

, P

34

, since very small part of the insulating layer D is exposed through the openings O.

Since the grids G

1

and G

2

shown in

FIGS. 5A and 5B

have the slanting side walls Tg in the recessed portions Kg, the cur-off characteristic of the grids can be enhanced and the area of the insulating layer exposed through the openings is decreased. Consequently, the charge-up level of the exposed insulating layer D caused by the electrons emitted from the filaments becomes lower.

In the present invention, the insulating layer D is made to be thin such that the thickness thereof is below tenth of that of prior art thick insulating layers, which in turn further decreases the charge-up level of the exposed insulating layer D.

The anodes, grids, insulating layer, and fluorescent layer of the present invention are thin films and the thicknesses of the anodes, grids and insulating layer are substantially equal to or smaller than the size of particles constituting the fluorescent layers. Therefore, if the fluorescent layers are made to be formed of two or more layers of particles, the thickness of the fluorescent layers can become undesirably too thick compared with those of anodes, grids and insulating layer. However, in accordance with the present invention, the relative levels of the grids and the fluorescent layers can be adjusted properly by varying the depth of the recesses formed in the substrate S

1

. The slanting side walls Tg may be unnecessary in terms of adjusting the levels of the grids and the fluorescent layers since the level adjustment can be controlled by the depth of the recesses. However, it is preferable to have the slanting side walls in order to improve cut-off characteristic, decrease the charge-up level and to prevent the open circuit in the anode lead wires and the grids.

The recesses of the substrate S

1

in accordance with the preferred embodiment of the invention are preferably to have a rectangular shape. However, the recesses can be made to have a stripe shape. In this case, the levels of the portions of the grids formed on the bottom of the stripe-shaped recesses become lower, which can degrade the cut-off property of the grids a little bit. However, it does not cause any serious practical problems when used.

FIG. 6

is a partial enlarged plan view of the graphic fluorescent display device in accordance with the second preferred embodiment of the present invention and mainly shows the two columns of recessed portions Kg formed in the grid G

1

. As shown, the anodes A

21

to A

23

, A

31

to A

33

(not shown) are provided on the insulating layer D exposed through the openings O and the fluorescent layers P

21

to P

23

and P

31

to P

33

are provided thereon. Portions of the insulating layer are exposed through the openings O. Since, however, the slanting side walls Tg cover almost the recessed portions Kg and the exposed portions of the insulating layer D are lower than the surfaces of the fluorescent layers P

21

to P

23

and P

31

to P

33

and the grid G

1

, the adverse effect of the charge-up of the insulating layer can be negligibly small.

In

FIGS. 3

to

6

, the anodes and the openings of grids have been described to have a square shape, yet they can be of any other shapes such as a circle or a polygon. In addition, an electron source can be a hot cathode, i.e., the filament, as described in the preferred embodiments or a cold cathode, e.g., field emission type cathode.

Furthermore, since the insulating layer D shown in

FIGS. 4A

to

6

also functions as a black matrix, it is not necessary to install an additional black matrix.

An exemplary method of forming a fluorescent display device in accordance with the present invention will now be expounded.

First, Al layer was deposited on the first substrate S

1

(in this example, the thickness of the first substrate was 1.1 mm) formed of glass material by a sputtering method. The preferable thickness of the Al layer is in the range from 0.1 μm to several μm, and in this example the thickness was 1.5 μm. Three anode lead wires for every column of anodes were formed from the Al layer by a photolithographic method. The width of each of the anode lead wires and a gap therebetween were 0.02 mm.

The insulating layer having the through-holes for connecting the anode lead wires to the anodes was formed on the substrate S

1

having the anode lead wires thereon. The insulating layer can be a glass frit layer formed by a screen printing method or a SiO

x

layer formed by a CVD (Chemical Vapor Deposition) method. In case of the CVD method, the thickness of the SiO

x

layer can be in the range of 0.01 μm to several μm. In this example, the thickness was 1.0 μm. In case of insulating layer formed by a CVD method, the through-holes can be formed therein by the photolithography method. The thickness of the glass flit layer made by the screen printing method can be set to be in the range from several μm to several tens of μm.

Al layer is formed on the insulating layer by a PVD (Physical Vapor Deposition) or a sputtering method. In this example, the Al layer was formed by the sputtering method. The thickness of the Al layer can be in the range from 0.01 μm to several μm and in this example, the thickness was 1.0 μm. The grids with the openings and the anodes provided inside the openings were simultaneously formed from the Al layer by a photolithography method. In addition, when the Al layer was formed, Al also filled the through-holes to thereby connect the corresponding anodes to the anode lead wires.

A fluorescent layer, whose size is 120 μm×120 μm, was coated on each anode by a slurry method. By the process as described above, the anode lead wires, the insulating layer, the anodes and the grids were formed on the first substrate formed of a glass material.

In case of the first substrate S

1

having a plurality of recesses, a step of forming recesses on the first substrate S

1

is carried out prior to the step of forming the anode lead wires. The remaining steps are identical to those described above. The recesses are formed by etching the first substrate S

1

with BHF (Buffered HF), and the depth of the recesses is in the range of several μm to several tens of μm. In this example, the depth was 10 μm. When forming the recesses on the first substrate S

1

, the surface of the first substrate S

1

except the recesses is processed to become rough so that the non-recessed surface becomes a anti-reflecting surface. In that case, commonly used anti-reflecting filter becomes unnecessary.

FIG. 7A

shows a cross sectional view of the graphic fluorescent display device in accordance with the third preferred embodiment of the present invention.

FIG. 7B

is a top view of the graphic fluorescent display device taken along the line Y—Y in FIG.

7

A.

Reference notation S

1

represents the first substrate; A, an anode lead wire; D, the insulating layer; G

1

to G

9

, the grids; P

1

to P

9

, the fluorescent layers deposited on the anodes (not shown); F

1

and F

2

, the filaments functioning as cathodes; S

2

, a second substrate; and B

1

to B

9

, rear electrodes. Each of the fluorescent layers P

1

to P

9

represent three fluorescent layers provided on the anodes controlled by a same grid. For example, the fluorescent layers P

1

represents three fluorescent layers deposited on three anodes controlled by the grid G

1

.

The insulating layer D, the anode lead wire A, anodes (not shown), the grids G

1

to G

9

and the fluorescent layers P

1

to P

9

are formed on the first substrate S

1

in an identical manner as described with reference to

FIGS. 3

to

6

. The stripe-shaped rear electrodes B

1

to B

9

are formed on the second substrate S

2

to be in parallel with the filaments F

1

and F

2

and the grids G

1

to G

9

. The first substrate S

1

is placed opposite to the second substrate S

2

with respect to the filaments F

1

and F

2

intervened therebetween.

A negative or a positive potential of several tens of voltages is applied to the rear electrodes B

1

to B

9

to control the electron emission from the filaments F

1

and F

2

. For instance, the rear electrodes B

1

to B

5

control the filament F

1

and the rear electrodes B

6

to B

9

control the filament F

2

. For instance, if the filament F

1

is selected to emit electrons and the filament F

2

is selected to not emit the electrons, a positive control voltage, i.e., a filament selection voltage, is applied to the rear electrodes B

1

to B

5

and a negative control voltage, i.e., a filament non-selection voltage, is applied to the rear electrodes B

6

to B

9

. The filament F

2

is under the influence of the negative electric field so that electron emission from the filament F

2

is halted.

The filament selection and non-selection voltages are respectively set to be in the ranges from an electric potential of the filament (here, 0 V to several volts) to a positive several tens of volts and to a negative several tens of volts.

As shown in

FIG. 7A

, since the distances from the filament F

1

to the closest fluorescent layer P

3

and those for the fluorescent layers P

1

, P

2

, P

4

and P

5

on both sides of P

3

from the filament F

1

are different from each other, the amounts of electrons emitted on the fluorescent layers P

1

to P

5

are also different when the rear electrodes B

1

to B

5

are set to have a same selection voltage, which in turn results in the nonuniform luminance level from the fluorescent layers P

1

to P

5

. Accordingly, in accordance with the present invention, the control voltages having potential gradient are applied to the rear electrodes B

1

to B

9

, so that the electrons are evenly emitted on the fluorescent layers.

FIG. 7B

shows the potential gradient of the control voltages applied to the rear electrodes B

1

to B

9

when the filament F

1

is selected to emit electrons.

In

FIG. 7B

, the rear electrode B

3

nearest to the filament F

1

is placed at 0 V (the preferable voltages of the filament is in the range from 0 V to several volts) potential; both the rear electrodes B

2

and B

4

, +2 V; both rear electrodes B

1

and B

5

, +4 V. By applying the control voltages having potential gradient to the rear electrodes, electrons from the filaments can evenly spread electrons across the fluorescent layers.

Further, in

FIG. 7

, the rear electrodes B

1

to B

9

have two functions of selecting a filament and distributing electrons therefrom evenly, yet it is also possible for the rear electrodes to have only one function of distributing electrons evenly.

In the embodiments described in

FIGS. 3

to

7

B, the driving method of the anodes and the grids can be accomplished by either applying data signals into the anodes while scanning the grids or applying data signals into the grids while scanning the anodes.

In the graphic fluorescent display devices of the present invention, since the anodes, grids and insulating layer are thin films at least, it becomes possible to manufacture graphic fluorescent display devices having high resolution while suppressing the charge-up level of the insulating layer.

While the invention has been shown and described with respect to the preferred embodiments, it will be understood by those skilled in the art that various changes and modifications may be made without departing from the spirit and scope of the invention as defined in the following claims.

Number	Name	Date	Kind
4218636	Miyazawa	Aug 1980	A
4459514	Morimoto et al.	Jul 1984	A
6392356	Stevens	May 2002	B1

Graphic fluorescent display device

Information

Patent Number

Date Filed

Date Issued

Inventors

Original Assignees

Examiners

Agents

CPC

US Classifications

Field of Search

US

International Classifications

Term Extension

Abstract

Description

Claims

Priority Claims (1)

US Referenced Citations (3)