Claims
- 1. A color image processing apparatus comprising:
- a memory means for storing an image arranged in a first array of pixels, each pixel represented by a code having a plurality of bits, and for storing an image arranged in a second array of pixels, each pixel represented by a bit having a value of "1" or "0"; and
- a color expand unit connected to said memory means, for storing in said first array an image corresponding to an image stored in said second array, each pixel of said image in said first array corresponding to a pixel of said image in said second array, wherein said color expand unit stores a first color code in said pixel of said first array if said corresponding pixel of said second array is represented by a "1", and stores a second color code if said corresponding pixel of said second array is represented by a "0", said color expand unit operating on plural pixels in parallel.
- 2. A color image processing apparatus as claimed in claim 1, further comprising:
- a visually display means connected to said memory means for generating a visually perceivable representation of said image stored in said first array of pixels of said memory means, each pixel having a color corresponding to said representative color code.
- 3. A color image processing apparatus as claimed in claim 1, further comprising:
- a first color register for storing therein said first color code;
- a second color register for storing therein said second color code.
- 4. A color image processing apparatus as claimed in claim 3, further comprising:
- color selection means connected to said first and second color registers for storing said first color code in said first color register and said second color code in said second color register.
- 5. A color image processing apparatus as claimed in claim 1, further comprising:
- a source indicating means for indicating the location of said second array within said memory means where said image is stored; and
- a destination indicating means for indicating the location of said first array within said memory means where said image is to be stored.
- 6. A color image processing apparatus as claimed in claim 5, wherein:
- said source indicating means includes a source address register for storing the address of said image in said second array, and a size register for storing a value corresponding to the size of said image in said second array; and
- said destination indicating means includes a destination address register for storing the address of said image in said first array.
- 7. A color image processing apparatus as claimed in claim 6, wherein:
- said size register includes an width section storing data indicative of the horizontal size of said image in said second array and a height section storing data indicative of the vertical size of said image in said second array.
- 8. A color image processing apparatus as claimed in claim 1, wherein:
- said image stored in said second array comprises a plurality of monochrome images corresponding to alphanumeric characters.
- 9. A color image processing apparatus as claimed in claim 1, wherein:
- said image stored in said second array comprises a plurality of sets of of alphanumeric characters, each of said sets corresponding to a font.
- 10. A color image processing apparatus as claimed in claim 1, wherein:
- said image stored in said second array comprises a plurality of monochrome images corresponding to icons.
- 11. A digital data processing apparatus comprising:
- a pixel size register for storing a value corresponding to a number N;
- a first color bus having M data lines, M being an integral multiple of N, said first color bus for transmitting M/N pixels represented by an N bit first color code;
- a second color bus having M data lines, said second color bus for transmitting M/N pixels represented by an N bit second color code;
- a monochrome image bus having M/N data lines, for transmitting image data;
- an expanded monochrome image bus having M data lines;
- an expansion means connected to said pixel size register, said monochrome image bus and said expanded monochrome image bus for generating an expanded monochrome image on said expanded monochrome image bus, said expanded monochrome image represented on said expanded monochrome image bus by a group of N "1" bits corresponding to a "1" bit on said monochrome image bus and by a group of N "0" bits corresponding to a "0" bit on said monochrome image bus;
- an output image bus having M data lines; and
- a color code substitution means connected to said first and second color buses, said expanded monochrome image bus and said output image bus for generating an output image on said output image bus, said output image represented by said first N bit color code corresponding to a group of N "1" bits on said expanded monochrome image bus and by said second N bit color code corresponding to a group of N "0" bits on said expanded monochrome image bus.
- 12. A graphics data processing apparatus as claimed in claim 11, further comprising:
- a first color register connected to said first color bus for storing said N bit first color code; and
- a second color register connected to said second color bus for storing said N bit second color code.
- 13. A graphics data processing apparatus as claimed in claim 11, further comprising:
- a monochrome image memory connected to said monochrome image bus for storing said monochrome image; and
- a display memory connected to said output image bus for storing said output image.
- 14. A graphics data processing apparatus as claimed in claim 11, further comprising:
- a memory means connected to said monochrome image bus and said output image bus including a data portion having at least one monochrome image stored therein, and including a display portion for storing in a subset thereof said output image;
- a source indicating means for indicating the locations within said memory means where said at least one monochrome image is stored; and
- a destination indicating means for indicating the locations within said memory means where said output image is to be stored.
- 15. A color image processing apparatus comprising:
- a memory means for storing an image arranged in a first array of pixels, each pixel represented by a digital code having a plurality of bits, and for storing an image arranged in a second array of pixels, each pixel represented by a bit having a value of "1" or "0";
- a color expand unit connected to said memory means for storing in said first array an expanded image corresponding to an image stored in said second array of said memory means, each pixel of said expanded image corresponding to a pixel of said image in said second array, each pixel of said expanded image represented by a first digital code if said corresponding pixel of said image in said second array is represented by a "1" and represented by a second digital code if said corresponding pixel of said image in said second array is represented by a "0", said color expand unit operating on plural pixels in parallel; and
- an array operation means connected to said color expand means and said memory means for storing, in a selected subset of said memory means, a combined image, each pixel of said combined image being a digital code which, for each pixel in said selected subset of said memory means, is a combination of digital code of a pixel in said expanded image and the contents of said pixel in said selected subset of said memory means.
- 16. A color image processing apparatus as claimed in claim 15, further comprising:
- a visual display means connected to of said memory means for generating a visually perceivable representation of the image stored by said second array of pixels, each pixle having a color corresponding to its digital code.
- 17. A color image processing apparatus as claimed in claim 15, further comprising:
- a first color register connected to said color expand means for storing therein said first digital code; and
- a second color register connected to said color expand means for storing therein said second digital code.
- 18. A color image processing apparatus as claimed in claim 15, further comprising:
- a source indicating means for indicating the locations within said memory means where said image in said first array is stored; and
- a destination indicating means for indicating the locations within said selected subset of said memory means into which said combined image is to be stored.
- 19. A color image processing apparatus as claimed in claim 15, wherein:
- said array operation means comprises a central processing unit for performing a logical combination of the individual bits of said digital code of a pixel of said expanded image and the contents of a pixel in said selected subset of said memory means.
- 20. A color image processing apparatus as claimed in claim 19, wherein:
- said logical combination of bits is an AND function.
- 21. A color image processing apparatus as claimed in claim 19, wherein:
- said logical combination of bits is an OR function.
- 22. A color image processing apparatus as claimed in claim 15, wherein:
- said array operation means comprises a central processing unit for performing an arithmetic combination of the numbers represented by said digital code of a pixel of said expanded image and the contents of a pixel in said selected subset of said display memory.
- 23. A color image processing apparatus as claimed in claim 22, wherein:
- said arithmetic combination of represented numbers is an addition.
- 24. A coloer image processing apparatus as claimed in claim 22, wherein:
- said arithmetic combination of represented numbers is an subtraction.
- 25. A data processing apparatus, comprising:
- a memory interface for communication of address and data information to an external image memory;
- a color processing unit, connected to said memory interface, for receiving from said memory interface an input data word representing a plurality of pixels of an image stored in said image memory, each of said pixels represented by a bit of said input data word, and for presenting to said memory interface, for writing into said external image memory, an input data word representing each of said pixels represented by said input data word, said output data word representing each pixel, with a first digital code responsive to its corresponding input data word bit being a "0" state, and with a second digital code responsive to its corresponding input data word bit being a "1" state, said color processing unit operating on plural pixels in parallel.
- 26. The data processing apparatus of claim 25, wherein said color processing unit comprises:
- a first color register for storing said first digital code;
- a second color register for storing said second digital code;
- input means, connected to said memory interface, for receiving said input data word; and
- a selector for communicating either the contents of said first color register or said second color register to said memory interface, responsive to the value of the bits in said input data word, said selected contents comprising said output data word.
- 27. The data processing apparatus of claim 26, wherein said color processing unit further comprises:
- a pixel size register, for storing a value corresponding to the number of bits in the first and second digital codes; and
- input data word expand means, connected to said input means, for communicating to said selector an expanded input data word, said expanded input data word having, for each bit of said input data word, a plurality of bits having the same data state as said bit of said data word, said plurality of bits for each bit numbering the same as the number of bits in the first and second digital codes.
- 28. The data processing apparatus of claim 27, wherein said selector comprises:
- a multiplexer for each bit of said output data word, said multiplexer receiving the contents of a bit of said first color register, the corresponding bit of said second color register, and the corresponding bit of said expanded input data word, said multiplexer presenting at its ouput the contents of said bit of said first color register responsive to said corresponding bit of said expanded input data word being at a "0" state, and presenting at its output the contents of said bit of said second color register responsive to said corresponding bit of said expanded input data word being at a "1" state.
- 29. A method of expanding monochrome image data stored in a first memory portion into color image data stored in a second memory portion including the steps of: reading an input data word of plural bits, with each bit having one of a first and second state, from said first memory portion wherein each said input bit represents a predetermined pixel of said monochrome image data; selecting a first multi-bit digital code if each said input bit is in said first state and selecting a second multi-bit digital code if each said input bit is in said second state, said selecting first and second multi-bit digital codes including operating on plural pixels in parallel; and writing said selected multi-bit digital codes to said second memory portion wherein said written multi-bit digital codes represent pixels of said color image data.
- 30. A method of expanding monochrome image data into color image data stored in a memory including the steps of: receiving an input data word having a plurality of bits wherein each said bit represents a pixel of said monochrome image data; expanding in parallel each said bit into a corresponding digital code representing color image data in response to the state of each said bit; and writing each said corresponding digital code to said memory.
- 31. A graphics computer system comprising:
- a. a host processing system including at least one processor, read only memory, random access memory and assorted peripheral devices for forming a complete computer system, said host processing system furnishing host data determining the content of a visual image to be presented;
- b. graphics memory circuits including video random access memory, said video random access memory being capable of storing bit mapped display data signals representing said visual image and being capable of storing said host data, said graphics memory circuits also being capable of storing instruction signals used for processing said host data and said display data;
- c. video display circuits connected to said video random access memory, said video display circuits being capable of forming said visual image in response to receipt of said display data from said graphics memory circuits; and
- d. graphics processor circuits including:
- i. central processing unit circuits capable of performing general purpose data processing, including a number of arithmetic and logic operations normally included in a general purpose processing unit, by executing said instructions accessed from said graphics memory circuits, said central processing unit circuits processing at least said host data to produce said display data in response to executing said instructions; and
- ii. special graphics hardware circuits connected to said central processing unit circuits and operating in conjunction with and under control of said central processing unit circuits to process at least said host data in producing said display data, said special graphics hardware circuits including color expansion circuits operating on plural pixels in parallel to convert a monochrome word of plural pixels, with each pixel represented by one bit, to an expanded color word of plural pixels, with each pixel represented by plural bits, each one bit pixel in said monochrome word determining a plural bit color code in said expanded color word.
- 32. A graphics computer system comprising:
- a. graphics memory circuits including video random access memory, said video random access memory being capable of storing bit mapped display data signals representing said visual image and being capable of storing source data, said graphics memory circuits being capable of storing instruction signals used for processing said source data and said display data;
- b. video display circuits connected to said video random access memory, said video display circuits being capable of forming said visual image in response to receipt of said display data; and
- c. graphics processor circuits including:
- i. central processing unit circuits capable of performing general purpose data processing, including a number of arithmetic and logic operations normally included in a general purpose processing unit, by executing said instructions accessed from said graphics memory circuits, said central processing unit circuits processing at least said source data to produce said display data in response to executing said instructions; and
- ii. special graphics hardware circuits connected to said central processing unit circuits and operating in conjunction with and under control of said central processing unit circuits to process at least said host data in producing said display data, said special graphics hardware circuits including color expansion circuits processing plural pixels in parallel to convert a monochrome word of plural pixels, with each pixel represented by one bit, to an expanded color word of plural pixels, with each pixel represented by plural bits, each one bit pixel in said monochrome word determining a plural bit color code in said expanded color word.
- 33. A graphics system arrangement comprising:
- a. host processing system terminals adapted for connection to a host processing system that determines the content of a visual display to be presented to a user by supplying host data;
- b. graphics memory circuits including video random access memory, said video random access memory being capable of storing bit mapped display data signals representing said visual image and being capable of storing said host data, said graphics memory circuits being capable of storing instruction signals used for processing said host data and said display data;
- c. graphics processor circuits connected to said host processing system terminals and said graphics memory circuits, said graphics processor circuits operating to transfer host data received at said host terminals to said graphics memory circuits and to process said host data and display data in response to said instruction signals stored in said graphics memory circuits, said graphics processor circuits including special graphics hardware circuits operating in conjunction with and under control of said graphics processor circuits to process at least said host data in producing said display data, said special graphics hardware circuits including color expansion circuits operating on plural pixels in parallel to convert a monochrome word of plural pixels, with each pixel represented by one bit, to an expanded color word of plural pixels, with each pixel represented by plural bits, each one bit pixel in said monochrome word determining a plural bit color code in said expanded color word;
- d. video palette circuits coupled to said graphics memory circuits and operating to convert said bit mapped display data signals from said graphics memory circuits to video level output signals;
- e. video connector terminals adapted for connection to a video display that presents a visual image to a user in response to received video image signals; and
- f. converter circuits connected to said video palette signals and said video connector terminals for converting said video level output signals to video image signals at said video connector terminals.
- 34. A display system comprising:
- a. a display generating a visual image for presentation to a user in response to receiving display data signals;
- b. memory circuits capable of storing host data and said display data and capable of storing instruction signals used for processing said host data and said display data, said memory circuits producing said display data signals from said display data;
- c. processor circuits including:
- i. central processing unit circuits capable of performing general purpose data processing, including a number of arithmetic and logic operations normally included in a general purpose processing unit, by executing said instructions accessed from said graphics memory circuits, said central processing unit circuits processing at least said host data to produce said display data in response to executing said instructions; and
- ii. special hardware circuits operating in conjunction with said central processing unit circuits to effect particular manipulations of said host data and said display data, said special hardware circuits including color expansion circuits operating on plural pixels in parallel to convert host data in the form of a monochrome word of plural pixels, with each pixel represented by one bit, to display data in the form of an expanded color word of plural pixels, with each pixel represented by plural bits, each one bit pixel in said monochrome word determining a plural bit color code in said expanded color word; and
- d. a host system determining the content of said visual image by causing said host data to be placed in said memory circuits.
- 35. A graphics processor comprising:
- a. host interface circuits adapted to control communication with a host processing system furnishing host data;
- b. memory interface circuits adapted to control communication of data and instructions with a memory capable of storing display data and said instructions and said host data;
- c. central processing unit circuits connected between said host interface circuits and said memory interface circuits, said central processing unit circuits being capable of performing general purpose data processing including a number of arithmetic and logic operations normally performed in a general purpose processing unit in response to executing said stored instructions, said central processing unit circuits processing at least said host data to produce said display data in response to executing said instructions; and
- d. special graphics hardware circuits connected to said central processing unit circuits and operating in conjunction with and under control of said central processing unit circuits to process at least said host data in producing said display data, said special graphics hardware circuits including color expansion circuits operating on plural pixels in parallel to convert a monochrome word of plural pixels, with each pixel represented by one bit, to an expanded color word of plural pixels, with each pixel represented by plural bits, each one bit pixel in said monochrome word determining a plural bit color code in said expanded color word.
- 36. A graphics display system comprising:
- processor circuits processing bit mapped display data to control the content of a user viewable display, said processor including a color expand unit processing plural pixels in parallel to convert a monochrome word of plural pixels, with each pixel represented by one bit, to an expanded color word of plural pixels, with each pixel represented by plural bits, each one bit pixel in said monochrome word determining a plural bit color code in said expanded color word; and
- memory circuits connected to said processor and storing said bit mapped display data, including said expanded color words, processed by said processor, said memory device including a multi-bit serial output adapted to be connected to said user viewable display.
- 37. The structures of claims 31, 32, 33, 34, 35 or 36 in which said color expansion circuits include plural one of N select circuits that receive said monochrome word of bits and produce an expanded monochrome word of bits.
- 38. The structure of claim 37 including a pixel size register containing a single bit in one of plural locations indicating the number of bits representing a pixel in said expanded color word, said register supplying said single bit in a desired one of plural locations to said one of N select circuits.
- 39. The structure of claim 37 in which there is one of said one of N select circuits for each bit in said expanded monochrome word of bits.
- 40. The structure of claim 37 in which each of said one of N select circuits furnishes only two stages of gating.
- 41. The structure of claim 39 in which each of said one of N select circuits receive only selected ones of said bits of said monochrome word.
- 42. The structure of claim 37 in which said color expansion circuits include bus selector circuits that receive said expanded monochrome word of bits and produce said expanded color word.
- 43. The structure of claim 42 in which there is one of said bus selector circuits for each bit of said expanded monochrome bits.
- 44. The structure of claim 42 including two color registers each containing a plural number of bits representing a desired color in said expanded color word, both of said color registers supplying their respective plural number of bits to said bus selector circuits.
- 45. The structure of claim 37 in which a monochrome bit of one sense represents a foreground symbol and a monochrome bit of another sense represents background.
- 46. The structures of claims 31, 32, 33, 34, 35 or 36 in which said color expansion circuits include an enable lead receiving an enable signal to enable said conversion to said expanded color word.
- 47. A method of processing data comprising:
- a. reading an input word having plural bits of binary information representing monochrome symbol data with each bit representing one pixel;
- b. determining a number of expanded bits with which to represent each pixel;
- c. expanding each bit of said monochrome input word to said number of expanded bits, with all of said expanded bits for each pixel being of the same binary sense;
- d. forming an expanded color word by replacing all the bits representing each pixel with at least one color code of bits depending on the binary sense of said bits of said expanded monochrome input word; and
- e. writing said expanded color word to a desired location.
- 48. A method of processing data comprising:
- a. reading an input word of plural pixels, each input word having plural bits of binary information representing monochrome symbol data with each bit representing one pixel;
- b. transforming said input word into an expanded monochrome word of plural pixels having plural bits representing each pixel, with each bit of said input word being transformed into plural bits, in said expanded monochrome word, of the same sense as said input word bit;
- c. converting the plural bits representing each pixel in said monochrome word into at least one color code depending upon the sense of said plural bits representing said pixel to form an expanded color word; and
- d. writing said expanded color word to a desired location.
- 49. The method of claim 48 in which said converting occurs by separately converting each bit of said expanded monochrome word into said expanded color word.
- 50. The method of claim 49 in which said transforming transforms each bit of said input word into a certain number of bits in the expanded monochrome word depending upon the number of bits representing a pixel, and said certain number changes for different numbers of pixels in each expanded monochrome word.
Parent Case Info
This application is a continuation of application Ser. No. 07/361,747 filed June 1, 1989, now abandoned, which was a continuation of application Ser. No. 07/178,798 filed Mar. 31, 1988, now abandoned, which was a continuation of application Ser. No. 06/795,383 filed Nov. 6, 1985, now abandoned.
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Continuations (3)
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Number |
Date |
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Parent |
361747 |
Jun 1989 |
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Parent |
178798 |
Mar 1988 |
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Parent |
795383 |
Nov 1985 |
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