BRIEF DESCRIPTION OF THE DRAWINGS
FIG. 1 is a schematic circuit diagram of a prior art flyback power supply;
FIG. 2 is a schematic circuit diagram of the present invention;
FIG. 3 is a schematic waveform diagram of each point of a circuit of a power supply at a normal load in accordance with the present invention; and
FIG. 4 is a schematic waveform diagram of each point of a circuit of a power supply at a light load in accordance with the present invention.
DETAILED DESCRIPTION OF THE PREFERRED EMBODIMENTS
Referring to FIG. 2 for a schematic circuit diagram of the present invention, a green-mode flyback pulse width modulation apparatus is fabricated by a bipolar transistor structure IC fabrication process and used in a power supply for controlling and switching a power switch Q2. The apparatus of the present invention comprises: an oscillator circuit 10, a latch circuit 12 and an amplifier circuit 16.
In FIG. 2, the oscillator circuit 10 is connected to an auxiliary power terminal VC of the power supply for receiving an auxiliary power voltage and outputting a periodic clock signal CLOCK, and the periodic clock signal CLOCK is sent to a control terminal of the power switch Q2 through the amplifier circuit 16 for periodically turning on the power switch Q2, and the amplifier circuit 16 is a third transistor Q1 with its base terminal connected to the oscillator circuit 10, its collector terminal connected to the auxiliary power terminal VC, and its emitter terminal connected to a control terminal of the power switch Q2, and the amplified circuit 16 is an emitter follower. In the meantime, the latch circuit 12 is connected to the oscillator circuit 10, the amplifier circuit 16, the power switch Q2 and a feedback terminal FB of the power supply for periodically pulling down the potential at a control terminal of power switch Q2 in response to a feedback signal VFB generated by the feedback terminal FB to turn off the power switch Q2. Therefore, the present invention can control the periodical conduction and cutoff of the power switch Q2, so that the power supply can stably output and supply the required electric power to the load, when the power supply is operated normally.
When the power supply is at a light load, the potential of the feedback signal VFB remains high for a while, so that the latch circuit 12 continues suspending the operation of the oscillator circuit 10 and will resume the output of the oscillator circuit 10 till the potential of the feedback signal VFB drops.
Referring to FIG. 2, the apparatus of the invention further comprises a short-circuit protection circuit 14 connected to an auxiliary power terminal VC and a current detection resistor R13 for obtaining a current detection signal VCS built on the current detection resistor R13. If the current detection signal VCS is greater than a predetermined protection threshold set by the short-circuit protection circuit 14, then the short-circuit protection circuit 14 will pull down the voltage of the auxiliary power, and thus no sufficient voltage will be supplied for the normal operation of the oscillator circuit 10, so as to achieve the protection for short circuit at a load of the power supply.
Referring to FIGS. 2 and 3 for a schematic circuit diagram and a schematic waveform diagram of each point in the circuit of a power supply at a normal load, the oscillator circuit 10 is made by connecting components such as transistors Q3, Q4, and its periodic clock signal CLOCK is produced as follows; a capacitor C6 in the oscillator circuit 10 is connected to an auxiliary power terminal VC of the power supply through a resistor R5 for receiving an auxiliary power voltage, and charging electricity. If the voltage of the capacitor C6 is charged to the threshold voltage level that is greater than the sum of the voltage at a base-emitter (B-E) junction of the transistor Q3 and divided voltage at the resistor R6, the transistor Q3 will be conducted with the transistor Q4. Now, an output terminal of a diode D4 will generate a clock signal CLOCK, and then the capacitor C6 will discharge electricity through an electric discharge path and then will charge electricity again as described previously. Therefore, the oscillator circuit 10 can use the capacitor C6 to charge and discharge electricity repeatedly to output the periodic clock signal CLOCK.
In FIG. 2, the latch circuit 12 comprises; a first transistor Q6 with its collector terminal connected to the output terminal of the oscillator circuit 10, its emitter terminal connected to a reference terminal G, and its base terminal connected to a feedback terminal FB of the power supply; a second transistor Q5 with its collector terminal connected to a base terminal of the first transistor Q6, its emitter terminal connected to a control terminal of the power switch Q2, and its base terminal connected to a collector terminal of the first transistor Q6. A filter capacitor C8 has an end connected to a feedback terminal FB of the power supply and another end connected to the reference terminal G. A bias resistor R9 is connected to a base terminal and an emitter terminal of the second transistor Q5, wherein the first transistor Q6 and the second transistor Q5 are equivalent to a silicon controlled rectifier (SCR) having the features of a silicon controlled rectifier (SCR).
In FIGS. 2 and 3, if the power supply is operated normally, the oscillator circuit 10 will outputs a periodic clock signal CLOCK to the power switch Q2 through the amplifier circuit 16 for controlling its electric conduction, and the current detection resistor R13 will receive a current passing through the power switch Q2 to generate a current detection signal VCS, and the latch circuit 12 will receive the current detection signal VCS and the feedback signal VFB of the power supply. If the sum of voltages of these two signals is greater than a predetermined voltage at the base-emitter (B-E) junction of the first transistor Q6 in the latch circuit 12, the first transistor Q6 and the second transistor Q5 will be conducted electrically to pull down of the potential at the control terminal of the power switch Q2 and turn off the power switch Q2. Therefore, the invention can use the oscillator circuit 10 to output a periodic clock signal CLOCK and operate with a latch circuit 12 to output a periodic PWM control signal to a gate of the power switch Q2, so as to control and switch the power switch Q2 and stabilize the output power of the power supply to supply stable electric power required by a load.
Referring to FIGS. 2 and 4 for a schematic circuit diagram and a schematic waveform diagram of a power supply at a light load, the feedback signal VFB of the power supply will be pulled high if the power supply is operated at a light load, and the sum of voltages of the feedback signal VFB and the current detection signal VCS will soon reach the voltage at the base-emitter (B-E) junction of the first transistor Q6 in the latch circuit 12, so that the first transistor Q6 and the second transistor Q5 will be conducted, and the potential at the control terminal of the power switch Q2 will be pulled low to turn off the power switch Q2. When the power supply is at a light load, the invention outputs a periodic PWM control signal with a duty cycle smaller than that being operated at a normal load, so that the power supply will output and supply a stable electric power to the load.
When the power supply is at a light load, a latch circuit 12 of the present invention obtains a feedback signal VFB from a feedback terminal FB of the power supply to maintain the high potential, and the feedback signal VFB of the latch circuit 12 remained at a high potential continues suspending the operation of the oscillator circuit 10, and will resume the output of the oscillator circuit 10 till the potential of the feedback signal VFB drops, so as to achieve the green-mode function.
In summation of the description above, the green-mode flyback pulse width modulation apparatus in accordance with the present invention is fabricated by a bipolar transistor structure IC fabrication process and used in a power supply for controlling the power switch to switch on and off. An oscillator circuit of the invention receives an auxiliary power voltage through an auxiliary power terminal in the power supply and outputs a periodic clock signal, and the periodic clock signal is sent to a control terminal of the power switch through an amplifier circuit for periodically turning on the power switch. In the meantime, a latch circuit is connected to the oscillator circuit, the amplifier circuit, the power switch and a feedback terminal of the power supply for periodically pulling down the potential at a control terminal of the power switch in response to a feedback signal generated by the feedback terminal to turn off the power switch.
When the power supply is at a light load, the potential of the feedback signal becomes high for a while, such that the latch circuit continues suspending the operation of the oscillator circuit and will resume the output of the oscillator circuit till the potential of the feedback signal potential drops, so as to achieve the green-mode function.
Although the present invention has been described with reference to the preferred embodiments thereof, it will be understood that the invention is not limited to the details thereof. Various substitutions and modifications have been suggested in the foregoing description, and others will occur to those of ordinary skill in the art. Therefore, all such substitutions and modifications are intended to be embraced within the scope of the invention as defined in the appended claims.
Patent Application
20080037296
