1. Technical Field
The present disclosure relates to a ground test circuit, and particularly to a ground test circuit for a power supply unit.
2. Description of Related Art
A power test for a computer motherboard is very complex, so a testing equipment which works automatically is conventionally used to perform this power test. The automatic testing equipment includes a direct current (DC) power source, a DC load, an oscilloscope, a power supply unit (PSU), a digital meter and other functions, and these devices can be connected through a general purpose input/output (GPIO) control port and grounded through the PSU. However, a waveform of the test result will be incorrect if these devices are not properly grounded through the PSU before testing. In addition, electrostatic discharge may occur due to a ground fault.
Therefore, there is need for improvement in the art.
Many aspects of the present disclosure can be better understood with reference to the following drawing(s). The components in the drawing(s) are not necessarily drawn to scale, the emphasis instead being placed upon clearly illustrating the principles of the present disclosure. Moreover, in the drawing(s), like reference numerals designate corresponding parts throughout the several views.
As shown in
The sampling circuit 11 is connected to a first ground terminal 41 and a second ground terminal 42 to detect a voltage difference between the first ground terminal 41 and the second ground terminal 42. The first ground terminal 41 is grounded through an actual ground, and the second ground terminal 42 is grounded through a virtual ground. A negative output terminal of the PSU 3 is connected to the sampling circuit 11 and grounded as a system ground terminal of the PSU 3 through the virtual ground. Therefore, the voltage different between the first ground terminal 41 and the second ground terminal 42 is equal to a voltage different between the first ground terminal 41 and the negative output terminal of the PSU 3. The sampling circuit 11 is connected to the converting circuit 121. The converting circuit 121 converts the voltage difference between the first and second ground terminals 41 and 42 to a difference value and transmits the difference value to the processing circuit 122. The processing circuit 122 compares the difference value to a predetermined value. In the embodiment, the converting circuit 121 is an analog to digital converter, and the difference value is a digital value. In the embodiment, the processing circuit 122 determines whether the difference value is smaller or larger than the predetermined value. In other embodiments, the ground test circuit 1 can be a voltage difference test circuit, and the sampling circuit 11 of the voltage difference test circuit is connected to a first voltage terminal and a second voltage terminal to detect any voltage difference between the first voltage terminal and the second voltage terminal.
The switch circuit 13 is connected to the processing circuit 122. When the difference value is smaller than the predetermined value, the processing circuit 122 determines that the negative output terminal of the PSU 3 is properly grounded. For example, assume the negative output terminal of the PSU 3 has been grounded through an actual ground. At this time, the processing circuit 122 controls the switch circuit 13 to allow the external power source 2 to be connected to the PSU 3. When the difference value is at least equal to the predetermined value, the processing circuit 122 determines that the negative output terminal of the PSU 3 is not properly grounded and controls the switch circuit 13 to disconnect the PSU 3 from the external power source 2. In other words, the switch circuit 13 can connect the PSU 3 to the external power source 2 according to the result of the comparison between the difference value and the predetermined value.
As shown in
As shown in
Each of the first to eighth bus pins B0-B7 is connected to a first power source through one of the ninth to sixteenth resistors R9-R16. For example, the first bus pin B0 is connected through the ninth resistor R9, and the second bus pin B1 is connected through the tenth resistor R10. The reset pin RST is connected to the first power source through the sixth resistor R6. In addition, the reset pin RST is also connected to the first power source through the third and fourth capacitors C3 and C4. A node between the third and fourth capacitors is connected to the second ground terminal 42. The first power pin VCC is connected to the first power source, and the first ground pin GND is grounded through a third ground terminal 43. In the embodiment, the third ground terminal 43 is a signal ground terminal and can function as the system ground terminal through the virtual ground. The first clock pin XTAL1 is connected to a first terminal of the oscillating unit X1 and connected to the third ground terminal 43 through the fifth capacitor C5, and the second clock pin XTAL2 is connected to a second terminal of the oscillating unit X1 and connected to the third ground terminal 43 through the sixth capacitor C6. The input pin PA0 is connected to the sampling circuit 11, and the output pin PD7 is connected to the switch circuit 13.
The reference voltage pin AREF is connected to the first power source through the seventh resistor R7 and connected to first and second terminals of the regulator unit D2. In addition, the reference voltage pin AREF is connected to the third ground terminal 43 through the seventh capacitor C7 and through the eighth capacitor C8. A reference power source is connected to the reference voltage pin AREF. A third terminal of the regulator unit D2 is connected to the third ground terminal 43. The second ground pin GND1 is connected to the third ground terminal 43 through the eighth resistor R8. The second power pin AVCC is connected to the first power source through the inductor L1. In addition, the second power pin AVCC is connected to the third ground terminal 43 through the ninth capacitor C9 and through the tenth capacitor C10. In the embodiment, the other pins of the microcontroller U3 are unconnected. In the embodiment, the regulator unit D2 is a three-terminal adjustable regulator, wherein the first terminal of the regulator unit D2 is a cathode, the second terminal of the regulator unit D2 is a reference, and the third terminal of the regulator unit D2 is an anode.
The microcontroller U3 converts the voltage difference received by the input pin PA0 to the difference value and compares the difference value to a predetermined value stored in the microcontroller U3. When the difference value is smaller than the predetermined value, the output pins PD7 transmits a high level signal. When the difference value is at least equal to the predetermined value, the output pins PD7 transmits a low level signal.
As shown in
The base of the first switch element Q1 is connected to the processing circuit 122 through the seventeenth resistor R17. In the embodiment, the base of the first switch element Q1 is connected to the output pin PD7 of the microcontroller U3 through the seventeenth resistor R17. The collector of the first switch element Q1 is connected to an anode of the second diode D3. The emitter of the first switch element Q1 is grounded through the second ground terminal 42. A cathode of the second diode D3 is connected to a second power source. In addition, the anode of the second diode D3 is connected to one of the two terminals of the coil, and the cathode of the second diode D3 is connected to the other terminal of the coil. The external power source 2 is connected to one of the two terminals of the switch, and the PSU 3 is connected to the other terminal of the switch. The PSU 3 is further connected to a motherboard 5 to be tested.
In the embodiment, the base of the first switch element Q1 receives either a high level signal or a low level signal from the output pin PD7 of the microcontroller U3. A voltage difference between a high level potential of the high level signal and a ground potential of the second ground terminal 42 is larger than a threshold voltage of the first switch element Q1, and a voltage difference between a low level potential of the low level signal and the ground potential of the second ground terminal 42 is smaller than the threshold voltage of the first switch element Q1. Thus, the first switch element Q1 is turned on when the high level signal is received. The first switch element Q1 is turned off when the low level signal is received.
An operating principle of the embodiment of the present disclosure is described as follows.
The terminal voltage between the first and second terminals of the sensing resistor RS is detected by the sampling circuit 11 and transmitted to the control circuit 12 through the first and second amplifier units U1 and U2. The microcontroller U3 converts the voltage difference, i.e. the terminal voltage, to the difference value, and compares the difference value to the predetermined value. When the difference value is smaller the predetermined value, the microcontroller U3 determines that the negative output terminal of the PSU 3 is properly grounded. For example, assume the negative output terminal of the PSU 3 is grounded through an actual ground. Then, the output pin PD7 of the microcontroller U3 transmits a high level signal to the switch circuit 13. The first switch element Q1 receives the high level signal and turns on so that the second diode D3 is turned off. Therefore, current will flow through the coil of the second switch element K1 and the switch of the second switch element K1 will be closed. Accordingly, the external power source 2 is able to supply power to the PSU 3. In the embodiment, the predetermined value corresponds to a predetermined voltage, and the predetermined voltage is 5V. Thus, the microcontroller U3 determines that the negative output terminal of the PSU 3 is properly grounded when the voltage difference is smaller than 5V.
When the difference value is at least equal to the predetermined value, the microcontroller U3 determines that the negative output terminal of the PSU 3 is not properly grounded. Then, the output pin PD7 of the microcontroller U3 transmits a low level signal to the switch circuit 13. The first switch element Q1 receives the low level signal and turns off the first switch element Q1. Therefore, no current flows through the coil of the second switch element K1 and the switch of the second switch element K1 will be open. Accordingly, the external power source 2 is not permitted to supply power to the PSU 3. In the embodiment, the microcontroller U3 determines that the negative output terminal of the PSU 3 is not properly grounded when the voltage difference is 5V or more.
The circuit of the above ground test circuit 1 uses a sensing resistor Rs to detect a terminal voltage between two terminals of the sensing resistor Rs for detecting a voltage difference between an actual ground and a system ground of the PSU 3. In addition, the ground test circuit 1 further converts the voltage difference to a digital value and compares the digital value to a predetermined value. If the digital value is smaller than the predetermined value, the PSU 3 is considered to be properly grounded. Moreover, the ground test circuit 1 uses a relay to control the connection between the external power source 2 and the PSU 3 according to the result of the comparison done by the processing circuit 122. The external power source 2 is able to supply power to the PSU 3 when the PSU 3 is considered to be properly grounded. Thus, a ground fault can be prevented and the waveform in the test result will be more reliable. In addition, the risk of electrostatic discharge to a user is also reduced by the ground test circuit 1.
While the disclosure has been described by way of example and in terms of various embodiments, it is to be understood that the disclosure is not limited thereto. On the contrary, it is intended to cover various modifications and similar arrangements as would be apparent to those skilled in the art. Therefore, the range of the appended claims should be accorded the broadest interpretation so as to encompass all such modifications and similar arrangements.
Number | Date | Country | Kind |
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201210184077.X | Jun 2012 | CN | national |