Embodiments of the present disclosure generally relate to handling thermal disparities in memory devices such as solid state drives (SSDs).
Flash memory SSDs have advantages over traditional hard disk drives (HDDs) in that SDDs have a higher throughput, lower read/write latency and lower power consumption. NAND flash memories in particular have a low price and a large capacity compared to other non-volatile memories (NVMs).
High performance and high capacity SSDs use multiple packages with multiple NAND dies in each package while maintaining a full parallelism on all the dues during high performance operations (e.g., programming thirty-two dies across eight channels on four packages simultaneously). The flash memory used in the SSD system will experience localized temperature disparity effect which lead to system behavior disparities. Subsequently, the data integrity of the non-volatile memory is impacted. Specifically, the data retention and bit error rate variation in different NAND dies is impacted.
There is a need in the art to handle the thermal disparity, especially for high capacity drives where there are a large number of NAND flash memory packages and dies used simultaneously.
The temperature of the various devices on a printed circuit board (PCB) can change over time as the PCB is used. Additionally, the various devices on the PCB can have different temperatures at the same time. For example, the closer a device is to a heat source, the greater the temperature. Similarly, the further away from the heat source, the lower the temperature. Thus, otherwise identical devices on a PCB can have different temperatures at the same time, and additionally, the temperatures can change over time. By periodically measuring the temperature of the devices, the thermal disparity for the devices can be efficiently and intelligently managed.
In one embodiment, a memory device comprises a printed circuit board; a plurality of non-volatile memory packages coupled to the printed circuit board, wherein each non-volatile memory package includes a plurality of non-volatile memory dies and wherein each non-volatile memory die includes a plurality of blocks; and a controller coupled to the printed circuit board. The controller is configured to process a plurality of read/write operations; monitor a temperature of each non-volatile memory package; set up flags for all non-volatile memory packages that have a temperature exceeding a predetermined threshold temperature; and obtain read conditions for each block of the plurality of blocks.
In another embodiment, a memory device comprises a printed circuit board; a plurality of non-volatile memory packages coupled to the printed circuit board, wherein each non-volatile memory package includes a plurality of non-volatile memory dies and wherein each non-volatile memory die includes a plurality of blocks; and a controller coupled to the printed circuit board. The controller is configured to process a plurality of read/write operations; monitor a temperature of each non-volatile memory package; and obtain cell threshold voltage distribution for each block.
In another embodiment, a memory device comprises a printed circuit board; a plurality of non-volatile memory packages coupled to the printed circuit board, wherein each non-volatile memory package includes a plurality of non-volatile memory dies and wherein each non-volatile memory die includes a plurality of blocks; means for obtaining temperature information for each non-volatile memory package; means for mapping out each non-volatile memory die location on the printed circuit board; means for forming jumbo blocks; and means for adjusting read conditions based upon the temperature information.
In another embodiment, a method comprises measuring a temperature of a first non-volatile memory package of a plurality of non-volatile memory packages on a memory device; determining the temperature of the first non-volatile memory package is greater than a predetermined temperature zone threshold; and setting a flag for the first non-volatile memory package to indicate that the temperature is greater than the predetermined temperature zone threshold.
In another embodiment, a method comprises obtaining temperatures of each non-volatile memory package of a plurality of non-volatile memory packages on a memory device; determining the obtained temperature does not match a temperature corresponding to a threshold voltage distribution; determining whether a program/erase cycle is higher or lower than the threshold and scan to obtain new read biases; and read data of at least one non-volatile memory package.
So that the manner in which the above recited features of the present disclosure can be understood in detail, a more particular description of the disclosure, briefly summarized above, may be had by reference to embodiments, some of which are illustrated in the appended drawings. It is to be noted, however, that the appended drawings illustrate only typical embodiments of this disclosure and are therefore not to be considered limiting of its scope, for the disclosure may admit to other equally effective embodiments.
To facilitate understanding, identical reference numerals have been used, where possible, to designate identical elements that are common to the figures. It is contemplated that elements disclosed in one embodiment may be beneficially utilized on other embodiments without specific recitation.
In the following, reference is made to embodiments of the disclosure. However, it should be understood that the disclosure is not limited to specific described embodiments. Instead, any combination of the following features and elements, whether related to different embodiments or not, is contemplated to implement and practice the disclosure. Furthermore, although embodiments of the disclosure may achieve advantages over other possible solutions and/or over the prior art, whether or not a particular advantage is achieved by a given embodiment is not limiting of the disclosure. Thus, the following aspects, features, embodiments and advantages are merely illustrative and are not considered elements or limitations of the appended claims except where explicitly recited in a claim(s). Likewise, reference to “the disclosure” shall not be construed as a generalization of any inventive subject matter disclosed herein and shall not be considered to be an element or limitation of the appended claims except where explicitly recited in a claim(s).
The temperature of the various devices on a printed circuit board (PCB) can change over time as the PCB is used. Additionally, the various devices on the PCB can have different temperatures at the same time. For example, the closer a device is to a heat source, the greater the temperature. Similarly, the further away from the heat source, the lower the temperature. Thus, otherwise identical devices on a PCB can have different temperatures at the same time, and additionally, the temperatures can change over time. By periodically measuring the temperature of the devices, the thermal disparity for the devices can be efficiently and intelligently managed.
The location of any given item on the PCB 100, such as a package 110, impacts the temperature of the item. Furthermore, the proximity to other items on the PCB 100 also impacts the temperature. For example, the interface portion 102 is a heat sink as is the coupling location 104. The ASIC 106 generates heat as does the power IC 108. Hence, not only with the usage of the package 110 impact the temperature of the package 110 and dies 114A-114D, but the temperatures of the surrounding devices will also impact the temperature of the package 110 and dies 114A-114D.
Similar to the temperature distribution shown in
Because the individual dies 302A-302P have different temperatures at any given time past time 0, the read and write conditions for each die may be different. Thus, each individual die 302A-302P have a temperature sensor 304 that reports temperature data back to the controller 118 for the package 110A-110D. The temperature of each individual die is monitored periodically, for example every second, to determine the temperature at any given point in time for any given die. Based upon the temperature feedback measurements, the temperature for each die is tracked and stored in an SSD management table, and the system maps out the physical die's location and the channel to which the die belongs. Thus, every time a JB is formed, the information, such as which die and channel, about the individual physical blocks becomes available as well. Therefore, the system knows which channel or die tends to become hot more quickly than other channels or dies. The system becomes aware of which physical blocks of a given JB tends to become hotter as compared to others. The system sets up predefined temperature zones for each package (or each channel) because the predefined temperature zones will follow different temperature profiles.
Table I exemplifies the read parameters determined following a JB programming events. For JB ID #1, all packages are cold at programming and thus have a “0” value. Therefore, when reading JB ID #1, the read can occur with the voltage threshold distribution read values. However, for JB ID #2, Package 3 has a flag set because Package 3 is hot at programming. Therefore, when reading JB ID #2, the read parameters for Package 3 need to be adjusted while the read parameters for Packages 0-2 are the voltage threshold distribution read values. For JB ID #3, both Package 2 and Package 3 are hot at programming as exemplified by the “1” value. Thus, when reading JB ID #3, Packages 0 and 1 are read using the voltage threshold distribution read values while Packages 2 and 3 are read based upon adjusted read parameters. For JB ID #4, Packages 1-3 are all hot at programming while Package 0 is cold. Therefore, Package 0 can be read using the voltage threshold distribution read values while Packages 1-3 are read based upon adjusted read parameters. Finally, for JB ID #5, all packages are hot at programming. Thus, for JB ID #5, all read parameter values are adjusted for reading. For the example shown in Table I, the threshold read parameters for the JBs encompass multiple physical blocks from multiple NAND packages. The adjusted read parameters include an offset. Basically, if the voltage threshold distribution value is expected to be “x” when cold, the read value will need to be “x+Δx”. If the read value is not adjusted, then a read error may occur. The reason to perform the operation shown in
Rather than utilizing a single read voltage value, each non-volatile memory package and/or die can have unique read parameters. The unique read parameters are due to the temperature impact upon the packages and/or dies. Each package and/or die can have a different read voltage value due to the different temperatures of the packages and/or dies. By compensating for temperature disparities, more accurate reads can occur.
According to one embodiment, a memory device comprises a printed circuit board; a plurality of non-volatile memory packages coupled to the printed circuit board; and a controller coupled to the printed circuit board. The controller is configured to: process a plurality of program operations; monitor a temperature of each non-volatile memory package that has been programmed; and set up flags for all non-volatile memory packages that have a temperature exceeding a predetermined threshold temperature. The non-volatile memory packages are NAND packages. The plurality of non-volatile memory packages are disposed on the printed circuit board such that each non-volatile memory package has a different equilibrium temperature. An ASIC and an interface coupling mechanism are also present on the printed circuit board. The ASIC has an equilibrium temperature that is higher than the equilibrium temperature of each non-volatile memory package. The equilibrium temperature of a first non-volatile memory package that is disposed adjacent the interface coupling mechanism is higher than the equilibrium temperature of a second non-volatile memory package that is disposed further away from the interface coupling mechanism. Each non-volatile memory package includes a plurality of non-volatile memory dies and wherein each non-volatile memory die includes a plurality of blocks.
In another embodiment, a memory device comprises a printed circuit board; a plurality of non-volatile memory packages coupled to the printed circuit board; and a first controller coupled to the printed circuit board. The controller is configured to: process a plurality of read operations; monitor a temperature of each non-volatile memory package; and adjust a read voltage for a non-volatile memory package based upon a measured temperature of the non-volatile memory package. Each non-volatile memory package includes a plurality of non-volatile memory dies and wherein each non-volatile memory die includes a plurality of blocks. Each non-volatile memory package further includes a second controller. The second controller is configured to monitor a temperature of the non-volatile memory package. The first controller is configured to determine whether a measured temperature of a given non-volatile memory package exceeds a threshold temperature. Adjusting the read voltage includes increasing the read voltage. An increase in read voltage is different for each non-volatile memory package. In one embodiment, adjusting the read voltage comprises shifting the read voltage in a positive or negative direction to either increase or decrease the read voltage from the original read voltage. Additionally, the read voltage shift can be different for each non-volatile memory package.
According to another embodiment, a memory device comprises a printed circuit board; a plurality of non-volatile memory packages coupled to the printed circuit board; means for obtaining temperature information for each non-volatile memory package; means for mapping out each non-volatile memory die location on the printed circuit board; means for forming jumbo blocks; and means for adjusting read conditions based upon the temperature information. The device further comprises means for determining whether a measured temperature is different from a predetermined temperature. Each non-volatile memory package includes a plurality of non-volatile memory dies and wherein each non-volatile memory die includes a plurality of blocks.
In another embodiment, a method comprises measuring a temperature of a first non-volatile memory package of a plurality of non-volatile memory packages on a memory device; determining the temperature of the first non-volatile memory package is greater than a predetermined temperature; and setting a flag for the first non-volatile memory package to indicate that the temperature is greater than the predetermined temperature. The method additionally comprises measuring a temperature of a second non-volatile memory package of the plurality of non-volatile memory packages and determining the temperature of the second non-volatile memory package is less than a predetermined temperature. For the method, the flag is saved in RAM or a NAND control block. Additionally, the method comprises storing read bias levels in the RAM or NAND control block.
In another embodiment, a method comprises obtaining current temperatures of each non-volatile memory package of a plurality of non-volatile memory packages on a memory device; determining the current temperature does not match a temperature corresponding to a threshold voltage distribution; determining whether a program/erase cycle is higher or lower than the threshold voltage distribution and scan to obtain new read biases; and read data of at least one non-volatile memory package. Determining whether a program/erase cycle is higher or lower comprises: determining that the program/erase cycle is higher; and scanning to obtain new read biases. Determining whether a program/erase cycle is higher or lower alternately comprises: determining that the program/erase cycle is lower. The method additionally comprises determining the current temperature is higher than a corresponding threshold voltage distribution, determining the current temperature is lower than a corresponding threshold voltage distribution; and enabling a strong effort read. For the method, the temperature corresponding to the threshold voltage is a flag that is stored in RAM or a NAND control block. Additionally, read bias levels are stored in the RAM or NAND control block.
While the foregoing is directed to embodiments of the present disclosure, other and further embodiments of the disclosure may be devised without departing from the basic scope thereof, and the scope thereof is determined by the claims that follow.