This application claims the benefit of foreign priority to Chinese Patent Application No. 202311071324.X, filed on Aug. 23, 2023, the disclosure of which is hereby incorporated herein by reference.
The present invention relates to the field of power management and control, specifically to a harmonic suppression method and apparatus for a three-phase three-wire cascaded power conversion apparatus.
A cascaded H-bridge power conversion apparatus using a modular cascaded topology is used for converting power of a medium-voltage grid into direct current power on a low-voltage direct current side. The cascaded H-bridge power conversion apparatus not only has the characteristics of high power density and small size, but also has outstanding advantages such as multiple levels, good harmonic characteristics, and fast adjustment speed, making it very suitable for application in ultra-large-scale power supply.
The cascaded H-bridge power conversion apparatus in existing technologies has voltage harmonics of more than two orders on the floating direct current side, which must be eliminated before entering an alternating current input grid. Therefore, the floating direct current side is usually equipped with a capacitor (not shown in
In view of the above problems in the existing technologies, a first aspect of the present invention provides a method for controlling a three-phase three-wire cascaded H-bridge power conversion apparatus, the cascaded H-bridge power conversion apparatus having a plurality of stages with the same structure, each stage including a full-bridge rectifier module, a floating direct current side, a dual active bridge converter, and a low-voltage direct current side connected in sequence, where a capacitor is connected in parallel to the floating direct current side, the full-bridge rectifier module rectifies an alternating current input voltage with a fundamental frequency into a direct current voltage and outputs the direct current voltage to the floating direct current side, and the dual active bridge converter receives and converts the direct current voltage and outputs the converted voltage to the low-voltage direct current side.
The method includes:
Preferably, in the method for controlling the three-phase three-wire cascaded H-bridge power conversion apparatus, when the first injection voltage is not injected, the voltage of the full-bridge rectifier module is represented as:
The first injection voltage is represented as:
when the first injection voltage is injected, the voltage of the full-bridge rectifier module is represented as:
where Uf is a conversion coefficient of the full-bridge rectifier module, Udc is a voltage on the floating direct current side, ω is an alternating current input frequency, and where the amplitude of the first injection voltage is configured to satisfy the following first reference wave amplitude constraint to avoid waveform distortion of the full-bridge rectifier module when injecting the first injection voltage:
Preferably, in the method for controlling the three-phase three-wire cascaded H-bridge power conversion apparatus, the single-phase alternating current input current is Im sin(ωt), and the total current on the floating direct current side when the first injection voltage is injected is represented as:
wherein A=−(Uf−U3rd), B=−U3rd, and the amplitude of the first injection voltage is configured to minimize √{square root over (A2+B2)} while satisfying the first reference wave amplitude constraint.
Preferably, in the method for controlling the three-phase three-wire cascaded H-bridge power conversion apparatus, the first injection voltage is configured to satisfy:
Preferably, each phase of the three-phase three-wire cascaded H-bridge power conversion apparatus includes at least one bypass stage and one redundant stage. The method further includes: for each phase, generating, in addition to the first injection voltage, a second injection voltage with a quintuple frequency of the fundamental frequency and a third injection voltage with the same frequency but opposite phase as the second injection voltage; controlling the full-bridge rectifier module to superimpose the second injection voltage, the alternating current input voltage, and the first injection voltage and output the superimposed voltage to the floating direct current side of the redundant stage, wherein the total current on the floating direct current side is composed of the first current, the second current, and a third current after the first and second injection voltages are injected, where the third current is composed of a third current quadruple frequency component and a third current sextuple frequency component, and wherein the amplitude and phase angle of the second injection voltage are configured so that the second current quadruple frequency component and the third current quadruple frequency component are at least partially canceled; and controlling the full-bridge rectifier module to inject the third injection voltage into the floating direct current side of the bypass stage.
Preferably, in the method for controlling the three-phase three-wire cascaded H-bridge power conversion apparatus, when the first injection voltage is not injected, the voltage of the full-bridge rectifier module is represented as:
The first injection voltage is represented as:
wherein Uf is the conversion coefficient of the full-bridge rectifier module, Udc is the voltage on the floating direct current side, ω is the alternating current input frequency, and where the amplitudes of the first and second injection voltages are configured to satisfy the following second reference wave amplitude constraint to reduce waveform distortion of the full-bridge rectifier module when injecting the first and second injection voltages:
Preferably, in the method for controlling the three-phase three-wire cascaded H-bridge power conversion apparatus, the single-phase alternating current input current is represented as Im sin(ωt), and the total current on the floating direct current side when the first injection voltage is injected is represented as:
wherein A=−(Uf−U3rd), B=−(U3rd−U5th), C=−U5th, and the first and second injection voltages are configured to minimize √{square root over (A2+B2+C2)} while satisfying the second reference wave amplitude constraint.
Preferably, in the method for controlling the three-phase three-wire cascaded H-bridge power conversion apparatus, at least one of three phases of the cascaded H-bridge power conversion apparatus includes a redundant stage. And the method further includes: after replacing other stages except for the redundant stage, controlling the redundant stage to inject injection voltages with triple and quintuple frequencies of alternating current input, and controlling the other stages to inject the injection voltage with the triple frequency of the alternating current input.
Preferably, in the method for controlling the three-phase three-wire cascaded H-bridge power conversion apparatus, at least 90% of the first current double frequency component is transferred to the low-voltage direct current side by the dual active bridge converter; or all of the first current double frequency component is transferred to the low-voltage direct current side by the dual active bridge converter, so that only the direct current component is retained on the floating direct current side.
Preferably, in the method for controlling the three-phase three-wire cascaded H-bridge power conversion apparatus, the amplitude and phase angle of the first injection voltage are configured so that all the first and second double frequency current components are canceled.
Another aspect of the present invention provides a three-phase three-wire cascaded H-bridge power conversion apparatus configured to implement the control method described in the first aspect of the present invention.
Preferably, each phase of the three-phase three-wire cascaded H-bridge power conversion apparatus includes at least one bypass stage and one redundant stage. The method further includes: for each phase, generating, in addition to the first injection voltage, a second injection voltage with a quintuple frequency of the fundamental frequency and a third injection voltage with the same frequency but opposite phase; controlling the full-bridge rectifier module to superimpose the second injection voltage, the alternating current input voltage, and the first injection voltage and output the three to the floating direct current side of the redundant stage, where the total current on the floating direct current side is composed of the first current, the second current, and a third current after the first and second injection voltages are injected, where the third current is composed of a third current quadruple frequency component and a third current sextuple frequency component, and where an amplitude and a phase angle of the second injection voltage are configured so that the second current quadruple frequency component and the third current quadruple frequency component are at least partially canceled; and controlling the full-bridge rectifier module to inject the third injection voltage into the floating direct current side of the bypass stage. The redundant stage and the bypass stage are configured as follows: when the total working time of the redundant stage after leaving the factory is greater than that of other stages in the phase, the first injection voltage is injected into the full-bridge rectifier modules of the other stages except for the redundant stage, and the first and second injection voltages are injected into the full-bridge rectifier module of the redundant stage, and the third injection voltage is injected into the full-bridge rectifier module of the bypass stage, where the bypass stage does not participate in the direct current-direct current conversion from the floating direct current side to the low-voltage direct current side.
According to the present invention, the three-phase three-wire cascaded H-bridge power conversion apparatus and the control method therefor can efficiently transfer undesired ripple waves on the floating direct current side of each stage to the low-voltage direct current side for elimination, and can also ensure lower power loss of the direct current-direct current conversion unit. Therefore, the capacitance on the floating direct current side can be minimized, the power density of the three-phase three-wire cascaded H-bridge power conversion apparatus is significantly improved, with high power conversion efficiency.
The floating direct current side is usually equipped with a capacitor (not shown in
The following further illustrates the embodiments of the present invention with reference to the drawings.
In order to make the objectives, technical solutions, and advantages of the present invention clearer, the present invention will be further described in detail below in conjunction with the drawing through specific embodiments.
If grid input current Ig is
and
wherein, Idc is current output from the full-bridge rectifier module to the floating direct current side, Uf is a conversion coefficient of the full-bridge rectifier module, Udc is the voltage at two ends of the capacitor connected in parallel to the floating direct current side, and Im is an amplitude of the alternating current input current. It can be seen that the current Idc output to the floating direct current side includes a direct current component UfIm/2 and a double frequency alternating current component
Table 1 illustrates a set of typical values of the above parameters in an application.
As previously mentioned, in order to make the waveform, output to the low-voltage direct current side, of a dual active bridge (D-AB) converter connected to the floating direct current side closer to a direct current waveform, a relatively large capacitor is usually connected in parallel to the floating direct current side to absorb the double frequency alternating current component of Idc. However, such a layout makes the capacitance of the capacitor too large, making it difficult to reduce the volume of the cascaded H-bridge power conversion apparatus.
In the technical solution of the present application, the inventor proposes an expectation to avoid absorbing at least a portion of the double frequency alternating current component of current on the floating direct current side by the capacitor, but to transfer the double frequency alternating current component to the low-voltage direct current side for further elimination, based on the principle that double frequency waveforms can be superimposed and canceled on the low-voltage direct current side due to the phase difference 120° of double frequency waveform components of three phases in a three-phase power system, thereby reducing the pressure on the capacitor on the floating direct current side and reducing its capacitance. However, if only the double frequency alternating current components in the three phases are simply transferred to the low-voltage direct current side without waveform adjustment matching, waveform changes transferred in the dual active bridge may cause changes in losses in various switching transistors, transformers, and inductors. To find an optimal solution after combining capacitance reduction and loss control, the inventor further analyzed the loss amount of the cascaded H-bridge power conversion apparatus in various states.
The square wave shown in
After obtaining the measured energy transfer loss value of the dual active bridge module in the single stage as shown in Table 2 and Table 3, the inventor further tests the situation that the double frequency alternating current component in the current Idc on the floating direct current side is superimposed on the original direct current component by appropriate pulse width modulation and the both are transferred to the low-voltage direct current side together by the dual active bridge module, to obtain an energy transfer loss value of each portion of the dual active bridge module in this scenario.
If at least a portion of the double frequency alternating current component is transferred to an output end of the dual active bridge module (namely, the low-voltage direct current side) via pulse width modulation, the current flowing through the dual active bridge module, such as the current Ip transferred in the DC-AC module on the primary side, will be in a saddle-shaped form as shown in
Table 5 shows total losses of the windings of the isolation transformer, caused by the waveforms of five multiple frequency components respectively, namely, the fundamental frequency (30 KHz), triple frequency (90 KHz), quintuple frequency (150 KHz), septuple frequency (210 KHz), and nonuple frequency (270 KHz), and cumulative losses of the five items. It can be seen that the total loss of the windings of the isolation transformer is about 210.08 watts.
Compared with the scenario of transferring direct current waveforms in the dual active bridge module shown in
In order to determine sources of the increased losses, the current IP in the dual active bridge module when 90% (namely, 0.9) of the double frequency waveform is transferred is further Fourier expanded. The current IP may be represented as a superposition of a square wave power waveform Squarwave and a double frequency waveform:
wherein the first portion is:
the second portion is:
IP may be represented as a sum of the first portion and the second portion, where the first portion is a Fourier expansion term of the square wave in the frequency domain, namely, a main band; the second portion is a side band added due to the transfer of the double frequency waveform, and the side band drifts left and right by 100 Hz respectively on each odd multiple frequency component of the square waveform in the frequency domain, namely, the drift is a double frequency (100 Hz) of an alternating current power frequency (50 Hz). Since the total loss can be equivalent to the sum of the loss caused by the first portion and the loss caused by the second portion, it can be inferred that the main source of the losses lies in the second portion representing the side band. The side band is generated from the double frequency waveform on the floating direct current side.
Based on the above analysis, the technical solution of the present application adopts an active control method to reduce or even eliminate the proportion of the above side band current waveform in the current IP of the dual active bridge. Therefore, when at least a portion of the double frequency on the floating direct current side is transferred to the low-voltage direct current side for elimination, the losses of power electronic devices and transformers can be further controlled to ideal states lower than the values shown in Table 4 and Table 5. Based on this idea, the present application intends to implement a high power density current conversion apparatus with high current quality, energy conservation, low consumption, and greatly reduced capacitance and volume of the capacitor on the floating direct current side.
In order to efficiently eliminate or reduce the double frequency component on the floating direct current side to reduce the specification requirements of the corresponding capacitor, the inventor proposes to, for the three-phase three-wire system, inject a zero sequence component (the zero sequence component refers to a component in a zero sequence symmetrical system after unbalanced power of a three-phase system is decomposed by a symmetrical component method) into the rectifier side of each phase of the cascaded H-bridge current conversion apparatus to cancel the side band on the floating direct current side or reduce its proportion. The most typical example is to inject a triple frequency voltage waveform (the frequency of which is three times the alternating current input power frequency) with a phase angle difference of 120°. As long as the third harmonic of each phase injected into the three-phase three-wire system is controlled at the phase angle difference of 120°, the total sum of third harmonics of three phases at a virtual neutral point is equivalent to 0, which achieves mutual cancellation of the third harmonics injected into the three-phase three-wire system. However, such third harmonic injection is difficult to apply to a three-phase four-wire system because the zero sequence component of the third harmonic (such as the third or ninth component) will generate a path. The following provides three specific embodiments to illustrate the injection method of a zero sequence component. However, the following embodiments are merely examples and not limitations to the present application.
In this embodiment, in the three-phase three-wire cascaded H-bridge power conversion apparatus shown in
In addition to satisfying the phase angle constraint between the three phases, injecting the voltage waveform into the cascaded H-bridge module of each phase will result in the following waveform superposition mechanism: it is agreed that the triple frequency voltage injected into the full-bridge rectifier module of one stage is the first injection voltage, represented as:
when the first injection voltage is injected, the voltage of the full-bridge rectifier module is represented as:
The grid input current is represented as:
The power of the current in the full-bridge rectifier module is:
The current on the floating direct current side is:
In the process of calculating Idc using Pin, the method of changing plus and/or minus into product for trigonometric functions (referred as Sum and Difference to Product Identities) can be used to obtain the above equation. In the equation, the current Idc is represented as a sum of a direct current component UfIm/2, a double frequency component
and a quadruple frequency component
Therefore, by adjusting the amplitude and phase angle of the first injection voltage, Uf and U3rd at least partially cancel each other, so that the total amount of the double frequency component
is also at least partially canceled. Although the quadruple frequency component is introduced in the above equation when the first injection voltage of the triple frequency is injected, the energy loss of each power electronic device in the dual active bridge conversion unit caused by the quadruple frequency component is significantly lower than the loss caused by the double frequency component. Therefore, the total energy consumption is theoretically greatly reduced.
However, after the above waveform control principle is theoretically determined, the potential risk of waveform expression distortion (over-modulation) in the full-bridge rectifier module should be further considered. For each stage, the voltage waveform in the full-bridge rectifier module after the expected injected first injection voltage is superposed with the single-phase alternating current input waveform is:
When positive or negative Udc is used as the amplitude of a triangular wave carrier and Uin is used as a reference waveform, the amplitude of the reference waveform should be limited to be not greater than the amplitude of the carrier waveform to ensure that the carrier can accurately approximate the true waveform of the reference wave. Otherwise, once the amplitude of the reference waveform is greater than the amplitude of the carrier waveform, the result of comparison between the two cannot effectively reflect the reference waveform any more, and unexpected fifth and/or seventh harmonics will be generated at the output end of the full-bridge rectifier due to over-modulation. Therefore, the injected first injection voltage needs to satisfy the following first reference wave amplitude constraint:
Under the constraint, analysis on the current waveform of the full-bridge rectifier module is further required:
if
In this case,
It can be seen that the coefficients A and B should minimize the amplitude of the total current waveform of the second harmonic and the fourth harmonic in the above equation as much as possible. That is, a minimum value of √{square root over (A2+B2)} is solved under the constraint A+B=−Uf. If the coefficients A and B corresponding to the minimum value further satisfy the aforementioned first reference wave amplitude constraint, such coefficients A and B are the best available values; if they do not satisfy, the coefficients A and B should be further calculated according to actual circuit configuration parameters to minimize the amplitude of the total current waveform of the second harmonic and the fourth harmonic in the above equation as much as possible and satisfy the first reference wave amplitude constraint, for example, using an exhaustive method in calculation simulation.
In this embodiment, the value Uf/2 of U3rd corresponding to the minimum value of √{square root over (A2+B2)} satisfies the first reference wave amplitude constraint, so the value of U3rd should be Uf/2. The first injection voltage is:
According to the above calculation result, the loss amount on the dual active bridge module after the triple frequency voltage is injected can be determined by simulation.
Table 6 and Table 7 show energy loss on the dual active bridge module when the triple frequency voltage is injected into the full-bridge rectifier and 90% of the double frequency voltage waveform is transferred by the dual active bridge module from the floating direct current side to the low-voltage direct current side. Using 30 KHz as a fundamental frequency, Table 6 shows respective conduction loss, switching loss, and total loss of the DC-AC module on the primary side and the AC-DC module on the secondary side of the dual active bridge module under the condition of 100% load, where the total loss on the primary side is 178.248 watts, the total loss on the secondary side is 182.083 watts, and the total loss added up on the switch transistors is 360.331 watts, which is significantly reduced from the loss of 437.296 watts when the triple frequency voltage is not injected.
Table 7 shows total losses of the windings of the isolation transformer, caused by the waveforms of five multiple frequency components respectively, namely, the fundamental frequency (30 KHz), triple frequency (90 KHz), quintuple frequency (150 KHz), septuple frequency (210 KHz), and nonuple frequency (270 KHz), and cumulative losses of the five items. It can be seen that the total loss of the windings of the isolation transformer is about 171.85 watts, which is also significantly less than the loss 210.08 watts of the windings of the isolation transformer when the triple frequency voltage is not injected.
In this embodiment, in the three-phase three-wire cascaded H-bridge power conversion apparatus shown in
In view of the technical problem, the inventor starts from another direction and analyzes the configuration characteristics of each stage of the three-phase three-wire cascaded H-bridge power conversion apparatus. The cascaded H-bridge power conversion apparatus usually retains at least one redundant stage in hot standby and one bypass stage for bypassing a failed stage. When a stage of H-bridge module in normal operation fails, the redundant stage will replace the failed stage and be used, while the failed stage of H-bridge module will be bypassed by the bypass stage. In such a cascaded H-bridge power conversion apparatus, if the redundant stage is in a hot standby state, the redundant stage can be used to generate the desired second injection voltage for canceling the quadruple frequency voltage. Because the quintuple frequency voltage is artificially injected into the rectifier side, a negative quintuple frequency voltage having an opposite phase but the same amplitude as the second injection voltage needs to be injected into one of the remaining cascaded stages. In order to prevent the negative quintuple frequency voltage from being transferred to the low-voltage direct current side by the dual active bridge module to hinder the effective reduction of the quadruple frequency waveform in each dual active bridge module of the phase by the first injection voltage, a third injection voltage having an opposite phase but a same amplitude as the second injection voltage can be generated by the bypass stage, as the bypass stage does not output any power to the low-voltage direct current side.
Specifically, it is agreed that the triple frequency voltage injected into the full-bridge rectifier module of one stage is the first injection voltage, represented as:
It is agreed to select one of all n stages of the phase and inject the second injection voltage into its full-bridge rectifier module, which has a quintuple frequency form of alternating current input frequency (fundamental frequency), represented as:
wherein, Uf is a conversion coefficient of the full-bridge rectifier module, Udc is a voltage on the floating direct current side, ω is an alternating current input frequency, and U5th is a coefficient to be determined; and a bypass stage that does not participate in power transfer from the floating direct current side to the low-voltage direct current side is selected from all the n stages of the phase, and a third injection waveform having the same amplitude as the second injection voltage but a phase angle difference of 180° is injected into the bypass stage.
When the first injection voltage and the second injection voltage are simultaneously injected into the full-bridge rectifier module of one stage,
the power of the current in the full-bridge rectifier module is:
then, the current on the floating direct current side is represented by the Sum and Difference to Product Identities as:
it can be rewritten as:
wherein, A=−(Uf−U3rd), B=−(U3rd−U5th), and C=−U5th, so A.+B+C=−Uf.
In order to avoid partial distortion of the corresponding reference waveform generated by pulse width modulation due to over-modulation, a second reference wave amplitude constraint should be satisfied:
The first and second injection voltages are configured to minimize √{square root over (A2+B2+C2)}, so as to reduce waveform distortion of the full-bridge rectifier module when the first and the second injection voltages are injected. Similar to Embodiment 1, if the coefficients A, B, and C corresponding to the minimum value further satisfy the aforementioned second reference wave amplitude constraint, such coefficients A, B, and C are the best available values; if they do not satisfy, the coefficients A, B, and C should be further calculated according to actual circuit configuration parameters to minimize the amplitude of the total current waveform of the second harmonic and the fourth harmonic in the above equation as much as possible and to satisfy the second reference wave amplitude constraint, for example, using an exhaustive method in calculation simulation.
For a three-phase three-wire cascaded H-bridge power conversion apparatus, the total number of stages is assumed to be n, where two are redundant stages, one is a bypass stage, and the number of normal working stages is n−3. Because the redundant stages and the bypass stage are used less frequently than the remaining normal working stages, the remaining normal working stages are usually replaced after durable years. However, after power electronic devices are replaced with new ones in the remaining relatively normal working stages, power electronic devices in the redundant stages and the bypass stage have relatively short service lives, and will be damaged earlier than the other power electronic devices after replacement at a high probability. In order to avoid such a buckets effect, in another technical solution of the present invention to transfer a second harmonic on the floating direct current side to the low-voltage direct current side, a feasible method includes injecting only a third harmonic to other stages after replacing the other stages except for the redundant stages to reduce the loss of the second harmonic in the dual active bridge module of that stage, injecting third and fifth harmonics into the redundant stages in which power electronic devices are relatively aged to reduce the losses of the second and fourth harmonics in the dual active bridge module of that stage, and introducing, only in the redundant stages, a sixth harmonic that significantly reduces the contribution to losses. Therefore, the temperature of the redundant stages is lower than that of the other stages, which can effectively keep the degrees of subsequent aging of the remaining stages with updated power electronic devices and the redundant stages with relatively aged power electronic devices closer, and avoid as much as possible the failure of the entire system due to early scrapping of the redundant stages that account for a small proportion in the total stages.
Although the present invention is described through preferred embodiments, the present invention is not limited to the embodiments described herein, but further includes various changes and variations made without departing from the scope of the present invention
Although this disclosure has been described in the context of certain embodiments and examples, it will be understood by those skilled in the art that the disclosure extends beyond the specifically disclosed embodiments to other alternative embodiments and/or uses and obvious modifications and equivalents thereof. In addition, while several variations of the embodiments of the disclosure have been shown and described in detail, other modifications, which are within the scope of this disclosure, will be readily apparent to those of skill in the art. It is also contemplated that various combinations or sub-combinations of the specific features and aspects of the embodiments may be made and still fall within the scope of the disclosure. For example, features described above in connection with one embodiment can be used with a different embodiment described herein and the combination still fall within the scope of the disclosure. It should be understood that various features and aspects of the disclosed embodiments can be combined with, or substituted for, one another in order to form varying modes of the embodiments of the disclosure. Thus, it is intended that the scope of the disclosure herein should not be limited by the particular embodiments described above. Accordingly, unless otherwise stated, or unless clearly incompatible, each embodiment of this invention may include, additional to its essential features described herein, one or more features as described herein from each other embodiment of the invention disclosed herein.
Features, materials, characteristics, or groups described in conjunction with a particular aspect, embodiment, or example are to be understood to be applicable to any other aspect, embodiment or example described in this section or elsewhere in this specification unless incompatible therewith. All of the features disclosed in this specification (including any accompanying claims, abstract and drawings), and/or all of the steps of any method or process so disclosed, may be combined in any combination, except combinations where at least some of such features and/or steps are mutually exclusive. The protection is not restricted to the details of any foregoing embodiments. The protection extends to any novel one, or any novel combination, of the features disclosed in this specification (including any accompanying claims, abstract and drawings), or to any novel one, or any novel combination, of the steps of any method or process so disclosed.
Furthermore, certain features that are described in this disclosure in the context of separate implementations can also be implemented in combination in a single implementation. Conversely, various features that are described in the context of a single implementation can also be implemented in multiple implementations separately or in any suitable subcombination. Moreover, although features may be described above as acting in certain combinations, one or more features from a claimed combination can, in some cases, be excised from the combination, and the combination may be claimed as a subcombination or variation of a subcombination.
Moreover, while operations may be depicted in the drawings or described in the specification in a particular order, such operations need not be performed in the particular order shown or in sequential order, or that all operations be performed, to achieve desirable results. Other operations that are not depicted or described can be incorporated in the example methods and processes. For example, one or more additional operations can be performed before, after, simultaneously, or between any of the described operations. Further, the operations may be rearranged or reordered in other implementations. Those skilled in the art will appreciate that in some embodiments, the actual steps taken in the processes illustrated and/or disclosed may differ from those shown in the figures. Depending on the embodiment, certain of the steps described above may be removed, others may be added. Furthermore, the features and attributes of the specific embodiments disclosed above may be combined in different ways to form additional embodiments, all of which fall within the scope of the present disclosure. Also, the separation of various system components in the implementations described above should not be understood as requiring such separation in all implementations, and it should be understood that the described components and systems can generally be integrated together in a single product or packaged into multiple products.
For purposes of this disclosure, certain aspects, advantages, and novel features are described herein. Not necessarily all such advantages may be achieved in accordance with any particular embodiment. Thus, for example, those skilled in the art will recognize that the disclosure may be embodied or carried out in a manner that achieves one advantage or a group of advantages as taught herein without necessarily achieving other advantages as may be taught or suggested herein.
Conditional language, such as “can,” “could,” “might,” or “may,” unless specifically stated otherwise, or otherwise understood within the context as used, is generally intended to convey that certain embodiments include, while other embodiments do not include, certain features, elements, and/or steps. Thus, such conditional language is not generally intended to imply that features, elements, and/or steps are in any way required for one or more embodiments or that one or more embodiments necessarily include logic for deciding, with or without user input or prompting, whether these features, elements, and/or steps are included or are to be performed in any particular embodiment.
Conjunctive language such as the phrase “at least one of X, Y, and Z,” unless specifically stated otherwise, is otherwise understood with the context as used in general to convey that an item, term, etc. may be either X, Y, or Z. Thus, such conjunctive language is not generally intended to imply that certain embodiments require the presence of at least one of X, at least one of Y, and at least one of Z.
Language of degree used herein, such as the terms “approximately,” “about,” “generally,” and “substantially” as used herein represent a value, amount, or characteristic close to the stated value, amount, or characteristic that still performs a desired function or achieves a desired result. For example, the terms “approximately”, “about”, “generally,” and “substantially” may refer to an amount that is within less than 10% of, within less than 5% of, within less than 1% of, within less than 0.1% of, and within less than 0.01% of the stated amount. As another example, in certain embodiments, the terms “generally parallel” and “substantially parallel” refer to a value, amount, or characteristic that departs from exactly parallel by less than or equal to 15 degrees, 10 degrees, 5 degrees, 3 degrees, 1 degree, 0.1 degree, or otherwise.
The scope of the present disclosure is not intended to be limited by the specific disclosures of preferred embodiments in this section or elsewhere in this specification, and may be defined by claims as presented in this section or elsewhere in this specification or as presented in the future. The language of the claims is to be interpreted broadly based on the language employed in the claims and not limited to the examples described in the present specification or during the prosecution of the application, which examples are to be construed as non-exclusive.
Number | Date | Country | Kind |
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202311071324.X | Aug 2023 | CN | national |