Patent Application
20180358530
The present invention relates to a heat absorbing element, a semiconductor device provided with the same, and a method for manufacturing a heat absorbing element.
A recent power semiconductor device of the known art includes a cooling element such as a Peltier element to enhance heat dissipation from the power semiconductor device to its outside.
A typical power semiconductor device includes a power semiconductor element having a heat generating portion and a Peltier element, which are made close to each other to be modularized (see, e.g., Patent Document 1). Another known power semiconductor element includes a heat generating portion in which (specifically, in a region between trench gate electrodes,) a buried metal for heat dissipation is arranged, and a Peltier element is provided on the buried metal for heat dissipation (see, e.g., Patent Document 2).
PATENT DOCUMENT 1: Japanese Unexamined Patent Publication No. 2008-235834
PATENT DOCUMENT 2: Japanese Unexamined Patent Publication No. 2007-227615
In the above conventional techniques, the power semiconductor element includes the heat generating portion and the Peltier element, which are made close to each other. However, the thermal resistance of the contact portion therebetween is large, and instantaneous cooling after heat generation of the power semiconductor element cannot be achieved. Thus, currently, a redundant, high-cost thermal design has to be employed to prepare for a calorific value obtained at the time of application of the maximum load to the power semiconductor element.
In addition, a method for manufacturing a thin-film Peltier element formed on a semiconductor element has not been established.
In view of the foregoing, it is an object of the present invention to provide a thin-film heat absorbing element formed on a semiconductor element wherein the thermal resistance between the semiconductor element and the heat absorbing element is reduced, and to establish a method for manufacturing the heat absorbing element.
To achieve the above object, the present invention provides a heat absorbing element of a thin-film Peltier type formed on a semiconductor element.
Specifically, the present invention is directed to a heat absorbing element, a semiconductor device having the same, and a method for manufacturing the heat absorbing element. The following solution is provided.
Specifically, the first aspect of the present invention is directed to a heat absorbing element of a thin-film Peltier type thermally connected with a surface of a semiconductor element through an electrical insulator. The heat absorbing element is comprised of a substance having a bulk thermal conductivity of 50 W/mK or more and a Seebeck coefficient of 300 μV/K or more.
This can provide reduction in thermal resistance between the semiconductor element and the heat absorbing element, and enhance the heat dissipation of the semiconductor element.
A second aspect of the present invention is an embodiment of the first aspect. In the second aspect, the substance is any one of silicon (Si), silicon carbide (SiC), gallium nitride (GaN), aluminum nitride (AlN), boron nitride (BN), or diamond (C).
This can reliably achieve the formation of a highly efficient heat absorbing element.
A third aspect of the present invention is an embodiment of the first aspect. In the third aspect, the substance is silicon.
This is preferable because of compatibility with a semiconductor manufacturing process.
A forth aspect of the present invention is an embodiment of any one of the first to third aspects. In the fourth aspect, the substance constitutes a p-type or n-type semiconductor layer, and the p-type semiconductor layer and the n-type semiconductor layer are arranged parallel to the semiconductor element and the electrical insulator.
This can reliably achieve manufacturing of the Peltier element, which is a heat absorbing element of a thin-film type. In addition, the contact area between the semiconductor element and the electrical insulator can be increased, and the thus the efficiency of heat adsorbing effect (heat dissipation effect) is improved.
A fifth aspect of the present invention is an embodiment of any one of the first to fourth aspects. In the fifth aspect, the heat absorbing element is directly formed on and thermally coupled with a heat exhaust side of the semiconductor element.
This allows the heat absorbing element to have an improved heat absorbing efficiency, and the semiconductor element to provide an excellent heat dissipation effect.
A sixth aspect of the present invention is an embodiment of any one of the first to fifth aspects. In the sixth aspect, the heat absorbing element covers 10% or more of an area of a heat source in the semiconductor element.
As long as 10% or more of the area of the heat source is covered in this manner, the semiconductor element can provide an improved heat dissipation effect.
The seventh aspect of the present invention is directed to a semiconductor device, comprising the heat absorbing element according to any one of the first to sixth aspects.
The semiconductor device of this invention includes the heat absorbing element of the present invention. Thus, the semiconductor element can perform improved heat dissipation.
An eight aspect of the present invention is an embodiment of the seventh aspect. In the eighth aspect, the semiconductor element is a power semiconductor element.
This allows a power semiconductor element having a high temperature during operation to perform improved heat dissipation.
A ninth aspect of the present invention is an embodiment of the seventh aspect. In the ninth aspect, the semiconductor element is a SiC power semiconductor element of which a material is silicon carbide.
Accordingly, a SiC power semiconductor element having a high withstand voltage and a low on-resistance and being able to perform high speed operation can perform improved heat dissipation.
A tenth aspect of the present invention is directed to a method for manufacturing a heat absorbing element of a thin-film Peltier type thermally connected with a surface of a semiconductor element through an electrical insulator. The method includes: forming a lower metal film, a first conductivity type semiconductor layer, and a first metal sacrificial film in order on the semiconductor element through the electrical insulator; forming a first metal mask film for patterning the first conductivity type semiconductor layer from the first metal sacrificial film, and using the first metal mask film formed, patterning the first conductivity type semiconductor layer so as to form a plurality of first conductivity type semiconductor blocks from the first conductivity type semiconductor layer; forming a second conductivity type semiconductor layer and a second metal sacrificial film in order on the lower metal film including the first conductivity type semiconductor block; forming a second metal mask film for patterning the second conductivity type semiconductor layer from the second metal sacrificial film, and using the second metal mask film formed, patterning the second conductivity type semiconductor layer so as to form a plurality of second conductivity type semiconductor blocks from the second conductivity type semiconductor layer; selectively etching, by a lithography method, an electrode formation region of the semiconductor element in the lower metal film so as to expose the semiconductor element; selectively etching, by a lithography method, a portion between the first conductivity type semiconductor block and the second conductivity type semiconductor block in the lower metal film so as to form a plurality of lower electrodes from the lower metal film; selectively forming an insulation film on a portion between the semiconductor blocks and on a portion between the lower electrodes, followed by forming an upper metal film on the semiconductor blocks and on an exposed portion of the semiconductor element; and selectively etching, by a lithography method, the upper metal film so as to form an upper electrode and an electrode of the semiconductor element from the upper metal film.
According to this method, the heat absorbing element can be formed through: etching of the lower metal film to serve as the lower electrode of the heat absorbing element, the first conductivity type semiconductor layer, and the second conductivity type semiconductor layer that are formed on or above the semiconductor element via the electrical insulator; and etching of the upper metal film to serve as the upper electrode of the heat absorbing element and the electrode of the semiconductor element.
An eleventh aspect of the present invention is an embodiment of the tenth aspect. In the eleventh aspect, the first conductivity type semiconductor layer and the second conductivity type semiconductor layer are each comprised of any one of silicon (Si), silicon carbide (SiC), gallium nitride (GaN), aluminum nitride (AlN), boron nitride (BN), or diamond (C).
This can reliably achieve the formation of a highly efficient heat absorbing element.
A twelfth aspect of the present invention is an embodiment of the tenth or eleventh aspect. In the twelfth aspect, the lower metal film, the first metal sacrificial film, the second metal sacrificial film, and the upper metal film are comprised of nickel, and at least one of the lower metal film, the first metal sacrificial film, the second metal sacrificial film, or the upper metal film is patterned by wet-etching with an etchant which is a mixture (hydrochloric acid hydrogen peroxide solution) of concentrated hydrochloric acid, concentrated hydrogen peroxide solution, and pure water.
This allows the nickel film to be etched without degradation of the resist.
A thirteenth aspect of the present invention is an embodiment of any one of the tenth to twelfth aspects. In the thirteenth aspect, the first metal sacrificial film and the second metal sacrificial film are comprised of nickel, the first conductivity type semiconductor layer and the second conductivity type semiconductor layer are comprised of silicon, and the forming the first conductivity type semiconductor blocks and the forming the second conductivity type semiconductor blocks are carried out by dry-etching with chlorine and hydrogen bromide.
This allows the first metal sacrificial film as a first metal mask film comprised of nickel and the second metal sacrificial film as a second metal mask film comprised of nickel to be used as hard masks in etching for forming the first conductivity type semiconductor block and the second conductivity type semiconductor block from the first conductivity type semiconductor layer and the second conductivity type semiconductor layer comprised of silicon.
A fourteenth aspect of the present invention is an embodiment of any one of the tenth to thirteenth aspects. In the fourteenth aspect, the semiconductor element is a power semiconductor element.
This allows a power semiconductor element having a high temperature during operation to perform improved heat dissipation.
A fifteenth aspect of the present invention is an embodiment of any one of the tenth to thirteenth aspects. In the fifteenth aspect, the semiconductor element is a SiC power semiconductor element of which a material is silicon carbide.
Accordingly, a SiC power semiconductor element having a high withstand voltage and a low on-resistance and being able to perform high speed operation can perform improved heat dissipation.
The present invention can provide a significant reduction in the thermal resistance between the semiconductor element and the heat absorbing element, and also achieve reliable manufacturing of the heat absorbing element of a thin-film type on the surface of semiconductor element.
Embodiments of the present invention will be described in detail below with reference to the drawings. The following embodiments are merely exemplary ones in nature, and are not intended to limit the scope, applications, or use of the invention.
As illustrated in
The semiconductor element body portion 10 is a schottky-barrier diode (hereinafter also abbreviated as a SBD). For a semiconductor of the diode, silicon carbide (SiC) can be used for example. Here, the semiconductor element body portion 10 includes, e.g., a bulk layer (a contact layer) 12 comprised of n+-type SiC; a drift layer 13 regulating withstand voltage and comprised of n-type SiC epitaxially grown on the bulk layer 12; a heat conducting layer 15 having insulation properties and comprised of i-type SiC epitaxially grown on the drift layer 13; an anode electrode 11 formed on a surface (a back surface) of the bulk layer 12, the surface being opposite to the drift layer 13; and a plurality of cathode electrodes 16 formed selectively on partial regions of a surface (a front surface) of the drift layer 13, the surface being opposite to the bulk layer 12, and the partial regions (electrode formation regions) being exposed from the heat conducting layer 15.
The material for the anode electrode 11 is not limited to nickel silicide, and may be a metal or metal silicide that can establish favorable Ohmic contact with n-type SiC. The material for the cathode electrode 16 is not limited to nickel, and may be a metal that can establish favorable Schottky contact with n-type SiC.
On the other hand, the heat absorbing element portion 20 is a thin-film Peltier element. The Peltier element includes p-type silicon layers 22 and n-type silicon layers 24. The p-type silicon layers 22 and the n-type silicon layers 24 are arranged alternately in a dotted (island) manner on the semiconductor element body portion 10. The Peltier element also includes lower electrodes 21 and upper electrodes 25. The lower electrodes 21 are arranged below the silicon layers 22, 24, and the upper electrodes 25 are arranged above the silicon layers 22, 24, so that a current passes though the silicon layers 22, 24 alternately. Here, the lower electrodes 21 and the upper electrodes 25 can be comprised of nickel (Ni) for example. Insulation films 23 are filled and formed between the p-type silicon layer 22 and the n-type silicon layer 24, between the lower electrodes 21, and between the upper electrodes 25. The insulation films 23 are comprised of, e.g., silicon oxide (SiO2).
The heat absorbing element portion 20 includes the lower electrodes 21 which are directly connected to, i.e., thermally coupled to the heat conducting layer 15 having insulation properties, comprised of i-type SiC, and exposed from a surface of the semiconductor element body portion 10. In a region above each cathode electrode 16, the heat absorbing element portion 20 is connected to an insulation film 17 filled in an ambient region of the cathode electrode 16 and comprised of, e.g., silicon oxide (SiO2). As such, the p-type silicon layers 22 and the n-type silicon layers 24 are arranged parallel to the heat conducting layer 15 and the insulation film 17 of the semiconductor element body portion 10.
The heat absorbing element portion 20 is comprised of a semiconductor of silicon (Si). Alternatively, the heat absorbing element portion 20 can be comprised of a semiconductor material having a bulk thermal conductivity of 50 W/mK or more and a Seebeck coefficient of 300 μV/K or more similarly to silicon (Si). Examples of such a semiconductor material include silicon carbide (SiC), gallium nitride (GaN), aluminum nitride (AlN), boron nitride (BN), and diamond (C). From these materials, a highly efficient Peltier element can be fabricated.
The lower electrode 21 and the upper electrode 25 are comprised of Nickel (Ni). Alternatively, the lower electrode 21 and the upper electrode 25 can be comprised of titanium (Ti), aluminum (Al), tin (Sn), molybdenum (Mo), copper (Cu), or gold (Au).
In this embodiment, the lower electrode 21 is a Ni film having a thickness of, e.g., 450 nm. The p-type silicon layer 22 and the n-type silicon layer 24 have a thickness of, e.g., 1.2 μm. The upper electrode 25 is a Ni film having a thickness of, e.g., 200 nm. As such, the body thickness of the heat absorbing element portion 20 of the semiconductor device 100 of this embodiment is 1.85 μm, i.e., within 2 μm.
As long as the heat absorbing element portion 20 covers 10% or more of the area of a heat source in the semiconductor element body portion 10, the advantage of the present invention can be reliably obtained. Here, the heat source of the semiconductor element body portion 10 mainly refers to the sum of regions in plan view of a region including opposing portions of the plurality of cathode electrodes 16 and the anode electrode 11 in the drift layer 13.
—Advantage—
As described above, according to this embodiment, the heat absorbing element portion 20 of the thin-film Peltier type is integrally formed on the semiconductor element body portion 10 configured as a SBD. Then, the heat absorbing element portion 20 includes the lower electrode 21 directly connected to the heat conducting layer 15 having insulation properties and being the epitaxial growth part of the semiconductor element body portion 10. This provides a significant reduction in the thermal resistance between the semiconductor element body portion 10 and the heat absorbing element portion 20.
(First Variation of First Embodiment)
A semiconductor device 100A of the first variation includes a semiconductor element body portion 10 different from that of the first embodiment, but, except for this point, includes the same configurations as those of the first embodiment. In the following descriptions, the same components as those of the first embodiment are denoted with the same reference characters.
As illustrated in
The segments of the heat conducting layer 15 each include a lower portion provided in the drift layer 13, the lower portion being a p+ region 14a to improve withstand voltage of the semiconductor element body portion 10.
Note that the heat absorbing element portion 20 includes the configurations equivalent to those of the first embodiment.
Thus, not only the thickness, etc. of the materials described in the first embodiment, but also the other applicable materials can be applied to this variation.
(Second Variation of First Embodiment)
A semiconductor device 100B of the second variation includes a semiconductor element body portion 10 different from that of the first variation, but, except for this point, includes the same configurations as those of the first variation. Thus, also in
As illustrated in
Also in this variation, in addition to the thickness, etc. of the materials described in the first embodiment, the other applicable materials can be applied as well.
As illustrated in
The semiconductor device 100C of the second embodiment includes the semiconductor element body portion 30 different from that of the first embodiment, but, except for this point, includes the same configurations as those of the first embodiment. In the following descriptions, the same components as those of the first embodiment are denoted with the same reference characters.
As illustrated in
Gate electrodes 39 are each selectively formed via a gate insulation film 38a on a partial region (an electrode formation region) of a surface of the drift layer 33, the partial region being exposed from the heat conducting layer 37. The gate electrode 39 and the gate insulation film 38a are covered with an insulation film 38b. Here, the gate electrode 39 may be comprised of polysilicon (Poly-Si), and also may be comprised of polysilicon carbide (Poly-SiC), aluminum (Al), or copper (Cu), for example. The gate insulation film 38a may be comprised of silicon oxide (SiO2), and also may be comprised of aluminum oxide (Al2O3), aluminum nitride (AlN), silicon nitride (Si3N4), boron nitride (BN), or diamond (C), for example.
Further, source electrodes 40 comprised of, e.g., nickel (Ni) are each formed on the drift layer 33 and on the electrode formation region between the heat conducting layers 37 to cover the associated insulation film 38b.
In an upper portion of the drift layer 33, p-type body layers 34 are each formed between the heat conducting layer 37 and an end portion of the gate insulation film 38a facing the heat conducting layer 37. Further, in an upper portion of the body layer 34, n+-type source layers 35 are each formed closer to the gate insulation film 38a. To improve the withstand voltage, p+ regions 36 are each formed adjacent to the source layer 35 and closer to the heat conducting layer 37. Each source layer 35 is in Ohmic contact with the source electrode 40 formed on the source layer 35. Note that a drain electrode 31 comprised of, e.g., nickel (Ni) is formed on a back surface of the bulk layer 32. The body layer 34, the source layer 35, and the p+ region 36 each can be formed by a publicly known lithography method and ion implantation method, for example. Here, the p-type impurity concentration of the body layer 34 may be approximately 1.0×1016 cm−3, and the n-type impurity concentration of the source layer 35 may be approximately 1.0×1020 cm−3, for example.
In the MOSFET, a predetermined voltage is applied to the gate electrode 39 such that a n-type channel region 34a (an inversion layer) is formed at a boundary portion between the p-type body layer 34 and the gate insulation film 38a. As a result, an operation current flows though the drain electrode 31, the bulk layer 32, the drift layer 33, the channel region 34a, the source layer 35, and the source electrode 40 in this order. In this current path, the channel region 34a has a large channel resistance, and the drift layer 33 has a large drift resistance. Thus, the ratio of the Joule heat caused by the channel resistance and the drift resistance is high to the total calorific value of the semiconductor element body portion 30.
Again, similarly to the semiconductor device 100 of the first embodiment, as long as the heat absorbing element portion 20 covers 10% or more of the area of a heat source of the semiconductor element body portion 30, the advantage of the present invention can be reliably obtained. The heat source of the semiconductor element body portion 30 mainly refers to the sum of regions in plan view of a region including the plurality of channel regions 34a and the drift layer 33
—Advantage—
As described above, according to this embodiment, the heat absorbing element portion 20 of the thin-film Peltier type is integrally formed on the semiconductor element body portion 30 configured as a MOSFET. The lower electrode 21 of the heat absorbing element portion 20 is directly connected to the heat conducting layer 37 having insulation properties and being the epitaxial growth part of the semiconductor element body portion 30. This significantly reduces the thermal resistance between the semiconductor element body portion 30 and the heat absorbing element portion 20.
One example of a method for manufacturing a semiconductor device of a third embodiment of the present invention will be described below with reference to the drawings.
First,
As illustrated in
Next, as illustrated in
Next, by the lithography method, a first mask pattern 61 is formed on the first sacrificial film 51 to obtain dotted p-type silicon layers 22 from the p-type silicon layer 22A. Then, the first mask pattern 61 formed is used as a mask, and hydrochloric acid hydrogen peroxide solution is used to wet-etch the first sacrificial film 51. Consequently, as illustrated in
Next, as illustrated in
Next, in the steps illustrated in
Specifically, as illustrated in
Next, as illustrated in
Next, as illustrated in
Next, by the lithography method, a second mask pattern 62 including an electrode formation region 10a for a SBD as an opening pattern is formed on the lower electrode formation film 21A including the p-type silicon layers 22 and the n-type silicon layers 24. Then, the second mask pattern 62 formed is used as a mask, and hydrochloric acid hydrogen peroxide solution is used to etch the lower electrode formation film 21A. Then, as illustrated in
Next, as illustrated in
Next, as illustrated in
Next, as illustrated in
Next, by the lithography method, a fourth mask pattern 64 having an opening pattern in the electrode formation region 10a on the insulation formation film 23A is formed. Then, the insulation formation film 23A is wet-etched with buffered hydrofluoric acid (BHF), so that the electrode formation region 10a in the drift layer 13 is exposed again, as illustrated in
Next, as illustrated in
Next, as illustrated in
—Advantage—
As described above, according to this embodiment, for example, the semiconductor device 100D including the semiconductor element body portion 10 and the heat absorbing element portion 20 can be reliably formed, the semiconductor element body portion 10 comprised of the SBD element including the heat conducting layer 15 having insulation properties (i-type SiC) and epitaxially grown on the drift layer 13 which is a bulk portion of silicon carbide (SiC), and the heat absorbing element portion 20 comprised of the thin-film Peltier element of silicon (Si), and directly formed on, i.e., thermally coupled to the heat conducting layer 15.
In the embodiments described above and the variations thereof, the heat conducting layers 15, 37 having insulation properties are comprised of i-type SiC. Instead, any of them may be comprised of silicon (Si), gallium nitride (GaN), aluminum nitride (AlN), silicon nitride (SiNx), zinc oxide (ZnO), C (diamond), boron nitride (BN), or gallium oxide (Ga2O3), each having insulation properties. Here, each material preferably has a thermal conductivity of 5 W/mK or more, and an electric resistivity of 108 Ωcm or more.
The heat conducting layers 15, 37 comprised of the above materials are preferably in thermal and continuous contact with, and integrated with, the semiconductor element body portions 10, 30.
The heat conducting layers comprised of the above materials is preferably formed through epitaxial growth on the surface of the semiconductor material forming part of the semiconductor device body portions 10, 30.
Specifically, as the semiconductor material forming part of the semiconductor element body portions 10, 30, silicon (Si), gallium nitride (GaN), aluminum nitride (AlN), silicon nitride (SiNx), zinc oxide (ZnO), C (diamond), boron nitride (BN), or gallium oxide (Ga2O3) can be used.
A heat insulating layer may be provided in a heat generating region (e.g., the channel region 34a in
One example of the heat absorbing element of the present invention will be described below with reference to the drawings.
As illustrated in
Here, the front and back surfaces of the Peltier element 60 have a temperature difference of 40° C. For example, the following situation can be assumed: the front surface is connected with a cooler through which a cooling medium having a temperature of 80° C. flows and the back surface is connected with a power device having a temperature of 120° C. or less. An ambient environment temperature is 295 K (22° C.: room temperature), and an electric resistivity is 1×10−5 Ωm.
The heat absorbing performance of the Peltier element is typically represented by [Formula 1] shown below.
Q
out=αeTcjI−(½)RI2−KΔTj [Formula 1]
where R=ρ(S/l), κ=κ(l/S)
Here, Qout represents the total amount of heat transfer. α represents a Seebeck coefficient. T represents room temperature. I represents a current (a Peltier drive current). ΔT represents a temperature difference between the front surface and the back surface. ρ represents an electric resistivity. S represents an area of a single Peltier element. l represents a thickness of a single Peltier element. κ represents a thermal conductivity. [Formula 1] consists of a first term representative of a Peltier effect, a second term representative of Joule heat, and a third term representative of heat conduction.
The following [Table 1] shows a list of numeric values for use in calculation of bismuth tellurium (Bi2Te3) used typically; and silicon (Si), silicon carbide (SiC), gallium nitride (GaN), aluminum nitride (AlN), boron nitride (BN), and diamond (C) usable for the present invention.
Next, based on the result of the calculation of the numeric values of [Table 1] according to [Formula 1], the numeric values of the bismuth tellurium used typically and the lower limit values of this example (the present invention) are graphed in
As illustrated in
The present invention relating to a heat absorbing element, a semiconductor device having the same, and a method for manufacturing the heat absorbing element can provide reduction in thermal resistance between the semiconductor element and the heat absorbing element. In addition to motor vehicles (HV, HEV etc.) having an inverter containing such a semiconductor device, the present invention is applicable to electric power generation systems, transmission/distribution systems (smart grids etc.); transportations except for automobiles (railways, ships, aircrafts, etc.); industry machinery (FA equipment, elevators, etc.); IT equipment (personal computers, cellular phones, etc.); consumer/home appliances (air conditioners, FPD, AV equipment, etc.); and the manufacturing techniques thereof.
| Number | Date | Country | Kind |
|---|---|---|---|
| 2015-145621 | Jul 2015 | JP | national |
| Filing Document | Filing Date | Country | Kind |
|---|---|---|---|
| PCT/JP2016/003103 | 6/28/2016 | WO | 00 |
